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/qemu/include/sysemu/
H A Ddma.h43 AddressSpace *as; member
72 static inline bool dma_memory_valid(AddressSpace *as, in dma_memory_valid() argument
76 return address_space_access_valid(as, addr, len, in dma_memory_valid()
87 return address_space_rw(as, addr, attrs, in dma_memory_rw_relaxed()
95 return dma_memory_rw_relaxed(as, addr, buf, len, in dma_memory_read_relaxed()
128 dma_barrier(as, dir); in dma_memory_rw()
150 return dma_memory_rw(as, addr, buf, len, in dma_memory_read()
171 return dma_memory_rw(as, addr, (void *)buf, len, in dma_memory_write()
205 static inline void *dma_memory_map(AddressSpace *as, in dma_memory_map() argument
236 address_space_unmap(as, buffer, (hwaddr)len, in dma_memory_unmap()
[all …]
/qemu/audio/
H A Daudio_win_int.c19 wfx->nChannels = as->nchannels; in waveformat_from_audio_settings()
20 wfx->nSamplesPerSec = as->freq; in waveformat_from_audio_settings()
21 wfx->nAvgBytesPerSec = as->freq << (as->nchannels == 2); in waveformat_from_audio_settings()
25 switch (as->fmt) { in waveformat_from_audio_settings()
70 as->freq = wfx->nSamplesPerSec; in waveformat_to_audio_settings()
74 as->nchannels = 1; in waveformat_to_audio_settings()
78 as->nchannels = 2; in waveformat_to_audio_settings()
92 as->fmt = AUDIO_FORMAT_U8; in waveformat_to_audio_settings()
96 as->fmt = AUDIO_FORMAT_S16; in waveformat_to_audio_settings()
100 as->fmt = AUDIO_FORMAT_S32; in waveformat_to_audio_settings()
[all …]
H A Daudio_template.h162 struct audsettings *as in glue()
167 audio_pcm_init_info (&sw->info, as); in glue()
256 if (audio_pcm_info_eq (&hw->info, as)) { in glue()
414 hw = glue(audio_pcm_hw_add_new_, TYPE)(s, as); in glue()
425 struct audsettings *as in glue()
436 hw_as = *as; in glue()
490 struct audsettings *as in glue()
498 card, name, callback_fn, as); in glue()
506 name, as->freq, as->nchannels, as->fmt); in glue()
509 audio_print_settings (as); in glue()
[all …]
H A Dsndioaudio.c327 struct audsettings *as, int mode, Audiodev *dev) in sndio_init() argument
350 switch (as->fmt) { in sndio_init()
381 req.le = as->endianness ? 0 : 1; in sndio_init()
384 req.rate = as->freq; in sndio_init()
386 req.pchan = as->nchannels; in sndio_init()
388 req.rchan = as->nchannels; in sndio_init()
412 self->par.rate != as->freq || nch != as->nchannels) { in sndio_init()
485 if (sndio_init(self, as, SIO_PLAY, opaque) == -1) { in sndio_init_out()
489 audio_pcm_init_info(&hw->info, as); in sndio_init_out()
498 if (sndio_init(self, as, SIO_REC, opaque) == -1) { in sndio_init_in()
[all …]
H A Dwavcapture.c117 struct audsettings as; in wav_start_capture() local
136 as.freq = freq; in wav_start_capture()
137 as.nchannels = 1 << stereo; in wav_start_capture()
138 as.fmt = bits16 ? AUDIO_FORMAT_S16 : AUDIO_FORMAT_U8; in wav_start_capture()
139 as.endianness = 0; in wav_start_capture()
150 le_store (hdr + 22, as.nchannels, 2); in wav_start_capture()
173 cap = AUD_add_capture(state, &as, &ops, wav); in wav_start_capture()
/qemu/target/i386/
H A Darch_memory_mapping.c19 static void walk_pte(MemoryMappingList *list, AddressSpace *as, in walk_pte() argument
49 static void walk_pte2(MemoryMappingList *list, AddressSpace *as, in walk_pte2() argument
81 static void walk_pde(MemoryMappingList *list, AddressSpace *as, in walk_pde() argument
113 walk_pte(list, as, pte_start_addr, a20_mask, line_addr); in walk_pde()
118 static void walk_pde2(MemoryMappingList *list, AddressSpace *as, in walk_pde2() argument
178 walk_pde(list, as, pde_start_addr, a20_mask, line_addr); in walk_pdpe2()
184 static void walk_pdpe(MemoryMappingList *list, AddressSpace *as, in walk_pdpe() argument
289 walk_pml5e(list, cs->as, pml5e_addr, a20_mask); in x86_cpu_get_memory_mapping()
294 walk_pml4e(list, cs->as, pml4e_addr, a20_mask, in x86_cpu_get_memory_mapping()
303 walk_pdpe2(list, cs->as, pdpe_addr, a20_mask); in x86_cpu_get_memory_mapping()
[all …]
/qemu/hw/audio/
H A Dlm4549.c187 as.freq = value; in lm4549_write()
188 as.nchannels = 2; in lm4549_write()
198 &as in lm4549_write()
257 as.freq = freq; in lm4549_post_load()
258 as.nchannels = 2; in lm4549_post_load()
260 as.endianness = 0; in lm4549_post_load()
268 &as in lm4549_post_load()
297 as.freq = 48000; in lm4549_init()
298 as.nchannels = 2; in lm4549_init()
300 as.endianness = 0; in lm4549_init()
[all …]
H A Dhda-codec.c90 case 1: as->freq *= 2; break; in hda_codec_parse_fmt()
91 case 2: as->freq *= 3; break; in hda_codec_parse_fmt()
92 case 3: as->freq *= 4; break; in hda_codec_parse_fmt()
96 case 1: as->freq /= 2; break; in hda_codec_parse_fmt()
97 case 2: as->freq /= 3; break; in hda_codec_parse_fmt()
98 case 3: as->freq /= 4; break; in hda_codec_parse_fmt()
99 case 4: as->freq /= 5; break; in hda_codec_parse_fmt()
100 case 5: as->freq /= 6; break; in hda_codec_parse_fmt()
163 struct audsettings as; member
195 return 2 * (uint32_t)st->as.nchannels * (uint32_t)st->as.freq; in hda_bytes_per_second()
[all …]
/qemu/system/
H A Dmemory.c585 AddressSpace *as; in memory_region_to_address_space() local
592 return as; in memory_region_to_address_space()
884 as->ioeventfds, as->ioeventfd_nb); in address_space_update_ioeventfds()
1035 AddressSpace *as; in flatviews_reset() local
1119 AddressSpace *as; in memory_region_transaction_commit() local
2284 AddressSpace *as; in memory_region_sync_dirty_bitmap() local
2828 if (!as) { in memory_region_find_rcu()
3171 as->root = root; in address_space_init()
3205 as->root = NULL; in address_space_destroy()
3213 as->root = root; in address_space_destroy()
[all …]
/qemu/hw/ppc/
H A Dppc405_boards.c166 stl_be_phys(cs->as, bdloc + 0x00, bd->bi_memstart); in __ppc405_set_bootinfo()
167 stl_be_phys(cs->as, bdloc + 0x04, bd->bi_memsize); in __ppc405_set_bootinfo()
169 stl_be_phys(cs->as, bdloc + 0x0C, bd->bi_flashsize); in __ppc405_set_bootinfo()
172 stl_be_phys(cs->as, bdloc + 0x18, bd->bi_sramsize); in __ppc405_set_bootinfo()
174 stl_be_phys(cs->as, bdloc + 0x20, bd->bi_ipaddr); in __ppc405_set_bootinfo()
178 stw_be_phys(cs->as, bdloc + 0x2A, bd->bi_ethspeed); in __ppc405_set_bootinfo()
179 stl_be_phys(cs->as, bdloc + 0x2C, bd->bi_intfreq); in __ppc405_set_bootinfo()
180 stl_be_phys(cs->as, bdloc + 0x30, bd->bi_busfreq); in __ppc405_set_bootinfo()
181 stl_be_phys(cs->as, bdloc + 0x34, bd->bi_baudrate); in __ppc405_set_bootinfo()
188 stl_be_phys(cs->as, bdloc + 0x5C, bd->bi_procfreq); in __ppc405_set_bootinfo()
[all …]
H A Dpegasos2.c426 AddressSpace *as = CPU(cpu)->as; in pegasos2_rtas() local
445 stl_be_phys(as, rets, -1); in pegasos2_rtas()
450 stl_be_phys(as, rets, 0); in pegasos2_rtas()
457 stl_be_phys(as, rets + 28, 0); in pegasos2_rtas()
469 addr = ldl_be_phys(as, args); in pegasos2_rtas()
473 stl_be_phys(as, rets, 0); in pegasos2_rtas()
485 addr = ldl_be_phys(as, args); in pegasos2_rtas()
490 stl_be_phys(as, rets, 0); in pegasos2_rtas()
499 stl_be_phys(as, rets, 0); in pegasos2_rtas()
508 stl_be_phys(as, rets, 0); in pegasos2_rtas()
[all …]
/qemu/include/hw/ppc/
H A Dspapr_vio.h65 AddressSpace as; member
94 return dma_memory_valid(&dev->as, taddr, size, dir, MEMTXATTRS_UNSPECIFIED); in spapr_vio_dma_valid()
100 return (dma_memory_read(&dev->as, taddr, in spapr_vio_dma_read()
108 return (dma_memory_write(&dev->as, taddr, in spapr_vio_dma_write()
116 return (dma_memory_set(&dev->as, taddr, in spapr_vio_dma_set()
122 (stb_dma(&(_dev)->as, (_addr), (_val), MEMTXATTRS_UNSPECIFIED))
124 (stw_be_dma(&(_dev)->as, (_addr), (_val), MEMTXATTRS_UNSPECIFIED))
126 (stl_be_dma(&(_dev)->as, (_addr), (_val), MEMTXATTRS_UNSPECIFIED))
128 (stq_be_dma(&(_dev)->as, (_addr), (_val), MEMTXATTRS_UNSPECIFIED))
132 ldq_be_dma(&(_dev)->as, (_addr), &_val, MEMTXATTRS_UNSPECIFIED); \
/qemu/hw/arm/
H A Dboot.c134 AddressSpace *as, hwaddr addr, in arm_write_bootloader() argument
188 AddressSpace *as = arm_boot_address_space(cpu, info); in default_write_secondary() local
206 AddressSpace *as = arm_boot_address_space(cpu, info); in arm_write_secure_board_setup_dummy_smc() local
248 mvbar_addr, as); in arm_write_secure_board_setup_dummy_smc()
260 AddressSpace *as = arm_boot_address_space(cpu, info); in default_reset_secondary() local
274 address_space_stl_notdirty(as, p, value, \
335 AddressSpace *as) in set_kernel_args_old() argument
669 rom_add_blob_fixed_as("dtb", fdt, size, addr, as); in arm_load_dtb()
761 set_kernel_args_old(info, as); in do_cpu_reset()
763 set_kernel_args(info, as); in do_cpu_reset()
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/qemu/hw/remote/
H A Diommu.c57 address_space_init(&elem->as, elem->mr, NULL); in remote_iommu_find_add_as()
62 return &elem->as; in remote_iommu_find_add_as()
67 AddressSpace *as = pci_device_iommu_address_space(pci_dev); in remote_iommu_unplug_dev() local
70 if (as == &address_space_memory) { in remote_iommu_unplug_dev()
74 elem = container_of(as, RemoteIommuElem, as); in remote_iommu_unplug_dev()
76 address_space_destroy(&elem->as); in remote_iommu_unplug_dev()
/qemu/tests/qtest/fuzz/
H A Dqtest_wrappers.c110 address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, in __wrap_qtest_readb()
122 address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, in __wrap_qtest_readw()
134 address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, in __wrap_qtest_readl()
146 address_space_read(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, in __wrap_qtest_readq()
157 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, in __wrap_qtest_writeb()
167 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, in __wrap_qtest_writew()
177 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, in __wrap_qtest_writel()
187 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, in __wrap_qtest_writeq()
218 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, in __wrap_qtest_memwrite()
229 address_space_write(first_cpu->as, addr, MEMTXATTRS_UNSPECIFIED, in __wrap_qtest_bufwrite()
[all …]
/qemu/include/hw/
H A Dloader.h44 hwaddr addr, uint64_t max_sz, AddressSpace *as);
57 AddressSpace *as);
158 AddressSpace *as, bool load_rom, symbol_fn_t sym_cb);
170 int data_swab, AddressSpace *as, bool load_rom);
181 AddressSpace *as);
231 void *translate_opaque, AddressSpace *as);
256 AddressSpace *as);
275 bool has_option_rom, MemoryRegion *mr, AddressSpace *as);
280 void *callback_opaque, AddressSpace *as,
284 AddressSpace *as);
[all …]
/qemu/docs/system/arm/
H A Dmps2.rst7 bigger FPGA but is otherwise the same as the 2; the 3 has a bigger
11 details of the board as seen by the guest depend significantly on the
19 Cortex-M3 as documented in Arm Application Note AN385
21 Cortex-M4 as documented in Arm Application Note AN386
23 Cortex-M7 as documented in Arm Application Note AN500
25 Cortex-M33 as documented in Arm Application Note AN505
27 Cortex-M3 'DesignStart' as documented in Arm Application Note AN511
29 Dual Cortex-M33 as documented in Arm Application Note AN521
33 Cortex-M55 on an MPS3, as documented in Arm Application Note AN547
51 - QEMU does not model the QSPI flash in MPS3 boards as real QSPI
[all …]
/qemu/hw/core/
H A Dloader.c973 AddressSpace *as; member
1016 return ((uintptr_t)(void *)rom->as > (uintptr_t)(void *)item->as) || in rom_order_compare()
1017 (rom->as == item->as && rom->addr >= item->addr); in rom_order_compare()
1029 if (!rom->as) { in rom_insert()
1082 if (as && mr) { in rom_add_file()
1092 rom->as = as; in rom_add_file()
1180 rom->as = as; in rom_add_blob()
1229 rom->as = as; in rom_add_elf_program()
1310 return last_rom->as == this_rom->as && in roms_overlap()
1316 const char *name = rom->as ? rom->as->name : NULL; in rom_as_name()
[all …]
H A Dgeneric-loader.c60 dma_memory_write(s->cpu->as, s->addr, &s->data, s->data_len, in generic_loader_reset()
140 AddressSpace *as = s->cpu ? s->cpu->as : NULL; in generic_loader_realize() local
144 NULL, big_endian, 0, 0, 0, as); in generic_loader_realize()
148 as); in generic_loader_realize()
152 size = load_targphys_hex_as(s->file, &entry, as); in generic_loader_realize()
158 size = load_image_targphys_as(s->file, s->addr, current_machine->ram_size, as); in generic_loader_realize()
/qemu/hw/fsi/
H A Daspeed_apb2opb.c112 static MemTxResult fsi_aspeed_apb2opb_rw(AddressSpace *as, hwaddr addr, in fsi_aspeed_apb2opb_rw() argument
121 address_space_stl_le(as, addr, *data, attrs, &res); in fsi_aspeed_apb2opb_rw()
124 address_space_stw_le(as, addr, *data, attrs, &res); in fsi_aspeed_apb2opb_rw()
127 address_space_stb(as, addr, *data, attrs, &res); in fsi_aspeed_apb2opb_rw()
135 *data = address_space_ldl_le(as, addr, attrs, &res); in fsi_aspeed_apb2opb_rw()
138 *data = address_space_lduw_le(as, addr, attrs, &res); in fsi_aspeed_apb2opb_rw()
141 *data = address_space_ldub(as, addr, attrs, &res); in fsi_aspeed_apb2opb_rw()
201 AddressSpace *as; in fsi_aspeed_apb2opb_write() local
235 as = &s->opb[opb].as; in fsi_aspeed_apb2opb_write()
237 result = fsi_aspeed_apb2opb_rw(as, op_addr, MEMTXATTRS_UNSPECIFIED, in fsi_aspeed_apb2opb_write()
[all …]
/qemu/hw/misc/
H A Dtz-msc.c128 AddressSpace *as = &s->downstream_as; in tz_msc_read() local
150 data = address_space_ldub(as, addr, attrs, &res); in tz_msc_read()
153 data = address_space_lduw_le(as, addr, attrs, &res); in tz_msc_read()
156 data = address_space_ldl_le(as, addr, attrs, &res); in tz_msc_read()
159 data = address_space_ldq_le(as, addr, attrs, &res); in tz_msc_read()
172 AddressSpace *as = &s->downstream_as; in tz_msc_write() local
192 address_space_stb(as, addr, val, attrs, &res); in tz_msc_write()
195 address_space_stw_le(as, addr, val, attrs, &res); in tz_msc_write()
198 address_space_stl_le(as, addr, val, attrs, &res); in tz_msc_write()
201 address_space_stq_le(as, addr, val, attrs, &res); in tz_msc_write()
H A Dtz-ppc.c111 AddressSpace *as = &p->downstream_as; in tz_ppc_read() local
127 data = address_space_ldub(as, addr, attrs, &res); in tz_ppc_read()
130 data = address_space_lduw_le(as, addr, attrs, &res); in tz_ppc_read()
133 data = address_space_ldl_le(as, addr, attrs, &res); in tz_ppc_read()
136 data = address_space_ldq_le(as, addr, attrs, &res); in tz_ppc_read()
150 AddressSpace *as = &p->downstream_as; in tz_ppc_write() local
165 address_space_stb(as, addr, val, attrs, &res); in tz_ppc_write()
168 address_space_stw_le(as, addr, val, attrs, &res); in tz_ppc_write()
171 address_space_stl_le(as, addr, val, attrs, &res); in tz_ppc_write()
174 address_space_stq_le(as, addr, val, attrs, &res); in tz_ppc_write()
/qemu/tests/multiboot/
H A Dmodules.out13 Content: 'This is a test file that is used as a multiboot module.'
20 Content: 'This is a test file that is used as a multiboot module.'
27 Content: 'This is a test file that is used as a multiboot module.'
34 Content: 'This is a test file that is used as a multiboot module.'
36 Content: 'This is a test file that is used as a multiboot module.'
38 Content: 'This is a test file that is used as a multiboot module.'
/qemu/docs/devel/migration/
H A Dmapped-ram.rst17 usage of O_DIRECT for save/restore of the migration stream as the
44 thought of as snapshots. We can further categorize them into live and
52 as fast as it can.
63 but will be less performant. Other strategies such as
64 background-snapshot should be evaluated as well. One benefit of
84 ramblock. Zero pages are ignored as they'd be zero in the destination
85 migration as well.
120 - ramblock header: the generic information for a ramblock, such as
131 (due to the memory dirtying patterns), streaming channels such as
132 sockets are not supported. A seekable channel such as a file is
[all …]
/qemu/target/mips/tcg/sysemu/
H A Dlcsr_helper.c18 return address_space_ldl(&env->iocsr.as, r_addr, in helper_lcsr_rdcsr()
24 return address_space_ldq(&env->iocsr.as, r_addr, in helper_lcsr_drdcsr()
31 address_space_stl(&env->iocsr.as, w_addr, in helper_lcsr_wrcsr()
38 address_space_stq(&env->iocsr.as, w_addr, in helper_lcsr_dwrcsr()

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