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/qemu/
H A DMAINTAINERS2103 F: include/hw/block/flash.h
/qemu/docs/about/
H A Ddeprecated.rst242 in QEMU. This also holds for the TC51828 16MiB flash that it uses.
/qemu/docs/devel/
H A Dreplay.rst273 operations with disk and flash drives with CPU. Followed by:
/qemu/docs/interop/
H A Dfirmware.json49 # @flash: The firmware executable and its accompanying NVRAM file are to
61 'data' : [ 'flash', 'kernel', 'memory' ] }
257 # and its accompanying NVRAM file, when @FirmwareDevice is @flash.
347 'data' : { 'flash' : 'FirmwareMappingFlash',
/qemu/docs/specs/
H A Dacpi_erst.rst20 implemented by most BIOS (since flash memory requires programming
/qemu/docs/system/arm/
H A Daspeed.rst107 To boot the machine from the flash image, use an MTD drive :
116 * ``execute-in-place`` which emulates the boot from the CE0 flash
130 To use other flash models, for instance a different FMC chip and a
137 When more flexibility is needed to define the flash devices, to use
138 different flash models or define all flash devices (up to 8), the
140 flash devices.
H A Dcollie.rst9 * NOR flash
H A Dgumstix.rst9 * NOR flash
H A Dmps2.rst8 FPGA again, can handle 4GB of RAM and has a USB controller and QSPI flash).
45 - AN524 remapping of low memory to either BRAM or to QSPI flash is
51 - QEMU does not model the QSPI flash in MPS3 boards as real QSPI
52 flash, but only as simple ROM, so attempting to rewrite the flash
57 - AN536 does not support enabling or disabling the flash and ATCM
H A Dmusicpal.rst9 - 32 MB RAM, 256 KB SRAM, 8 MB flash.
H A Dsabrelite.rst27 * 1 SST 25VF016B flash
H A Dvexpress.rst63 the first flash bank
H A Dvirt.rst48 - A secure flash memory
/qemu/docs/system/i386/
H A Damd-memory-encryption.rst147 * ``firmware_blob`` is the content of the entire firmware flash file (for
/qemu/docs/system/ppc/
H A Dppce500.rst170 Root file system on flash drive
174 CFI flash. Given an ext2 image whose size must be a power of two, it can be used
/qemu/docs/system/riscv/
H A Dsifive_u.rst25 * 1 ISSI 25WP256 flash
83 - start-in-flash
85 When given, QEMU's ROM codes jump to QSPI memory-mapped flash directly.
108 msel=6 means FSBL and SSBL are both on the QSPI flash. msel=11 means FSBL
226 To start U-Boot using the ``sifive_u`` machine, prepare an SPI flash image, or
255 SPI flash image has slightly different partition offsets, and the size has to
256 be 32 MiB to match the ISSI 25WP256 flash on the real board:
298 Changing msel= value to 6, allows booting U-Boot from the SPI flash:
315 case: ZSBL (in QEMU) loads U-Boot SPL from SD card or SPI flash to L2LIM,
320 without the needs of preparing the SPI flash or SD card images, an alternate
H A Dvirt.rst18 * CFI parallel NOR flash memory
56 Using flash devices
59 By default, the first flash device (pflash0) is expected to contain
61 second flash device (pflash1) available to store configuration data.
74 the first flash device (pflash0) by additionally passing ``-bios
/qemu/hw/arm/
H A Dintegratorcp.c42 MemoryRegion flash; member
162 memory_region_set_enabled(&s->flash, !(s->cm_ctrl & 4)); in integratorcm_do_remap()
295 if (!memory_region_init_ram(&s->flash, OBJECT(d), "integrator.flash", in integratorcm_realize()
H A Dnpcm7xx_boards.c83 DeviceState *flash; in npcm7xx_connect_flash() local
86 flash = qdev_new(flash_type); in npcm7xx_connect_flash()
88 qdev_prop_set_drive(flash, "drive", blk_by_legacy_dinfo(dinfo)); in npcm7xx_connect_flash()
90 qdev_realize_and_unref(flash, BUS(fiu->spi), &error_fatal); in npcm7xx_connect_flash()
92 flash_cs = qdev_get_gpio_in_named(flash, SSI_GPIO_CS, 0); in npcm7xx_connect_flash()
H A Domap_sx1.c108 MemoryRegion *flash = g_new(MemoryRegion, 1); in sx1_init() local
134 memory_region_init_rom(flash, NULL, "omap_sx1.flash0-0", flash_size, in sx1_init()
136 memory_region_add_subregion(address_space, OMAP_CS0_BASE, flash); in sx1_init()
H A Dpalm.c236 MemoryRegion *flash = g_new(MemoryRegion, 1); in palmte_init() local
252 memory_region_init_rom(flash, NULL, "palmte.flash", flash_size, in palmte_init()
254 memory_region_add_subregion(address_space_mem, OMAP_CS0_BASE, flash); in palmte_init()
H A Dsbsa-ref.c111 PFlashCFI01 *flash[2]; member
315 sms->flash[0] = sbsa_flash_create1(sms, "sbsa.flash0", "pflash0"); in sbsa_flash_create()
316 sms->flash[1] = sbsa_flash_create1(sms, "sbsa.flash1", "pflash1"); in sbsa_flash_create()
319 static void sbsa_flash_map1(PFlashCFI01 *flash, in sbsa_flash_map1() argument
323 DeviceState *dev = DEVICE(flash); in sbsa_flash_map1()
348 sbsa_flash_map1(sms->flash[0], flashbase, flashsize, in sbsa_flash_map()
350 sbsa_flash_map1(sms->flash[1], flashbase + flashsize, flashsize, in sbsa_flash_map()
363 for (i = 0; i < ARRAY_SIZE(sms->flash); i++) { in sbsa_firmware_init()
364 pflash_cfi01_legacy_drive(sms->flash[i], in sbsa_firmware_init()
370 pflash_blk0 = pflash_cfi01_get_blk(sms->flash[0]); in sbsa_firmware_init()
[all …]
H A Dstellaris.c1050 MemoryRegion *flash = g_new(MemoryRegion, 1); in stellaris_init() local
1060 memory_region_init_rom(flash, NULL, "stellaris.flash", flash_size, in stellaris_init()
1062 memory_region_add_subregion(system_memory, 0, flash); in stellaris_init()
H A Dstm32f100_soc.c103 memory_region_init_rom(&s->flash, OBJECT(dev_soc), "STM32F100.flash", in stm32f100_soc_realize()
106 "STM32F100.flash.alias", &s->flash, 0, FLASH_SIZE); in stm32f100_soc_realize()
107 memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash); in stm32f100_soc_realize()
H A Dstm32f205_soc.c116 memory_region_init_rom(&s->flash, OBJECT(dev_soc), "STM32F205.flash", in stm32f205_soc_realize()
119 "STM32F205.flash.alias", &s->flash, 0, FLASH_SIZE); in stm32f205_soc_realize()
121 memory_region_add_subregion(system_memory, FLASH_BASE_ADDRESS, &s->flash); in stm32f205_soc_realize()

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