| /qemu/docs/devel/ |
| H A D | reset.rst | 89 Multi-phase mechanism
156 /* call parent class enter phase */
168 /* call parent class hold phase */
180 /* call parent class exit phase */
208 only override the *enter* phase and leave *hold* and *exit* untouched::
215 phase.
225 phase. During *enter* and *hold* phase only, the function will return that the
238 *hold* or *exit* phase of another object in the same reset group.
290 *exit* phase is an error.
324 the three-phase mechanism listed above. It resets all objects
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| H A D | rcu.txt | 45 | finish removal phase
50 begin reclamation phase |
80 phase and the beginning of reclamation phase.
93 marks the end of the removal phase, with func taking care
94 asynchronously of the reclamation phase.
393 /* Removal phase. */
398 /* Reclamation phase. */
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| H A D | clocks.rst | 411 in init phase:
432 * and in the enter phase of reset.
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| /qemu/docs/devel/migration/ |
| H A D | vfio.rst | 10 Migration of VFIO devices consists of two phases: the optional pre-copy phase,
11 and the stop-and-copy phase. The pre-copy phase is iterative and allows to
13 transferred. The iterative pre-copy phase of migration allows for the guest to
65 vendor driver during iterative pre-copy phase.
122 phase. So, a page marked as dirty will be copied to the destination in both
123 phases. Copying dirty pages in pre-copy phase helps QEMU to predict if it can
124 achieve its downtime tolerances. If QEMU during pre-copy phase keeps finding
130 off, all dirty pages will be copied to the destination in stop-and-copy phase
137 phase of migration. In that case, the unmap ioctl returns any dirty pages in
139 stop-and-copy phase, an IOMMU notifier is used to get a callback for mapped
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| H A D | postcopy.rst | 10 the postcopy phase, a failure of *either* side causes the guest to be lost.
51 During the postcopy phase, the bandwidth limits set using
79 during the postcopy phase, and to cause any huge pages that
204 sending. During the precopy phase this is updated as the CPU dirties
219 will go into a paused state. It'll need a recovery phase to continue a
222 The recovery phase normally contains a few steps:
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| /qemu/hw/m68k/ |
| H A D | next-cube.c | 65 int8_t phase; member
155 if (rtc->phase == -1) { in next_scr2_rtc_update()
156 rtc->phase = 0; in next_scr2_rtc_update()
161 if (rtc->phase < 8) { in next_scr2_rtc_update()
165 if (rtc->phase >= 8 && rtc->phase < 16) { in next_scr2_rtc_update()
183 if (rtc->status & (0x80 >> (rtc->phase - 8))) { in next_scr2_rtc_update()
229 if (ret & (0x80 >> (rtc->phase - 8))) { in next_scr2_rtc_update()
238 rtc->phase++; in next_scr2_rtc_update()
239 if (rtc->phase == 16) { in next_scr2_rtc_update()
255 rtc->phase = -1; in next_scr2_rtc_update()
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| /qemu/scripts/coccinelle/ |
| H A D | reset-type.cocci | 1 // Convert device code using three-phase reset to add a ResetType
16 // implementations of the hold and exit phase methods" it includes
101 identifier phase;
104 - rc->phases.phase(obj)@p
105 + rc->phases.phase(obj, RESET_TYPE_COLD)
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| /qemu/hw/audio/ |
| H A D | asc.c | 293 uint32_t phase, incr, offset; in generate_wavetable() local
295 phase = ldl_be_p(&s->regs[chanreg]); in generate_wavetable()
298 phase += incr; in generate_wavetable()
299 offset = (phase >> 15) & 0x1ff; in generate_wavetable()
302 stl_be_p(&s->regs[chanreg], phase); in generate_wavetable()
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| /qemu/hw/core/ |
| H A D | qdev.c | 892 bool phase_check(MachineInitPhase phase) in phase_check() argument
894 return machine_phase >= phase; in phase_check()
897 void phase_advance(MachineInitPhase phase) in phase_advance() argument
899 assert(machine_phase == phase - 1); in phase_advance()
900 machine_phase = phase; in phase_advance()
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| /qemu/hw/block/ |
| H A D | fdc.c | 950 s->phase = FD_PHASE_RECONSTRUCT; in fdc_pre_load()
961 if (s->phase == FD_PHASE_RECONSTRUCT) { in fdc_post_load()
962 s->phase = reconstruct_phase(s); in fdc_post_load()
1008 return reconstruct_phase(fdctrl) != fdctrl->phase; in fdc_phase_needed()
1017 VMSTATE_UINT8(phase, FDCtrl),
1352 fdctrl->phase = FD_PHASE_COMMAND; in fdctrl_to_command_phase()
1364 fdctrl->phase = FD_PHASE_RESULT; in fdctrl_to_result_phase()
1733 switch (fdctrl->phase) { in fdctrl_read_data()
2237 switch (fdctrl->phase) { in fdctrl_write_data()
2283 fdctrl->phase = FD_PHASE_EXECUTION; in fdctrl_write_data()
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| H A D | fdc-internal.h | 97 uint8_t phase; member
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| /qemu/include/hw/ |
| H A D | qdev-core.h | 1107 bool phase_check(MachineInitPhase phase);
1108 void phase_advance(MachineInitPhase phase);
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| /qemu/hw/scsi/ |
| H A D | trace-events | 200 esp_set_phase(const char *phase) "setting bus phase to %s"
250 lsi_bad_phase_jump(uint32_t dsp) "Data phase mismatch jump to 0x%"PRIX32
281 lsi_execute_script_blockmove_badphase(const char *phase, const char *expected) "Wrong phase got %s …
291 lsi_execute_script_tc_compp(const char *phase, char op, const char *insn_phase) "Compare phase %s %…
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| H A D | lsi53c895a.c | 327 static const char *scsi_phase_name(int phase) in scsi_phase_name() argument
329 return scsi_phases[phase & PHASE_MASK]; in scsi_phase_name()
569 static inline void lsi_set_phase(LSIState *s, int phase) in lsi_set_phase() argument
572 s->sbcl |= phase | LSI_SBCL_REQ; in lsi_set_phase()
573 s->sstat1 = (s->sstat1 & ~PHASE_MASK) | phase; in lsi_set_phase()
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| H A D | esp.c | 87 static void esp_set_phase(ESPState *s, uint8_t phase) in esp_set_phase() argument
90 s->rregs[ESP_RSTAT] |= phase; in esp_set_phase()
92 trace_esp_set_phase(esp_phase_names[phase]); in esp_set_phase()
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| /qemu/include/standard-headers/linux/ |
| H A D | input.h | 407 uint16_t phase; member
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| /qemu/include/hw/virtio/ |
| H A D | vhost.h | 408 VhostDeviceStatePhase phase,
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| H A D | vhost-backend.h | 157 VhostDeviceStatePhase phase,
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| /qemu/include/block/ |
| H A D | block-global-state.h | 214 } phase; member
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| /qemu/include/hw/i2c/ |
| H A D | pmbus_device.h | 293 uint8_t phase; /* R/W byte */ member
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| /qemu/ |
| H A D | .travis.yml | 46 # Common first phase for all steps
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| /qemu/block/ |
| H A D | block-backend.c | 607 if (it->phase == BDRV_NEXT_BACKEND_ROOTS) { in bdrv_next()
626 it->phase = BDRV_NEXT_MONITOR_OWNED; in bdrv_next()
648 .phase = BDRV_NEXT_BACKEND_ROOTS, in bdrv_next_reset()
668 if (it->phase == BDRV_NEXT_BACKEND_ROOTS && it->blk) { in bdrv_next_cleanup()
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| /qemu/hw/virtio/ |
| H A D | vhost-user.c | 208 uint32_t phase; member
2891 VhostDeviceStatePhase phase, in vhost_user_set_device_state_fd() argument
2906 .phase = phase, in vhost_user_set_device_state_fd()
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| /qemu/hw/nvme/ |
| H A D | nvme.h | 498 uint8_t phase; member
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| /qemu/docs/ |
| H A D | rdma.txt | 65 bulk-phase round of the migration and can be enabled for extremely
117 EFFECTS of memory registration on bulk phase round:
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