Home
last modified time | relevance | path

Searched refs:reg (Results 101 – 125 of 9975) sorted by relevance

12345678910>>...399

/freebsd/sys/amd64/pci/
H A Dpci_cfgreg.c53 int reg, int bytes);
137 if (reg == PCIR_INTLINE && bytes == 1) { in pci_cfgregread()
155 pcireg_cfgwrite(bus, slot, func, reg, data, bytes); in pci_cfgregwrite()
185 (unsigned)reg <= PCI_REGMAX && bytes != 3 && in pci_cfgenable()
188 | (func << 8) | (reg & ~0x03)); in pci_cfgenable()
189 dataport = CONF1_DATA_PORT + (reg & 0x03); in pci_cfgenable()
212 port = pci_cfgenable(bus, slot, func, reg, bytes); in pcireg_cfgread()
237 port = pci_cfgenable(bus, slot, func, reg, bytes); in pcireg_cfgwrite()
313 #define PCIE_VADDR(base, reg, bus, slot, func) \ argument
318 ((reg) & 0xfff)))
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/realtek/
H A Drtd129x.dtsi68 reg = <0x0 0x1800>;
128 reg = <0x0 0x4>;
134 reg = <0x4 0x4>;
140 reg = <0x8 0x4>;
146 reg = <0x50 0x4>;
154 reg = <0x88 0x4>;
167 reg-shift = <2>;
168 reg-io-width = <4>;
179 reg-shift = <2>;
180 reg-io-width = <4>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/hisilicon/
H A Dhip04.dtsi90 reg = <0>;
95 reg = <1>;
100 reg = <2>;
105 reg = <3>;
358 reg = <0>;
365 reg = <1>;
393 reg = <0>;
400 reg = <1>;
427 reg = <0>;
434 reg = <1>;
[all …]
/freebsd/sys/dev/isci/scil/
H A Dscic_sds_controller_registers.h78 (controller)->smu_registers->reg \
84 (controller)->smu_registers->reg, \
96 (controller)->scu_registers->afe.reg, \
100 #define scu_afe_register_read(controller, reg) \ argument
103 (controller)->scu_registers->afe.reg \
348 (controller)->scu_registers->reg \
354 (controller)->scu_registers->reg, \
371 (controller)->scu_registers->sdma.reg \
377 (controller)->scu_registers->sdma.reg, \
484 (controller)->scu_registers->cram.reg \
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/apm/
H A Dapm-shadowcat.dtsi21 reg = <0x0 0x000>;
308 reg-names = "div-reg";
320 reg-names = "div-reg";
333 reg-names = "csr-reg", "div-reg";
349 reg-names = "csr-reg";
358 reg-names = "csr-reg";
367 reg-names = "csr-reg";
378 reg-names = "csr-reg";
389 reg-names = "csr-reg";
402 reg-names = "csr-reg";
[all …]
H A Dapm-storm.dtsi182 reg-names = "div-reg";
195 reg-names = "csr-reg", "div-reg";
212 reg-names = "div-reg";
224 reg-names = "csr-reg";
233 reg-names = "csr-reg";
244 reg-names = "csr-reg";
255 reg-names = "csr-reg";
265 reg-names = "csr-reg";
279 reg-names = "csr-reg";
293 reg-names = "csr-reg";
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/fsl/
H A Dp5040ds.dts113 reg = <0>;
137 reg = <0x51>;
141 reg = <0x52>;
148 reg = <0x68>;
153 reg = <0x40>;
158 reg = <0x41>;
163 reg = <0x44>;
296 reg = <9 1>;
302 reg = <8>;
417 reg = <0>;
[all …]
/freebsd/sys/dev/pwm/controller/allwinner/
H A Daw_pwm.c109 #define AW_PWM_READ(sc, reg) bus_read_4((sc)->res, (reg)) argument
110 #define AW_PWM_WRITE(sc, reg, val) bus_write_4((sc)->res, (reg), (val)) argument
134 uint32_t reg; in aw_pwm_attach() local
170 reg &= AW_PWM_CTRL_PRESCALE_MASK; in aw_pwm_attach()
248 uint32_t reg; in aw_pwm_channel_config() local
301 reg |= prescaler; in aw_pwm_channel_config()
303 reg &= ~AW_PWM_CTRL_MODE_MASK; in aw_pwm_channel_config()
304 reg |= AW_PWM_CTRL_CYCLE_MODE; in aw_pwm_channel_config()
306 reg &= ~AW_PWM_CTRL_PULSE_START; in aw_pwm_channel_config()
307 reg &= ~AW_PWM_CTRL_CLK_BYPASS; in aw_pwm_channel_config()
[all …]
/freebsd/sys/dev/usb/controller/dwc3/
H A Ddwc3.c189 uint32_t reg; in snsp_dwc3_dump_regs() local
196 reg = DWC3_READ(sc, DWC3_GCTL); in snsp_dwc3_dump_regs()
206 reg = DWC3_READ(sc, DWC3_DCFG); in snsp_dwc3_dump_regs()
221 uint32_t reg; in snps_dwc3_dump_ctrlparams() local
225 reg = DWC3_READ(sc, offs[i]); in snps_dwc3_dump_ctrlparams()
273 uint32_t reg; in snps_dwc3_configure_host() local
275 reg = DWC3_READ(sc, DWC3_GCTL); in snps_dwc3_configure_host()
278 DWC3_WRITE(sc, DWC3_GCTL, reg); in snps_dwc3_configure_host()
295 uint32_t reg; in snps_dwc3_configure_phy() local
322 uint32_t ghwp0, reg; in snps_dwc3_do_quirks() local
[all …]
/freebsd/sys/contrib/device-tree/src/arm/aspeed/
H A Daspeed-bmc-quanta-s6q.dts171 reg = <0>;
298 reg = <0>;
304 reg = <1>;
310 reg = <2>;
316 reg = <3>;
334 reg = <0>;
340 reg = <1>;
346 reg = <2>;
352 reg = <3>;
367 reg = <4>;
[all …]
/freebsd/sys/contrib/device-tree/src/powerpc/
H A Dxcalibur1501.dts32 reg = <0x0>;
45 reg = <0x1>;
219 reg = <0x48>;
224 reg = <0x4c>;
229 reg = <0x51>;
234 reg = <0x54>;
240 reg = <0x68>;
245 reg = <0x6a>;
251 reg = <0x18>;
260 reg = <0x1c>;
[all …]
H A Dlite5200.dts24 reg = <0>;
51 reg = <0x200 0x38>;
59 reg = <0x500 0x80>;
64 reg = <0x600 0x10>;
71 reg = <0x610 0x10>;
77 reg = <0x620 0x10>;
83 reg = <0x630 0x10>;
89 reg = <0x640 0x10>;
95 reg = <0x650 0x10>;
234 reg = <0>;
[all …]
H A Dxpedite5200.dts34 reg = <0>;
109 reg = <0x18>;
118 reg = <0x19>;
126 reg = <0x50>;
132 reg = <0x68>;
137 reg = <0x34>;
219 reg = <0x1>;
224 reg = <0x2>;
229 reg = <0x3>;
234 reg = <0x4>;
[all …]
/freebsd/sys/contrib/device-tree/src/mips/brcm/
H A Dbcm7425.dtsi16 reg = <0>;
22 reg = <1>;
95 reg = <0x406780 0x8>;
140 reg-shift = <0x2>;
151 reg-shift = <0x2>;
162 reg-shift = <0x2>;
310 reg = <0x1>;
424 reg = <0>;
429 reg = <1>;
443 reg = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/freescale/
H A Dfsl-ls1043a-qds.dts94 reg = <0x77>;
101 reg = <0x0>;
105 reg = <0x68>;
114 reg = <0x2>;
118 reg = <0x40>;
124 reg = <0x41>;
132 reg = <0x3>;
166 reg = <0>;
224 reg = <0>;
229 reg = <0x1>;
[all …]
/freebsd/sys/dev/sk/
H A Dif_skreg.h144 #define SK_WIN(reg) (((reg) & SK_WIN_MASK) / SK_WIN_LEN) argument
147 #define SK_REG(reg) ((reg) & SK_REG_MASK) argument
594 #define SK_PCI_REG(reg) ((reg) + SK_PCI_BASE) argument
1191 SK_XM_WRITE_4(sc, reg, (SK_XM_READ_4(sc, reg)) | (x))
1194 SK_XM_WRITE_4(sc, reg, (SK_XM_READ_4(sc, reg)) & ~(x))
1197 SK_XM_WRITE_2(sc, reg, (SK_XM_READ_2(sc, reg)) | (x))
1200 SK_XM_WRITE_2(sc, reg, (SK_XM_READ_2(sc, reg)) & ~(x))
1220 SK_YU_WRITE_4(sc, reg, (SK_YU_READ_4(sc, reg)) | (x))
1223 SK_YU_WRITE_4(sc, reg, (SK_YU_READ_4(sc, reg)) & ~(x))
1226 SK_YU_WRITE_2(sc, reg, (SK_YU_READ_2(sc, reg)) | (x))
[all …]
/freebsd/sys/contrib/device-tree/src/arm/realtek/
H A Drtd1195.dtsi26 reg = <0x0>;
33 reg = <0x1>;
106 reg = <0x0 0x1000>;
166 reg = <0x0 0x4>;
172 reg = <0x4 0x4>;
178 reg = <0x8 0x4>;
186 reg = <0x88 0x4>;
199 reg-shift = <2>;
200 reg-io-width = <4>;
211 reg-shift = <2>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm64/marvell/
H A Darmada-cp11x.dtsi88 reg = <0>;
108 reg = <1>;
128 reg = <2>;
146 reg = <0>;
151 reg = <1>;
156 reg = <2>;
161 reg = <3>;
166 reg = <4>;
171 reg = <5>;
302 reg = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/ti/omap/
H A Domap24xx-clocks.dtsi13 reg = <0x4>;
27 reg = <0x4>;
79 reg = <0x0540>;
95 reg = <0x0060>;
105 reg = <0x0060>;
153 reg = <0x0540>;
181 reg = <0x0540>;
197 reg = <0x0070>;
204 reg = <0x0070>;
219 reg = <0x0070>;
[all …]
/freebsd/sys/arm/mv/
H A Da37x0_spi.c147 uint32_t reg; in a37x0_spi_attach() local
284 uint32_t psc, reg; in a37x0_spi_set_clock() local
292 reg &= ~A37X0_SPI_PSC_MASK; in a37x0_spi_set_clock()
293 reg |= psc & A37X0_SPI_PSC_MASK; in a37x0_spi_set_clock()
300 uint32_t reg; in a37x0_spi_set_pins() local
313 uint32_t reg; in a37x0_spi_set_mode() local
321 reg &= ~A37X0_SPI_CLK_POL; in a37x0_spi_set_mode()
322 reg |= A37X0_SPI_CLK_PHASE; in a37x0_spi_set_mode()
325 reg &= ~A37X0_SPI_CLK_PHASE; in a37x0_spi_set_mode()
326 reg |= A37X0_SPI_CLK_POL; in a37x0_spi_set_mode()
[all …]
/freebsd/sys/contrib/device-tree/src/arm/st/
H A Dspear1310.dtsi16 reg = <0xe0700000 0x1000>;
17 st-spics,peripcfg-reg = <0x3b0>;
28 reg = <0xeb800000 0x4000>;
37 reg = <0xeb804000 0x4000>;
46 reg = <0xeb808000 0x4000>;
55 reg = <0xb1000000 0x10000>;
64 reg = <0xb1800000 0x10000>;
73 reg = <0xb4000000 0x10000>;
133 reg = <0x5c400000 0x8000>;
142 reg = <0x5c500000 0x8000>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/renesas/
H A Dr9a06g032.dtsi24 reg = <0>;
31 reg = <1>;
351 reg = <1>;
356 reg = <2>;
361 reg = <3>;
366 reg = <4>;
371 reg = <5>;
390 reg = <0>;
396 reg = <1>;
402 reg = <2>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/synaptics/
H A Dberlin2.dtsi35 reg = <0>;
52 reg = <1>;
149 reg = <0>;
172 reg = <0>;
195 reg = <0>;
213 reg = <0>;
231 reg = <0>;
347 reg = <0>;
353 reg = <1>;
369 reg = <0>;
[all …]
/freebsd/sys/contrib/device-tree/src/arm/marvell/
H A Darmada-381-netgear-gs110emx.dts90 reg = <0>;
152 reg = <0>;
164 reg = <1>;
170 reg = <2>;
176 reg = <3>;
182 reg = <4>;
188 reg = <5>;
194 reg = <6>;
200 reg = <7>;
206 reg = <8>;
[all …]
/freebsd/sys/dev/etherswitch/arswitch/
H A Darswitch_phy.c82 __func__, phy, reg, ret); in arswitch_readphy_external()
97 reg, data); in arswitch_writephy_external()
100 __func__, phy, reg, data); in arswitch_writephy_external()
123 if (reg < 0 || reg >= 32) in arswitch_readphy_internal()
136 (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT)); in arswitch_readphy_internal()
148 phy, reg, timeout); in arswitch_readphy_internal()
157 __func__, phy, reg, data); in arswitch_readphy_internal()
166 __func__, phy, reg, err); in arswitch_readphy_internal()
182 if (reg < 0 || reg >= 32) in arswitch_writephy_internal()
196 (reg << AR8X16_MDIO_CTRL_REG_ADDR_SHIFT) | in arswitch_writephy_internal()
[all …]

12345678910>>...399