/qemu/hw/rtc/ |
H A D | twl92230.c | 71 } rtc; member 85 timer_mod(s->rtc.hz_tm, s->rtc.next); in menelaus_rtc_start() 98 qemu_get_timedate(&s->rtc.tm, s->rtc.sec_offset); in menelaus_rtc_update() 104 s->rtc.alm_sec = qemu_timedate_diff(&s->rtc.alm) - s->rtc.sec_offset; in menelaus_alm_update() 112 s->rtc.alm_sec --; in menelaus_rtc_hz() 114 timer_mod(s->rtc.hz_tm, s->rtc.next); in menelaus_rtc_hz() 117 if (((s->rtc.ctrl >> 3) & 3) == 1 && !s->rtc.tm.tm_sec) in menelaus_rtc_hz() 119 else if (((s->rtc.ctrl >> 3) & 3) == 2 && !s->rtc.tm.tm_min) in menelaus_rtc_hz() 131 s->rtc.next -= muldiv64((int16_t) s->rtc.comp, 1000, 0x8000); in menelaus_rtc_hz() 577 if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11) in menelaus_write() [all …]
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H A D | aspeed_rtc.c | 31 uint32_t reg1 = rtc->reg[COUNTER1]; in aspeed_rtc_calc_offset() 32 uint32_t reg2 = rtc->reg[COUNTER2]; in aspeed_rtc_calc_offset() 52 qemu_get_timedate(&now, rtc->offset); in aspeed_rtc_get_counter() 71 AspeedRtcState *rtc = opaque; in aspeed_rtc_read() local 79 rtc->reg[r] = aspeed_rtc_get_counter(rtc, r); in aspeed_rtc_read() 83 val = rtc->reg[r]; in aspeed_rtc_read() 100 AspeedRtcState *rtc = opaque; in aspeed_rtc_write() local 111 rtc->reg[r] = val; in aspeed_rtc_write() 112 aspeed_rtc_calc_offset(rtc); in aspeed_rtc_write() 127 rtc->offset = 0; in aspeed_rtc_reset() [all …]
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H A D | meson.build | 8 system_ss.add(when: 'CONFIG_XLNX_ZYNQMP', if_true: files('xlnx-zynqmp-rtc.c')) 11 system_ss.add(when: 'CONFIG_SUN4V_RTC', if_true: files('sun4v-rtc.c')) 15 system_ss.add(when: 'CONFIG_ALLWINNER_H3', if_true: files('allwinner-rtc.c'))
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H A D | trace-events | 3 # allwinner-rtc.c 7 # sun4v-rtc.c 11 # xlnx-zynqmp-rtc.c
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/qemu/hw/m68k/ |
H A D | next-cube.c | 110 NextRtc rtc; member 148 NextRtc *rtc = &s->rtc; in next_scr2_rtc_update() local 162 rtc->command = (rtc->command << 1) | in next_scr2_rtc_update() 165 if (rtc->phase >= 8 && rtc->phase < 16) { in next_scr2_rtc_update() 166 rtc->value = (rtc->value << 1) | in next_scr2_rtc_update() 172 if (rtc->ram[rtc->command] & (0x80 >> (rtc->phase - 8))) { in next_scr2_rtc_update() 176 rtc->retval = (rtc->retval << 1) | in next_scr2_rtc_update() 187 rtc->retval = (rtc->retval << 1) | in next_scr2_rtc_update() 196 rtc->retval = (rtc->retval << 1) | in next_scr2_rtc_update() 232 rtc->retval = (rtc->retval << 1) | in next_scr2_rtc_update() [all …]
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/qemu/hw/ppc/ |
H A D | spapr_rtc.c | 39 void spapr_rtc_read(SpaprRtcState *rtc, struct tm *tm, uint32_t *ns) in spapr_rtc_read() argument 45 assert(rtc); in spapr_rtc_read() 47 guest_ns = host_ns + rtc->ns_offset; in spapr_rtc_read() 60 if (!rtc) { in spapr_rtc_import_offset() 64 rtc->ns_offset = legacy_offset * NANOSECONDS_PER_SECOND; in spapr_rtc_import_offset() 82 spapr_rtc_read(&spapr->rtc, &tm, &ns); in rtas_get_time_of_day() 99 SpaprRtcState *rtc = &spapr->rtc; in rtas_set_time_of_day() local 124 qom_path = object_get_canonical_path(OBJECT(rtc)); in rtas_set_time_of_day() 129 rtc->ns_offset = (new_s * NANOSECONDS_PER_SECOND) - host_ns; in rtas_set_time_of_day() 141 SpaprRtcState *rtc = SPAPR_RTC(dev); in spapr_rtc_realize() local [all …]
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H A D | prep.c | 218 MC146818RtcState *rtc = MC146818_RTC(dev); in prep_set_cmos_checksum() local 219 mc146818rtc_set_cmos_data(rtc, 0x2e, checksum & 0xff); in prep_set_cmos_checksum() 220 mc146818rtc_set_cmos_data(rtc, 0x3e, checksum & 0xff); in prep_set_cmos_checksum() 221 mc146818rtc_set_cmos_data(rtc, 0x2f, checksum >> 8); in prep_set_cmos_checksum() 222 mc146818rtc_set_cmos_data(rtc, 0x3f, checksum >> 8); in prep_set_cmos_checksum() 224 object_property_add_alias(qdev_get_machine(), "rtc-time", OBJECT(rtc), in prep_set_cmos_checksum()
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/qemu/hw/i386/ |
H A D | monitor.c | 40 if (x86ms->rtc) { in qmp_rtc_reset_reinjection() 41 rtc_reset_reinjection(MC146818_RTC(x86ms->rtc)); in qmp_rtc_reset_reinjection() 44 assert(!x86ms->rtc); in qmp_rtc_reset_reinjection()
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H A D | microvm.c | 269 if (mms->rtc == ON_OFF_AUTO_ON || in microvm_devices_init() 270 (mms->rtc == ON_OFF_AUTO_AUTO && !kvm_enabled())) { in microvm_devices_init() 493 OnOffAuto rtc = mms->rtc; in microvm_machine_get_rtc() local 495 visit_type_OnOffAuto(v, name, &rtc, errp); in microvm_machine_get_rtc() 503 visit_type_OnOffAuto(v, name, &mms->rtc, errp); in microvm_machine_set_rtc() 613 mms->rtc = ON_OFF_AUTO_AUTO; in microvm_machine_initfn()
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H A D | x86-common.c | 120 MC146818RtcState *rtc = MC146818_RTC(s); in x86_rtc_set_cpus_count() local 128 mc146818rtc_set_cmos_data(rtc, 0x5f, 0); in x86_rtc_set_cpus_count() 130 mc146818rtc_set_cmos_data(rtc, 0x5f, cpus_count - 1); in x86_rtc_set_cpus_count() 178 if (x86ms->rtc) { in x86_cpu_plug() 179 x86_rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); in x86_cpu_plug() 234 x86_rtc_set_cpus_count(x86ms->rtc, x86ms->boot_cpus); in x86_cpu_unplug_cb()
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/qemu/hw/timer/ |
H A D | stellaris-gptm.c | 83 s->rtc++; in gptm_tick() 85 if (s->rtc > match) in gptm_tick() 86 s->rtc = 0; in gptm_tick() 87 if (s->rtc == 0) { in gptm_tick() 141 return s->rtc; in gptm_read() 264 VMSTATE_UINT32(rtc, gptm_state),
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/qemu/hw/intc/ |
H A D | riscv_aclint.c | 67 uint64_t rtc = cpu_riscv_read_rtc(mtimer); in riscv_aclint_mtimer_write_timecmp() local 73 if (mtimer->timecmp[hartid] <= rtc) { in riscv_aclint_mtimer_write_timecmp() 84 diff = mtimer->timecmp[hartid] - rtc; in riscv_aclint_mtimer_write_timecmp() 153 uint64_t rtc = cpu_riscv_read_rtc(mtimer); in riscv_aclint_mtimer_read() local 154 return (size == 4) ? (rtc & 0xFFFFFFFF) : rtc; in riscv_aclint_mtimer_read() 211 uint64_t rtc = cpu_riscv_read_rtc(mtimer); in riscv_aclint_mtimer_write() local 216 mtimer->time_delta = ((rtc & ~0xFFFFFFFFULL) | value) - rtc_r; in riscv_aclint_mtimer_write() 224 mtimer->time_delta = (value << 32 | (rtc & 0xFFFFFFFF)) - rtc_r; in riscv_aclint_mtimer_write()
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/qemu/hw/arm/ |
H A D | musca.c | 81 PL031State rtc; member 279 PL031State *rtc = opaque; in make_rtc() local 281 object_initialize_child(OBJECT(mms), name, rtc, TYPE_PL031); in make_rtc() 282 sysbus_realize(SYS_BUS_DEVICE(rtc), &error_fatal); in make_rtc() 283 sysbus_connect_irq(SYS_BUS_DEVICE(rtc), 0, get_sse_irq_in(mms, 39)); in make_rtc() 284 return sysbus_mmio_get_region(SYS_BUS_DEVICE(rtc), 0); in make_rtc() 330 { "rtc", make_rtc, &mms->rtc, 0x8000, 0x1000 }, in make_musca_a_devs() 495 { "rtc", make_rtc, &mms->rtc, 0x4010d000, 0x1000 }, in musca_init()
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H A D | allwinner-a10.c | 91 object_initialize_child(obj, "rtc", &s->rtc, TYPE_AW_RTC_SUN4I); in aw_a10_init() 190 sysbus_realize(SYS_BUS_DEVICE(&s->rtc), &error_fatal); in aw_a10_realize() 191 sysbus_mmio_map_overlap(SYS_BUS_DEVICE(&s->rtc), 0, AW_A10_RTC_BASE, 10); in aw_a10_realize()
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H A D | mps3r.c | 117 PL031State rtc; member 541 object_initialize_child(OBJECT(mms), "rtc", &mms->rtc, TYPE_PL031); in mps3r_common_init() 542 sysbus_realize(SYS_BUS_DEVICE(&mms->rtc), &error_fatal); in mps3r_common_init() 543 sysbus_mmio_map(SYS_BUS_DEVICE(&mms->rtc), 0, 0xe020a000); in mps3r_common_init() 544 sysbus_connect_irq(SYS_BUS_DEVICE(&mms->rtc), 0, in mps3r_common_init()
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/qemu/hw/isa/ |
H A D | piix.c | 342 qdev_prop_set_int32(DEVICE(&d->rtc), "base_year", 2000); in pci_piix_realize() 343 if (!qdev_realize(DEVICE(&d->rtc), BUS(isa_bus), errp)) { in pci_piix_realize() 346 irq = object_property_get_uint(OBJECT(&d->rtc), "irq", &error_fatal); in pci_piix_realize() 347 isa_connect_gpio_out(ISA_DEVICE(&d->rtc), 0, irq); in pci_piix_realize() 408 object_initialize_child(obj, "rtc", &d->rtc, TYPE_MC146818_RTC); in pci_piix_init()
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H A D | vt82c686.c | 599 MC146818RtcState rtc; member 621 object_initialize_child(obj, "rtc", &s->rtc, TYPE_MC146818_RTC); in via_isa_init() 738 qdev_prop_set_int32(DEVICE(&s->rtc), "base_year", 2000); in via_isa_realize() 739 if (!qdev_realize(DEVICE(&s->rtc), BUS(isa_bus), errp)) { in via_isa_realize() 742 isa_connect_gpio_out(ISA_DEVICE(&s->rtc), 0, s->rtc.isairq); in via_isa_realize()
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H A D | lpc_ich9.c | 675 object_initialize_child(obj, "rtc", &lpc->rtc, TYPE_MC146818_RTC); in ich9_lpc_initfn() 744 qdev_prop_set_int32(DEVICE(&lpc->rtc), "base_year", 2000); in ich9_lpc_realize() 745 if (!qdev_realize(DEVICE(&lpc->rtc), BUS(isa_bus), errp)) { in ich9_lpc_realize() 748 irq = object_property_get_uint(OBJECT(&lpc->rtc), "irq", &error_fatal); in ich9_lpc_realize() 749 isa_connect_gpio_out(ISA_DEVICE(&lpc->rtc), 0, irq); in ich9_lpc_realize()
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/qemu/include/hw/i386/ |
H A D | x86.h | 50 ISADevice *rtc; member 118 void x86_rtc_set_cpus_count(ISADevice *rtc, uint16_t cpus_count);
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H A D | microvm.h | 87 OnOffAuto rtc; member
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/qemu/hw/misc/ |
H A D | cbus.c | 170 } rtc; member 262 return s->rtc.cal; in retu_read() 329 s->rtc.cal = val; in retu_write() 398 s->rtc.cal = 0x01; in retu_init()
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/qemu/hw/mips/ |
H A D | jazz.c | 183 MemoryRegion *rtc = g_new(MemoryRegion, 1); in mips_jazz_init() local 360 memory_region_init_io(rtc, NULL, &rtc_ops, NULL, "rtc", 0x1000); in mips_jazz_init() 361 memory_region_add_subregion(address_space, 0x80004000, rtc); in mips_jazz_init()
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/qemu/include/hw/timer/ |
H A D | stellaris-gptm.h | 41 uint32_t rtc; member
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/qemu/include/hw/arm/ |
H A D | allwinner-a10.h | 43 AwRtcState rtc; member
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/qemu/include/hw/southbridge/ |
H A D | piix.h | 58 MC146818RtcState rtc; member
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