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Searched refs:t1 (Results 1 – 25 of 104) sorted by last modified time

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/qemu/tcg/loongarch64/
H A Dtcg-target.c.inc50 "t1",
/qemu/tcg/
H A Dtcg.c2342 tcg_gen_callN(func, info, ret, &t1); in tcg_gen_call1()
2346 TCGTemp *t1, TCGTemp *t2) in tcg_gen_call2() argument
2348 TCGTemp *args[2] = { t1, t2 }; in tcg_gen_call2()
2353 TCGTemp *t1, TCGTemp *t2, TCGTemp *t3) in tcg_gen_call3() argument
2355 TCGTemp *args[3] = { t1, t2, t3 }; in tcg_gen_call3()
2360 TCGTemp *t1, TCGTemp *t2, TCGTemp *t3, TCGTemp *t4) in tcg_gen_call4() argument
2362 TCGTemp *args[4] = { t1, t2, t3, t4 }; in tcg_gen_call4()
2369 TCGTemp *args[5] = { t1, t2, t3, t4, t5 }; in tcg_gen_call5()
2374 TCGTemp *t1, TCGTemp *t2, TCGTemp *t3, in tcg_gen_call6() argument
2377 TCGTemp *args[6] = { t1, t2, t3, t4, t5, t6 }; in tcg_gen_call6()
[all …]
H A Doptimize.c930 TCGArg t1 = arg_new_temp(ctx); in do_constant_folding_cond2() local
933 op1->args[0] = t1; in do_constant_folding_cond2()
940 args[0] = t1; in do_constant_folding_cond2()
1026 uint64_t t1 = arg_info(op->args[1])->val; in fold_const2() local
1029 t1 = do_constant_folding(op->opc, ctx->type, t1, t2); in fold_const2()
1030 return tcg_opt_gen_movi(ctx, op, op->args[0], t1); in fold_const2()
1597 uint64_t t1 = arg_info(op->args[1])->val; in fold_deposit() local
1600 t1 = deposit64(t1, op->args[3], op->args[4], t2); in fold_deposit()
1601 return tcg_opt_gen_movi(ctx, op, op->args[0], t1); in fold_deposit()
H A Dtcg-op-gvec.c715 fni(t1, t0); in expand_2_i32()
735 fni(t1, t0, c); in expand_2i_i32()
779 fni(t2, t0, t1); in expand_3_i32()
878 fni(t1, t0); in expand_2_i64()
898 fni(t1, t0, c); in expand_2i_i64()
942 fni(t2, t0, t1); in expand_3_i64()
1897 tcg_gen_add_i32(t1, t1, b); in tcg_gen_vec_add16_i32()
1911 tcg_gen_add_i64(t1, t1, b); in tcg_gen_vec_add32_i64()
2080 tcg_gen_sub_i32(t1, a, t1); in tcg_gen_vec_sub16_i32()
2094 tcg_gen_sub_i64(t1, a, t1); in tcg_gen_vec_sub32_i64()
[all …]
H A Dtci.c376 tcg_target_ulong t1; in tcg_qemu_tb_exec() local
479 tci_args_ri(insn, &r0, &t1); in tcg_qemu_tb_exec()
480 regs[r0] = t1; in tcg_qemu_tb_exec()
H A Dtcg-op.c711 tcg_gen_clz_i64(t1, t1, t2); in tcg_gen_clz_i32()
735 tcg_gen_ctz_i64(t1, t1, t2); in tcg_gen_ctz_i32()
818 tcg_gen_shr_i32(t1, arg1, t1); in tcg_gen_rotl_i32()
856 tcg_gen_shl_i32(t1, arg1, t1); in tcg_gen_rotr_i32()
912 tcg_gen_shli_i32(t1, t1, ofs); in tcg_gen_deposit_i32()
1330 tcg_gen_sari_i32(t1, t1, 16); /* t1 = ssb. */ in tcg_gen_bswap16_i32()
1333 tcg_gen_shli_i32(t1, t1, 8); /* t1 = ..b. */ in tcg_gen_bswap16_i32()
1364 tcg_gen_shli_i32(t1, t1, 8); /* t1 = b.d. */ in tcg_gen_bswap32_i32()
2556 tcg_gen_shr_i64(t1, arg1, t1); in tcg_gen_rotl_i64()
2593 tcg_gen_shl_i64(t1, arg1, t1); in tcg_gen_rotr_i64()
[all …]
/qemu/target/mips/tcg/
H A Dtranslate.c2016 tcg_gen_shli_tl(t1, t1, 3); in gen_lxl()
2021 tcg_gen_andc_tl(t1, reg, t1); in gen_lxl()
2043 tcg_gen_shli_tl(t1, t1, 3); in gen_lxr()
2049 tcg_gen_and_tl(t1, reg, t1); in gen_lxr()
3092 tcg_gen_movcond_tl(TCG_COND_EQ, t1, t1, t2, t3, t1); in gen_r6_muldiv()
3103 tcg_gen_movcond_tl(TCG_COND_EQ, t1, t1, t2, t3, t1); in gen_r6_muldiv()
3181 tcg_gen_movcond_tl(TCG_COND_EQ, t1, t1, t2, t3, t1); in gen_r6_muldiv()
3189 tcg_gen_movcond_tl(TCG_COND_EQ, t1, t1, t2, t3, t1); in gen_r6_muldiv()
3256 tcg_gen_movcond_tl(TCG_COND_EQ, t1, t1, t2, t3, t1); in gen_div1_tx79()
3312 tcg_gen_movcond_tl(TCG_COND_EQ, t1, t1, t2, t3, t1); in gen_muldiv()
[all …]
/qemu/target/openrisc/
H A Dtranslate.c309 tcg_gen_negsetcond_i64(TCG_COND_NE, t1, t1, high); in gen_muld()
344 tcg_gen_mul_i64(t1, t1, t2); in gen_mac()
349 tcg_gen_xor_i64(t1, t1, cpu_mac); in gen_mac()
350 tcg_gen_andc_i64(t1, t1, t2); in gen_mac()
368 tcg_gen_mul_i64(t1, t1, t2); in gen_macu()
372 tcg_gen_setcond_i64(TCG_COND_LTU, t1, cpu_mac, t1); in gen_macu()
385 tcg_gen_mul_i64(t1, t1, t2); in gen_msb()
390 tcg_gen_xor_i64(t1, t1, cpu_mac); in gen_msb()
391 tcg_gen_and_i64(t1, t1, t2); in gen_msb()
409 tcg_gen_mul_i64(t1, t1, t2); in gen_msbu()
[all …]
/qemu/target/ppc/
H A Dtranslate.c481 tcg_gen_or_tl(t1, t1, t0); in spr_write_CTRL_ST()
1893 tcg_gen_movcond_i32(TCG_COND_EQ, t1, t1, t3, t2, t1); in gen_op_arith_modw()
1933 tcg_gen_movcond_i64(TCG_COND_EQ, t1, t1, t3, t2, t1); in gen_op_arith_modd()
3420 tcg_gen_andi_i32(t1, t1, 0x7F); in gen_stswx()
4593 tcg_gen_shli_i32(t1, t1, 2); in gen_mcrxr()
5380 tcg_gen_ext16s_tl(t1, t1); in gen_405_mulladd_insn()
5388 tcg_gen_ext16u_tl(t1, t1); in gen_405_mulladd_insn()
5399 tcg_gen_ext16s_tl(t1, t1); in gen_405_mulladd_insn()
5408 tcg_gen_ext16u_tl(t1, t1); in gen_405_mulladd_insn()
5429 tcg_gen_mul_tl(t1, t0, t1); in gen_405_mulladd_insn()
[all …]
/qemu/target/s390x/tcg/
H A Dtranslate.c2009 TCGv_i32 t1, t2; in op_clcl() local
2028 TCGv_i32 t1, t3; in op_clcle() local
2047 TCGv_i32 t1, t3; in op_clclu() local
2554 TCGv_i64 t1, t2; in op_ipm() local
2561 tcg_gen_deposit_i64(t1, t1, t2, 4, 60); in op_ipm()
2987 TCGv_i64 t1, t2; in op_lpswe() local
3015 TCGv_i64 t1, t2; in op_lm32() local
3055 TCGv_i64 t1, t2; in op_lmh() local
3095 TCGv_i64 t1, t2; in op_lm64() local
3282 TCGv_i32 t1, t2; in op_mvcl() local
[all …]
/qemu/target/sparc/
H A Dtranslate.c742 tcg_gen_mul_i32(t1, t1, t2); in gen_op_fmuld8ulx16()
765 tcg_gen_andi_i32(t1, t1, ~0xff); in gen_op_fmuld8sux16()
767 tcg_gen_mul_i32(t1, t1, t2); in gen_op_fmuld8sux16()
930 tcg_gen_ext32u_tl(t1, t1); in gen_compare()
938 tcg_gen_ext32s_tl(t1, t1); in gen_compare()
953 tcg_gen_and_tl(t1, t1, cpu_cc_Z); in gen_compare()
956 tcg_gen_subi_tl(t1, t1, 1); in gen_compare()
957 tcg_gen_and_tl(t1, t1, cpu_icc_Z); in gen_compare()
958 tcg_gen_ext32u_tl(t1, t1); in gen_compare()
3417 tcg_gen_divu_i64(t1, t1, t2); in trans_UDIV()
[all …]
/qemu/target/tricore/
H A Dtranslate.c428 tcg_gen_andc_i64(t1, t1, t0); in gen_add64_d()
499 tcg_gen_mul_i64(t1, t1, t3); in gen_madd32_d()
500 tcg_gen_add_i64(t1, t2, t1); in gen_madd32_d()
566 tcg_gen_mul_i64(t1, t1, t3); in gen_maddu64_d()
1008 tcg_gen_or_i64(t1, t1, t2); in gen_madd32_q()
1116 gen_helper_add64_ssov(t1, tcg_env, t1, t2); in gen_m16adds64_q()
1209 tcg_gen_mul_i64(t1, t1, t3); in gen_msub32_d()
1210 tcg_gen_sub_i64(t1, t2, t1); in gen_msub32_d()
1285 tcg_gen_mul_i64(t1, t1, t3); in gen_msubu64_d()
1450 tcg_gen_and_i64(t1, t1, t0); in gen_sub64_d()
[all …]
/qemu/target/m68k/
H A Dtranslate.c534 TCGv t0, t1; in gen_flush_flags() local
1591 TCGv t0, t1; in bcd_add() local
1616 tcg_gen_add_i32(t1, t1, QREG_CC_X); in bcd_add()
1672 tcg_gen_addi_i32(t1, t1, 1); in bcd_sub()
1673 tcg_gen_sub_i32(t1, t1, QREG_CC_X); in bcd_sub()
3791 TCGv t0, t1; in DISAS_INSN() local
3811 tcg_gen_remu_i32(t1, t0, t1); in DISAS_INSN()
3822 TCGv t0, t1; in DISAS_INSN() local
3842 tcg_gen_remu_i32(t1, t0, t1); in DISAS_INSN()
3854 TCGv t0, t1; in DISAS_INSN() local
[all …]
/qemu/target/sh4/
H A Dtranslate.c697 TCGv t0, t1; in _decode_opc() local
699 t1 = tcg_temp_new(); in _decode_opc()
709 TCGv result, t1, t2; in _decode_opc() local
712 t1 = tcg_temp_new(); in _decode_opc()
775 tcg_gen_subi_i32(t1, t1, 1); in _decode_opc()
778 tcg_gen_add2_i32(REG(B11_8), t1, REG(B11_8), zero, t2, t1); in _decode_opc()
781 tcg_gen_andi_i32(t1, t1, 1); in _decode_opc()
782 tcg_gen_xor_i32(t1, t1, t0); in _decode_opc()
924 TCGv t0, t1; in _decode_opc() local
926 t1 = tcg_temp_new(); in _decode_opc()
[all …]
/qemu/target/xtensa/
H A Dtranslate.c431 TCGv_i32 t0, TCGv_i32 t1, uint32_t addr) in gen_brcond() argument
435 tcg_gen_brcond_i32(cond, t0, t1, label); in gen_brcond()
442 TCGv_i32 t0, uint32_t t1, uint32_t addr) in gen_brcondi() argument
444 gen_brcond(dc, cond, t0, tcg_constant_i32(t1), addr); in gen_brcondi()
/qemu/target/i386/tcg/
H A Dtranslate.c2418 TCGv_i128 t1 = tcg_temp_new_i128(); in gen_ldy_env_A0() local
2422 tcg_gen_qemu_ld_i128(t1, s->tmp0, mem_index, mop); in gen_ldy_env_A0()
2425 tcg_gen_st_i128(t1, tcg_env, offset + offsetof(YMMReg, YMM_X(1))); in gen_ldy_env_A0()
2498 TCGv_i64 t0, t1; in gen_cmpxchg16b() local
2519 t1 = tcg_temp_new_i64(); in gen_cmpxchg16b()
2521 tcg_gen_xor_i64(t1, s->T1, cpu_regs[R_EDX]); in gen_cmpxchg16b()
2522 tcg_gen_or_i64(t0, t0, t1); in gen_cmpxchg16b()
/qemu/target/arm/tcg/
H A Dtranslate.c449 tcg_gen_andi_i32(t1, t1, ~0x8000); in gen_add16()
2610 tcg_gen_sari_i32(t1, t1, 16); in gen_mulxy()
5809 tcg_gen_mul_i32(t1, t1, t2); in op_mla()
5812 tcg_gen_add_i32(t1, t1, t2); in op_mla()
5840 tcg_gen_mul_i32(t1, t1, t2); in trans_MLS()
5842 tcg_gen_sub_i32(t1, t2, t1); in trans_MLS()
5931 gen_helper_add_saturate(t1, tcg_env, t1, t1); in op_qaddsub()
7202 gen_helper_usad8(t1, t1, t2); in trans_USADA8()
7205 tcg_gen_add_i32(t1, t1, t2); in trans_USADA8()
7617 tcg_gen_sub_i32(t1, t1, t2); in op_smlad()
[all …]
H A Dtranslate-a64.c805 tcg_gen_xor_i64(tmp, t0, t1); in gen_add64_CC()
820 tcg_gen_extrl_i64_i32(t1_32, t1); in gen_add32_CC()
832 gen_add64_CC(dest, t0, t1); in gen_add_CC()
834 gen_add32_CC(dest, t0, t1); in gen_add_CC()
846 tcg_gen_sub_i64(result, t0, t1); in gen_sub64_CC()
855 tcg_gen_xor_i64(tmp, t0, t1); in gen_sub64_CC()
883 gen_sub64_CC(dest, t0, t1); in gen_sub_CC()
885 gen_sub32_CC(dest, t0, t1); in gen_sub_CC()
894 tcg_gen_add_i64(dest, t0, t1); in gen_adc()
2744 TCGv_i64 t1 = cpu_reg(s, rt); in gen_compare_and_swap_pair() local
[all …]
/qemu/target/cris/
H A Dtranslate_v10.c.inc73 TCGv t1 = tcg_temp_new();
81 tcg_gen_andi_tl(t1, cpu_PR[PR_CCS], F_FLAG_V10);
82 tcg_gen_brcondi_tl(TCG_COND_NE, t1, 0, l1);
87 tcg_gen_shri_tl(t1, t1, 1); /* shift F to P position */
88 tcg_gen_or_tl(cpu_PR[PR_CCS], cpu_PR[PR_CCS], t1); /*P=F*/
/qemu/target/hppa/
H A Dtranslate.c386 TCGv_i64 t1 = tcg_temp_new_i64(); in cond_make_vv() local
389 tcg_gen_mov_i64(t1, a1); in cond_make_vv()
390 return cond_make_tt(c, t0, t1); in cond_make_vv()
948 TCGv_i64 t1 = tcg_temp_new_i64(); in do_sub_cond() local
952 tcg_gen_ext32u_i64(t1, in1); in do_sub_cond()
955 tcg_gen_ext32s_i64(t1, in1); in do_sub_cond()
958 return cond_make_tt(tc, t1, t2); in do_sub_cond()
3266 TCGv_i64 r, t0, t1, t2, t3; in trans_permh() local
3276 t1 = tcg_temp_new_i64(); in trans_permh()
4027 TCGv_i64 t1 = tcg_temp_new_i64(); in trans_blr() local
[all …]
/qemu/target/avr/
H A Dtranslate.c214 TCGv t1 = tcg_temp_new_i32(); in gen_add_CHf() local
221 tcg_gen_or_tl(t1, t1, t2); /* t1 = t1 | t2 | t3 */ in gen_add_CHf()
222 tcg_gen_or_tl(t1, t1, t3); in gen_add_CHf()
231 TCGv t1 = tcg_temp_new_i32(); in gen_add_Vf() local
236 tcg_gen_xor_tl(t1, Rd, R); in gen_add_Vf()
238 tcg_gen_andc_tl(t1, t1, t2); in gen_add_Vf()
245 TCGv t1 = tcg_temp_new_i32(); in gen_sub_CHf() local
262 TCGv t1 = tcg_temp_new_i32(); in gen_sub_Vf() local
267 tcg_gen_xor_tl(t1, Rd, R); in gen_sub_Vf()
269 tcg_gen_and_tl(t1, t1, t2); in gen_sub_Vf()
[all …]
/qemu/migration/
H A Dram.c3188 uint64_t t1 = (qemu_clock_get_ns(QEMU_CLOCK_REALTIME) - t0) / in ram_save_iterate() local
3190 if (t1 > MAX_WAIT) { in ram_save_iterate()
3191 trace_ram_save_iterate_big_wait(t1, i); in ram_save_iterate()
/qemu/tcg/i386/
H A Dtcg-target.c.inc3815 tcg_gen_sari_vec(MO_16, t1, t1, imm + 8);
3845 tcg_gen_shli_vec(MO_64, t1, t1, 64 - imm);
3955 tcg_gen_mul_vec(MO_16, t1, t1, t2);
3956 tcg_gen_shri_vec(MO_16, t1, t1, 8);
3978 tcg_gen_mul_vec(MO_16, t1, t1, t2);
3980 tcg_gen_shri_vec(MO_16, t1, t1, 8);
4059 t1 = v1, v1 = v2, v2 = t1;
4063 t1 = t2 = NULL;
4071 v2 = t1;
4079 v1 = t1;
[all …]
/qemu/util/
H A Dbufferiszero.c212 uint32x4_t t0, t1, t2, t3; in buffer_is_zero_simd() local
222 t1 = e[-7] | e[-6]; in buffer_is_zero_simd()
226 REASSOC_BARRIER(t0, t1); in buffer_is_zero_simd()
228 t0 |= t1; in buffer_is_zero_simd()
248 t1 = p[2] | p[3]; in buffer_is_zero_simd()
251 REASSOC_BARRIER(t0, t1); in buffer_is_zero_simd()
253 t0 |= t1; in buffer_is_zero_simd()
/qemu/tests/avocado/
H A Dreplay_kernel.py76 t1 = self.run_vm(kernel_path, kernel_command_line, console_pattern,
81 logger.info('replay overhead {:.2%}'.format(t2 / t1 - 1))

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