/qemu/common-user/host/loongarch64/ |
H A D | safe-syscall.inc.S | 45 move $t1, $a1 /* syscall number */ 52 move $a7, $t1 73 ld.w $t1, $a6, 0 74 bnez $t1, 2f
|
/qemu/tcg/ |
H A D | tcg-op-ldst.c | 835 tcg_gen_movcond_i32(TCG_COND_EQ, t2, t1, t2, newv, t1); in tcg_gen_nonatomic_cmpxchg_i32_int() 844 tcg_temp_free_i32(t1); in tcg_gen_nonatomic_cmpxchg_i32_int() 898 TCGv_i64 t1, t2; in tcg_gen_nonatomic_cmpxchg_i64_int() local 911 t1 = tcg_temp_ebb_new_i64(); in tcg_gen_nonatomic_cmpxchg_i64_int() 917 tcg_gen_movcond_i64(TCG_COND_EQ, t2, t1, t2, newv, t1); in tcg_gen_nonatomic_cmpxchg_i64_int() 926 tcg_temp_free_i64(t1); in tcg_gen_nonatomic_cmpxchg_i64_int() 1047 tcg_temp_free_i64(t1); in tcg_gen_nonatomic_cmpxchg_i128_int() 1115 gen(t2, t1, t2); in do_nonatomic_op_i32() 1119 tcg_temp_free_i32(t1); in do_nonatomic_op_i32() 1156 gen(t2, t1, t2); in do_nonatomic_op_i64() [all …]
|
/qemu/util/ |
H A D | bufferiszero.c | 212 uint32x4_t t0, t1, t2, t3; in buffer_is_zero_simd() local 222 t1 = e[-7] | e[-6]; in buffer_is_zero_simd() 226 REASSOC_BARRIER(t0, t1); in buffer_is_zero_simd() 228 t0 |= t1; in buffer_is_zero_simd() 248 t1 = p[2] | p[3]; in buffer_is_zero_simd() 251 REASSOC_BARRIER(t0, t1); in buffer_is_zero_simd() 253 t0 |= t1; in buffer_is_zero_simd()
|
H A D | qsp.c | 364 int64_t t0, t1; \ 368 t1 = get_clock(); \ 371 qsp_entry_record(e, t1 - t0); \ 378 int64_t t0, t1; \ 383 t1 = get_clock(); \ 406 int64_t t0, t1; in QSP_GEN_VOID() local 410 t1 = get_clock(); in QSP_GEN_VOID() 413 qsp_entry_record(e, t1 - t0); in QSP_GEN_VOID() 421 int64_t t0, t1; in qsp_cond_timedwait() local 426 t1 = get_clock(); in qsp_cond_timedwait() [all …]
|
/qemu/target/ppc/translate/ |
H A D | spe-impl.c.inc | 424 TCGv_i64 t0, t1; 432 t1 = tcg_temp_new_i64(); 434 /* t0 := rA; t1 := rB */ 437 tcg_gen_extu_tl_i64(t1, cpu_gpr[rB(ctx->opcode)]); 438 tcg_gen_ext32u_i64(t1, t1); 440 tcg_gen_mul_i64(t0, t0, t1); /* t0 := rA * rB */ 496 TCGv_i64 t0, t1; 504 t1 = tcg_temp_new_i64(); 506 /* t0 := rA; t1 := rB */ 510 tcg_gen_ext32s_i64(t1, t1); [all …]
|
H A D | fixedpoint-impl.c.inc | 451 TCGv t1 = tcg_temp_new(); 465 TCGv t1 = tcg_temp_new(); 494 TCGv_i32 t1 = tcg_temp_new_i32(); 497 helper(t0, t1, t0, t1); 660 tcg_gen_add2_i64(t1, cpu_gpr[a->vrt], lo, hi, cpu_gpr[a->rc], t1); 778 TCGv_i32 t1; 784 t1 = tcg_constant_i32(a->rt); 811 TCGv_i32 t1; 817 t1 = tcg_constant_i32(a->rt); 1152 TCGv_i64 t0, t1; [all …]
|
H A D | storage-ctrl-impl.c.inc | 178 TCGv_i32 t1; 245 t1 = tcg_temp_new_i32(); 246 tcg_gen_ld_i32(t1, tcg_env, offsetof(CPUPPCState, tlb_need_flush)); 247 tcg_gen_ori_i32(t1, t1, TLB_NEED_GLOBAL_FLUSH); 248 tcg_gen_st_i32(t1, tcg_env, offsetof(CPUPPCState, tlb_need_flush));
|
/qemu/tests/qtest/ |
H A D | rtas-test.c | 14 time_t t1, t2; in run_test_rtas_get_time_of_day() local 18 t1 = time(NULL); in run_test_rtas_get_time_of_day() 22 g_assert(t2 - t1 < 5); /* 5 sec max to run the test */ in run_test_rtas_get_time_of_day()
|
/qemu/common-user/host/mips/ |
H A D | safe-syscall.inc.S | 110 lw t1, 0(s0) 111 bnez t1, 2f 142 SETUP_GPX(t1) 143 SETUP_GPX64(t0, t1)
|
/qemu/target/s390x/tcg/ |
H A D | translate_vx.c.inc | 534 tcg_gen_hswap_i64(t1, t1); 538 tcg_gen_wswap_i64(t1, t1); 605 tcg_gen_hswap_i64(t1, t1); 609 tcg_gen_wswap_i64(t1, t1); 1125 tcg_gen_hswap_i64(t1, t1); 1129 tcg_gen_wswap_i64(t1, t1); 1183 tcg_gen_hswap_i64(t1, t1); 1187 tcg_gen_wswap_i64(t1, t1); 1309 tcg_gen_add_i64(t1, t1, t2); 1314 tcg_gen_and_i64(t1, t1, t3); [all …]
|
H A D | translate.c | 1941 TCGv_i32 t1, t2; in op_clcl() local 1960 TCGv_i32 t1, t3; in op_clcle() local 1979 TCGv_i32 t1, t3; in op_clclu() local 2486 TCGv_i64 t1, t2; in op_ipm() local 2493 tcg_gen_deposit_i64(t1, t1, t2, 4, 60); in op_ipm() 2919 TCGv_i64 t1, t2; in op_lpswe() local 2947 TCGv_i64 t1, t2; in op_lm32() local 2987 TCGv_i64 t1, t2; in op_lmh() local 3027 TCGv_i64 t1, t2; in op_lm64() local 3214 TCGv_i32 t1, t2; in op_mvcl() local [all …]
|
/qemu/target/sh4/ |
H A D | translate.c | 697 TCGv t0, t1; in _decode_opc() local 699 t1 = tcg_temp_new(); in _decode_opc() 709 TCGv result, t1, t2; in _decode_opc() local 712 t1 = tcg_temp_new(); in _decode_opc() 775 tcg_gen_subi_i32(t1, t1, 1); in _decode_opc() 778 tcg_gen_add2_i32(REG(B11_8), t1, REG(B11_8), zero, t2, t1); in _decode_opc() 781 tcg_gen_andi_i32(t1, t1, 1); in _decode_opc() 782 tcg_gen_xor_i32(t1, t1, t0); in _decode_opc() 924 TCGv t0, t1; in _decode_opc() local 926 t1 = tcg_temp_new(); in _decode_opc() [all …]
|
/qemu/host/include/aarch64/host/ |
H A D | atomic128-ldst.h | 63 uint64_t t1, t2; in atomic16_set() local 74 : [mem] "+m"(*ptr), [t1] "=&r"(t1), [t2] "=&r"(t2) in atomic16_set()
|
/qemu/target/riscv/insn_trans/ |
H A D | trans_rvb.c.inc | 237 TCGv_i32 t1 = tcg_temp_new_i32(); 241 tcg_gen_trunc_tl_i32(t1, arg1); 244 tcg_gen_rotr_i32(t1, t1, t2); 247 tcg_gen_ext_i32_tl(ret, t1); 258 TCGv_i32 t1 = tcg_temp_new_i32(); 260 tcg_gen_trunc_tl_i32(t1, arg1); 261 tcg_gen_rotri_i32(t1, t1, shamt); 262 tcg_gen_ext_i32_tl(ret, t1); 278 tcg_gen_trunc_tl_i32(t1, arg1); 281 tcg_gen_rotl_i32(t1, t1, t2); [all …]
|
/qemu/target/loongarch/tcg/insn_trans/ |
H A D | trans_shift.c.inc | 50 TCGv_i32 t1 = tcg_temp_new_i32(); 56 tcg_gen_trunc_tl_i32(t1, src1); 59 tcg_gen_rotr_i32(t1, t1, t2); 60 tcg_gen_ext_i32_tl(dest, t1);
|
H A D | trans_atomic.c.inc | 8 TCGv t1 = tcg_temp_new(); 12 tcg_gen_qemu_ld_i64(t1, t0, ctx->mem_idx, mop); 14 tcg_gen_st_tl(t1, tcg_env, offsetof(CPULoongArchState, llval)); 15 gen_set_gpr(a->rd, t1, EXT_NONE);
|
/qemu/target/mips/tcg/ |
H A D | vr54xx_translate.c | 41 TCGv t1 = tcg_temp_new(); in trans_mult_acc() local 44 gen_load_gpr(t1, a->rt); in trans_mult_acc() 46 gen_helper_mult_acc(t0, tcg_env, t0, t1); in trans_mult_acc()
|
H A D | nanomips_translate.c.inc | 1116 TCGv t1 = tcg_temp_new(); 1365 tcg_gen_xor_tl(t1, t1, t2); 1367 tcg_gen_andc_tl(t1, t2, t1); 1546 TCGv t1 = tcg_temp_new(); 1781 TCGv t1 = tcg_temp_new(); 1875 tcg_gen_ext32u_tl(t1, t1); 1981 tcg_gen_ext32u_tl(t1, t1); 2305 TCGv t1 = tcg_temp_new(); 2606 TCGv t0, t1; 2608 t1 = tcg_temp_new(); [all …]
|
H A D | tx79_translate.c | 237 TCGv_i64 c0, c1, ax, bx, t0, t1, t2; in trans_parallel_compare() local 249 t1 = tcg_temp_new_i64(); in trans_parallel_compare() 257 tcg_gen_sextract_i64(t1, bx, wlen * i, wlen); in trans_parallel_compare() 258 tcg_gen_movcond_i64(cond, t2, t1, t0, c1, c0); in trans_parallel_compare() 266 tcg_gen_sextract_i64(t1, bx, wlen * i, wlen); in trans_parallel_compare() 267 tcg_gen_movcond_i64(cond, t2, t1, t0, c1, c0); in trans_parallel_compare()
|
H A D | mips16e_translate.c.inc | 136 TCGv t1 = tcg_temp_new(); 174 gen_load_gpr(t1, 7); 175 tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx, MO_TEUL | 180 gen_load_gpr(t1, 6); 181 tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx, MO_TEUL | 186 gen_load_gpr(t1, 5); 187 tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx, MO_TEUL | 192 gen_load_gpr(t1, 4); 193 tcg_gen_qemu_st_tl(t1, t0, ctx->mem_idx, MO_TEUL | 297 TCGv t1 = tcg_temp_new(); [all …]
|
/qemu/ |
H A D | qemu-io-cmds.c | 265 if (t1.tv_nsec < 0) { in tsub() 267 t1.tv_sec--; in tsub() 269 t1.tv_sec -= t2.tv_sec; in tsub() 270 return t1; in tsub() 710 struct timespec t1, t2; in read_f() local 865 t2 = tsub(t2, t1); in read_f() 907 struct timespec t1, t2; in readv_f() local 999 t2 = tsub(t2, t1); in readv_f() 1218 t2 = tsub(t2, t1); in write_f() 1337 t2 = tsub(t2, t1); in writev_f() [all …]
|
/qemu/target/sparc/ |
H A D | translate.c | 904 tcg_gen_mul_i32(t1, t1, t2); in gen_op_fmuld8ulx16() 927 tcg_gen_andi_i32(t1, t1, ~0xff); in gen_op_fmuld8sux16() 929 tcg_gen_mul_i32(t1, t1, t2); in gen_op_fmuld8sux16() 1152 tcg_gen_ext32u_tl(t1, t1); in gen_compare() 1160 tcg_gen_ext32s_tl(t1, t1); in gen_compare() 1175 tcg_gen_and_tl(t1, t1, cpu_cc_Z); in gen_compare() 1178 tcg_gen_subi_tl(t1, t1, 1); in gen_compare() 1179 tcg_gen_and_tl(t1, t1, cpu_icc_Z); in gen_compare() 1180 tcg_gen_ext32u_tl(t1, t1); in gen_compare() 3781 tcg_gen_divu_i64(t1, t1, t2); in trans_UDIV() [all …]
|
/qemu/tests/tcg/riscv64/ |
H A D | issue1060.S | 23 csrr t1, mtval 25 bne t1, t2, fail
|
/qemu/target/tricore/ |
H A D | translate.c | 428 tcg_gen_andc_i64(t1, t1, t0); in gen_add64_d() 499 tcg_gen_mul_i64(t1, t1, t3); in gen_madd32_d() 500 tcg_gen_add_i64(t1, t2, t1); in gen_madd32_d() 566 tcg_gen_mul_i64(t1, t1, t3); in gen_maddu64_d() 1008 tcg_gen_or_i64(t1, t1, t2); in gen_madd32_q() 1116 gen_helper_add64_ssov(t1, tcg_env, t1, t2); in gen_m16adds64_q() 1209 tcg_gen_mul_i64(t1, t1, t3); in gen_msub32_d() 1210 tcg_gen_sub_i64(t1, t2, t1); in gen_msub32_d() 1285 tcg_gen_mul_i64(t1, t1, t3); in gen_msubu64_d() 1450 tcg_gen_and_i64(t1, t1, t0); in gen_sub64_d() [all …]
|
/qemu/tests/tcg/m68k/ |
H A D | trap.c | 43 int t0, t1; in main() local 89 : "=d"(t0), "=d"(t1) : "d"(0), "0"(1), FMT_INS); in main()
|