Fix copy-paste.

Split cpu_model_init() into cpu_features_probe() and cpu_features_enable()
so that early bootstrap can do those two steps independently, if needed.

Continue to provide a cpu_model_init() wrapper for

Split cpu_model_init() into cpu_features_probe() and cpu_features_enable()
so that early bootstrap can do those two steps independently, if needed.

Continue to provide a cpu_model_init() wrapper for now.

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Declare oeacpufeat once, in powerpc/oea/cpu_subr.c, rather than in
N different locore.S files.

Add a provision for a per-cpu battable. Each CPU starts with the global
one, but this allows CPUs to temporarily switch to an alternate battable
if needed.

Include missing opt_ppcarch.h.

Style and cosmetic changes. No binary changes intended.

register the IPI before spinning up CPUs, and make sure to do it exactly once
with this, and previous commits, G5s with four CPUs work
tested by Romain Dolbeau

don't enable NAP mode on 7450 CPUs - my Quicksilver has two of those and we
hang hard shortly after boot with NAP enabled, even on UP kernels

first step to address PR54331:
poll h->hatch_running for a bit instead of blindly relying on a fixed timeout
for secondary CPUs to wake up and get ready

needs more testing, possibly pullup

- add or adjust fallthru comments

Only execute dssall when the CPU has the Altivec instruction set extension.

Fix fmttab value for L2CR_L2PE (parity enabled) so that we don't print
self-contradictory "no parity parity enabled".

when switching CPU speed using DFS, only use xcalls on MULTIPROCESSOR kernels

add clock speed control for 970MP CPUs

copy HID1 from the boot CPU to secondary CPUs as well on 64bit CPUs
now the 2nd CPU on my G5s runs at full speed

save & restore HID4 and HID5, zero SPR_HIOR on 970

fix build for 32bit non-bridge SMP kernels

first step towards G5 SMP:
- only save/restore BATs on CPUs that have them
- treat HID0 as 64bit on 64bit CPUs

avoid 32 bit only code in 64 bit mode.

use mtspr64() in bridge mode

fix ofppc/pegasosII (and maybe others).

don't assume PPC_OEA64_BRIDGE means we have a 64 bit cpu (code
for 64 bit in bridge and normal 32 bit can co-exist due to
fixups the early boot code does has,

fix ofppc/pegasosII (and maybe others).

don't assume PPC_OEA64_BRIDGE means we have a 64 bit cpu (code
for 64 bit in bridge and normal 32 bit can co-exist due to
fixups the early boot code does has, and ofppc builds GENERIC
this way):
- fix mtmsr()/mfmsr() to use the right method based upon the
actually cpu booted on.
- fix cpu_setup() to have 32 bit and 64 bit hid0 variables
and operate on the right one based upon the current cpu.
restore a minor optimisation of not writing hid0 if it
didn't change.

in set_timebase() check if OF_finddevice("/cpus/@0") failed
and returned -1 before using it for OF_getprop().

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fix a few typos in comments

use 7450 HID0 bitmask on 7447A and 7448 as well

inline HAVE_64BIT_HID0 and remove macro definition.

Fixes llvm INSTALL kernel build, which failed with:
error: macro expansion producing 'defined' has undefined behavior

remove accidential debug printf()