| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/axi/ |
| H A D | axi_dummy.v | 22 output s_axi_wready, port
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/control/ |
| H A D | axil_to_ni_regport.v | 25 output s_axi_wready, port
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| H A D | axil_ctrlport_master.v | 35 output reg s_axi_wready, port
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| H A D | axil_regport_master.v | 62 output reg s_axi_wready, port
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/fifo/ |
| H A D | fifo64_to_axi4lite.v | 21 output s_axi_wready, port
|
| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/e31x/ |
| H A D | axi_pmu.v | 31 output s_axi_wready, port
|
| H A D | e31x_core.v | 49 output wire s_axi_wready, port
|
| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/ip/aurora_64b66b_pcs_pma/ |
| H A D | aurora_phy_x1.v | 38 output s_axi_wready, port
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/e320/ip/aurora_64b66b_pcs_pma/ |
| H A D | aurora_phy_x1.v | 35 output s_axi_wready, port
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/x300/ip/aurora_64b66b_pcs_pma/ |
| H A D | aurora_phy_x1.v | 35 output s_axi_wready, port
|
| /dports/lang/pocl/pocl-1.8/examples/accel/rtl/platform/ |
| H A D | tta-axislave.vhdl | 85 s_axi_wready : out STD_LOGIC; port
|
| H A D | ffaccel_toplevel.vhdl | 30 s_axi_wready : out std_logic; port
295 s_axi_wready : out std_logic; port in ffaccel_toplevel.structural.tta_accel
|
| H A D | tta-accel.vhdl | 75 s_axi_wready : out std_logic; port
|
| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/rfnoc/blocks/rfnoc_block_axi_ram_fifo/ |
| H A D | sim_axi_ram.sv | 50 output logic s_axi_wready, port
|
| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/rfnoc/xport/ |
| H A D | eth_internal.v | 38 output wire s_axi_wready, port
|
| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/ |
| H A D | n3xx_mgt_channel_wrapper.v | 48 output wire s_axi_wready, port
|
| H A D | n3xx_core.v | 61 output s_axi_wready, port
|
| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/e320/ |
| H A D | n3xx_sfp_wrapper.v | 47 output s_axi_wready, port
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| H A D | e320_core.v | 49 output wire s_axi_wready, port
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| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/vivado_ipi/axi_dmac/ |
| H A D | axi_dmac.v | 53 output s_axi_wready, port
|
| /dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/x300/ |
| H A D | x300.v | 1161 wire s_axi_wready; net
|