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Searched refs:ClockPolarity (Results 1 – 25 of 46) sorted by relevance

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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32G4xx_HAL_Driver/src/
H A Dstm32g4xx_ll_spi.c212 assert_param(IS_LL_SPI_POLARITY(SPI_InitStruct->ClockPolarity)); in LL_SPI_Init()
235 SPI_InitStruct->ClockPolarity | SPI_InitStruct->ClockPhase | in LL_SPI_Init()
279 SPI_InitStruct->ClockPolarity = LL_SPI_POLARITY_LOW; in LL_SPI_StructInit()
408 assert_param(IS_LL_I2S_CPOL(I2S_InitStruct->ClockPolarity)); in LL_I2S_Init()
424 I2S_InitStruct->DataFormat | I2S_InitStruct->ClockPolarity | in LL_I2S_Init()
507 I2S_InitStruct->ClockPolarity = LL_I2S_POLARITY_LOW; in LL_I2S_StructInit()
H A Dstm32g4xx_ll_usart.c374 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity)); in LL_USART_ClockInit()
387 USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity | in LL_USART_ClockInit()
410 …USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when … in LL_USART_ClockStructInit()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/src/
H A Dstm32h7xx_ll_spi.c347 assert_param(IS_LL_SPI_POLARITY(SPI_InitStruct->ClockPolarity)); in LL_SPI_Init()
386 SPI_InitStruct->NSS | SPI_InitStruct->ClockPolarity | in LL_SPI_Init()
427 SPI_InitStruct->ClockPolarity = LL_SPI_POLARITY_LOW; in LL_SPI_StructInit()
560 assert_param(IS_LL_I2S_CKPOL(I2S_InitStruct->ClockPolarity)); in LL_I2S_Init()
582 I2S_InitStruct->DataFormat | I2S_InitStruct->ClockPolarity | in LL_I2S_Init()
669 I2S_InitStruct->ClockPolarity = LL_I2S_POLARITY_LOW; in LL_I2S_StructInit()
H A Dstm32h7xx_ll_usart.c434 assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity)); in LL_USART_ClockInit()
447 USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity | in LL_USART_ClockInit()
470 …USART_ClockInitStruct->ClockPolarity = LL_USART_POLARITY_LOW; /* Not relevant when … in LL_USART_ClockStructInit()
H A Dstm32h7xx_hal_tim.c4759 assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); in HAL_TIM_ConfigClockSource()
4765 sClockSourceConfig->ClockPolarity, in HAL_TIM_ConfigClockSource()
4783 assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); in HAL_TIM_ConfigClockSource()
4789 sClockSourceConfig->ClockPolarity, in HAL_TIM_ConfigClockSource()
4802 assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); in HAL_TIM_ConfigClockSource()
4806 sClockSourceConfig->ClockPolarity, in HAL_TIM_ConfigClockSource()
4818 assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); in HAL_TIM_ConfigClockSource()
4822 sClockSourceConfig->ClockPolarity, in HAL_TIM_ConfigClockSource()
4834 assert_param(IS_TIM_CLOCKPOLARITY(sClockSourceConfig->ClockPolarity)); in HAL_TIM_ConfigClockSource()
4838 sClockSourceConfig->ClockPolarity, in HAL_TIM_ConfigClockSource()
/dports/security/py-ailment/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/
H A Dstm32l1xx_ll_spi.h89 uint32_t ClockPolarity; /*!< Specifies the serial clock steady state. member
447 __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) in LL_SPI_SetClockPolarity() argument
449 MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity); in LL_SPI_SetClockPolarity()
1215 uint32_t ClockPolarity; /*!< Specifies the idle state of the I2S clock. member
1463 __STATIC_INLINE void LL_I2S_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) in LL_I2S_SetClockPolarity() argument
1465 SET_BIT(SPIx->I2SCFGR, ClockPolarity); in LL_I2S_SetClockPolarity()
H A Dstm32l1xx_ll_usart.h142 uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock. member
724 __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity) in LL_USART_SetClockPolarity() argument
726 MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity); in LL_USART_SetClockPolarity()
/dports/security/py-pyvex/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/
H A Dstm32l1xx_ll_spi.h89 uint32_t ClockPolarity; /*!< Specifies the serial clock steady state. member
447 __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) in LL_SPI_SetClockPolarity() argument
449 MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity); in LL_SPI_SetClockPolarity()
1215 uint32_t ClockPolarity; /*!< Specifies the idle state of the I2S clock. member
1463 __STATIC_INLINE void LL_I2S_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) in LL_I2S_SetClockPolarity() argument
1465 SET_BIT(SPIx->I2SCFGR, ClockPolarity); in LL_I2S_SetClockPolarity()
H A Dstm32l1xx_ll_usart.h142 uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock. member
724 __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity) in LL_USART_SetClockPolarity() argument
726 MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity); in LL_USART_SetClockPolarity()
/dports/devel/py-cle/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/
H A Dstm32l1xx_ll_spi.h89 uint32_t ClockPolarity; /*!< Specifies the serial clock steady state. member
447 __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) in LL_SPI_SetClockPolarity() argument
449 MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity); in LL_SPI_SetClockPolarity()
1215 uint32_t ClockPolarity; /*!< Specifies the idle state of the I2S clock. member
1463 __STATIC_INLINE void LL_I2S_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) in LL_I2S_SetClockPolarity() argument
1465 SET_BIT(SPIx->I2SCFGR, ClockPolarity); in LL_I2S_SetClockPolarity()
H A Dstm32l1xx_ll_usart.h142 uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock. member
724 __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity) in LL_USART_SetClockPolarity() argument
726 MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity); in LL_USART_SetClockPolarity()
/dports/security/py-angr/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/TARGET_STM/TARGET_STM32L1/device/
H A Dstm32l1xx_ll_spi.h89 uint32_t ClockPolarity; /*!< Specifies the serial clock steady state. member
447 __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) in LL_SPI_SetClockPolarity() argument
449 MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity); in LL_SPI_SetClockPolarity()
1215 uint32_t ClockPolarity; /*!< Specifies the idle state of the I2S clock. member
1463 __STATIC_INLINE void LL_I2S_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) in LL_I2S_SetClockPolarity() argument
1465 SET_BIT(SPIx->I2SCFGR, ClockPolarity); in LL_I2S_SetClockPolarity()
H A Dstm32l1xx_ll_usart.h142 uint32_t ClockPolarity; /*!< Specifies the steady state of the serial clock. member
724 __STATIC_INLINE void LL_USART_SetClockPolarity(USART_TypeDef *USARTx, uint32_t ClockPolarity) in LL_USART_SetClockPolarity() argument
726 MODIFY_REG(USARTx->CR2, USART_CR2_CPOL, ClockPolarity); in LL_USART_SetClockPolarity()
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32G4xx_HAL_Driver/inc/
H A Dstm32g4xx_ll_spi.h71 uint32_t ClockPolarity; /*!< Specifies the serial clock steady state. member
485 __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) in LL_SPI_SetClockPolarity() argument
487 MODIFY_REG(SPIx->CR1, SPI_CR1_CPOL, ClockPolarity); in LL_SPI_SetClockPolarity()
1459 uint32_t ClockPolarity; /*!< Specifies the idle state of the I2S clock. member
1707 __STATIC_INLINE void LL_I2S_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) in LL_I2S_SetClockPolarity() argument
1709 SET_BIT(SPIx->I2SCFGR, ClockPolarity); in LL_I2S_SetClockPolarity()
/dports/emulators/qemu60/qemu-6.0.0/roms/edk2/MdePkg/Include/Protocol/
H A DSpiConfiguration.h217 BOOLEAN ClockPolarity; member
/dports/emulators/qemu42/qemu-4.2.1/roms/edk2/MdePkg/Include/Protocol/
H A DSpiConfiguration.h217 BOOLEAN ClockPolarity; member
/dports/emulators/qemu/qemu-6.2.0/roms/edk2/MdePkg/Include/Protocol/
H A DSpiConfiguration.h217 BOOLEAN ClockPolarity; member
/dports/emulators/qemu5/qemu-5.2.0/roms/edk2/MdePkg/Include/Protocol/
H A DSpiConfiguration.h217 BOOLEAN ClockPolarity; member
/dports/emulators/qemu-utils/qemu-4.2.1/roms/edk2/MdePkg/Include/Protocol/
H A DSpiConfiguration.h217 BOOLEAN ClockPolarity; member
/dports/sysutils/uefi-edk2-bhyve/edk2-edk2-stable202102/MdePkg/Include/Protocol/
H A DSpiConfiguration.h217 BOOLEAN ClockPolarity; member
/dports/sysutils/uefi-edk2-qemu/edk2-edk2-stable201911/MdePkg/Include/Protocol/
H A DSpiConfiguration.h217 BOOLEAN ClockPolarity; member
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/edk2/MdePkg/Include/Protocol/
H A DSpiConfiguration.h217 BOOLEAN ClockPolarity; member
/dports/sysutils/edk2/edk2-edk2-stable202102/MdePkg/Include/Protocol/
H A DSpiConfiguration.h217 BOOLEAN ClockPolarity;
/dports/misc/rump/buildrump.sh-b914579/src/sys/external/bsd/acpica/dist/resources/
H A Drsserial.c320 {ACPI_RSC_MOVE8, ACPI_RS_OFFSET (Data.SpiSerialBus.ClockPolarity),
321 AML_OFFSET (SpiSerialBus.ClockPolarity),
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32H7xx_HAL_Driver/inc/
H A Dstm32h7xx_ll_spi.h71 uint32_t ClockPolarity; /*!< Specifies the serial clock steady state. member
1137 __STATIC_INLINE void LL_SPI_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) in LL_SPI_SetClockPolarity() argument
1139 MODIFY_REG(SPIx->CFG2, SPI_CFG2_CPOL, ClockPolarity); in LL_SPI_SetClockPolarity()
2592 uint32_t ClockPolarity; /*!< Specifies the idle state of the I2S clock. member
2883 __STATIC_INLINE void LL_I2S_SetClockPolarity(SPI_TypeDef *SPIx, uint32_t ClockPolarity) in LL_I2S_SetClockPolarity() argument
2885 MODIFY_REG(SPIx->I2SCFGR, SPI_I2SCFGR_CKPOL, ClockPolarity); in LL_I2S_SetClockPolarity()

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