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Searched refs:FRT (Results 1 – 25 of 243) sorted by relevance

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/dports/emulators/qemu/qemu-6.2.0/capstone/suite/synctools/tablegen/PPC/
H A DPPCInstrQPX.td391 [(set v4f64:$FRT,
405 [(set v4i1:$FRT,
412 [(set v4f64:$FRT,
424 [(set v4i1:$FRT,
430 [(set v4f64:$FRT,
808 def : InstAlias<"qvfclr $FRT",
809 (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0)>;
814 def : InstAlias<"qvfctfb $FRT, $FRA",
824 def : InstAlias<"qvfnot $FRT, $FRA",
830 def : InstAlias<"qvfset $FRT",
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/Target/PowerPC/
H A DPPCInstrQPX.td388 [(set v4f64:$FRT,
402 [(set v4i1:$FRT,
409 [(set v4f64:$FRT,
421 [(set v4i1:$FRT,
427 [(set v4f64:$FRT,
805 def : InstAlias<"qvfclr $FRT",
806 (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0)>;
811 def : InstAlias<"qvfctfb $FRT, $FRA",
821 def : InstAlias<"qvfnot $FRT, $FRA",
827 def : InstAlias<"qvfset $FRT",
[all …]
/dports/devel/llvm10/llvm-10.0.1.src/lib/Target/PowerPC/
H A DPPCInstrQPX.td388 [(set v4f64:$FRT,
402 [(set v4i1:$FRT,
409 [(set v4f64:$FRT,
421 [(set v4i1:$FRT,
427 [(set v4f64:$FRT,
805 def : InstAlias<"qvfclr $FRT",
806 (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0)>;
811 def : InstAlias<"qvfctfb $FRT, $FRA",
821 def : InstAlias<"qvfnot $FRT, $FRA",
827 def : InstAlias<"qvfset $FRT",
[all …]
/dports/emulators/qemu60/qemu-6.0.0/capstone/suite/synctools/tablegen/PPC/
H A DPPCInstrQPX.td391 [(set v4f64:$FRT,
405 [(set v4i1:$FRT,
412 [(set v4f64:$FRT,
424 [(set v4i1:$FRT,
430 [(set v4f64:$FRT,
808 def : InstAlias<"qvfclr $FRT",
809 (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0)>;
814 def : InstAlias<"qvfctfb $FRT, $FRA",
824 def : InstAlias<"qvfnot $FRT, $FRA",
830 def : InstAlias<"qvfset $FRT",
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/lib/Target/PowerPC/
H A DPPCInstrQPX.td388 [(set v4f64:$FRT,
402 [(set v4i1:$FRT,
409 [(set v4f64:$FRT,
421 [(set v4i1:$FRT,
427 [(set v4f64:$FRT,
805 def : InstAlias<"qvfclr $FRT",
806 (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0)>;
811 def : InstAlias<"qvfctfb $FRT, $FRA",
821 def : InstAlias<"qvfnot $FRT, $FRA",
827 def : InstAlias<"qvfset $FRT",
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
H A DPPCInstrQPX.td388 [(set v4f64:$FRT,
402 [(set v4i1:$FRT,
409 [(set v4f64:$FRT,
421 [(set v4i1:$FRT,
427 [(set v4f64:$FRT,
805 def : InstAlias<"qvfclr $FRT",
806 (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0)>;
811 def : InstAlias<"qvfctfb $FRT, $FRA",
821 def : InstAlias<"qvfnot $FRT, $FRA",
827 def : InstAlias<"qvfset $FRT",
[all …]
/dports/emulators/qemu5/qemu-5.2.0/capstone/suite/synctools/tablegen/PPC/
H A DPPCInstrQPX.td391 [(set v4f64:$FRT,
405 [(set v4i1:$FRT,
412 [(set v4f64:$FRT,
424 [(set v4i1:$FRT,
430 [(set v4f64:$FRT,
808 def : InstAlias<"qvfclr $FRT",
809 (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0)>;
814 def : InstAlias<"qvfctfb $FRT, $FRA",
824 def : InstAlias<"qvfnot $FRT, $FRA",
830 def : InstAlias<"qvfset $FRT",
[all …]
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCInstrQPX.td388 [(set v4f64:$FRT,
402 [(set v4i1:$FRT,
409 [(set v4f64:$FRT,
421 [(set v4i1:$FRT,
427 [(set v4f64:$FRT,
805 def : InstAlias<"qvfclr $FRT",
806 (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0)>;
811 def : InstAlias<"qvfctfb $FRT, $FRA",
821 def : InstAlias<"qvfnot $FRT, $FRA",
827 def : InstAlias<"qvfset $FRT",
[all …]
/dports/devel/llvm90/llvm-9.0.1.src/lib/Target/PowerPC/
H A DPPCInstrQPX.td388 [(set v4f64:$FRT,
402 [(set v4i1:$FRT,
409 [(set v4f64:$FRT,
421 [(set v4i1:$FRT,
427 [(set v4f64:$FRT,
805 def : InstAlias<"qvfclr $FRT",
806 (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0)>;
811 def : InstAlias<"qvfctfb $FRT, $FRA",
821 def : InstAlias<"qvfnot $FRT, $FRA",
827 def : InstAlias<"qvfset $FRT",
[all …]
/dports/devel/llvm80/llvm-8.0.1.src/lib/Target/PowerPC/
H A DPPCInstrQPX.td389 [(set v4f64:$FRT,
403 [(set v4i1:$FRT,
410 [(set v4f64:$FRT,
422 [(set v4i1:$FRT,
428 [(set v4f64:$FRT,
806 def : InstAlias<"qvfclr $FRT",
807 (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0)>;
812 def : InstAlias<"qvfctfb $FRT, $FRA",
822 def : InstAlias<"qvfnot $FRT, $FRA",
828 def : InstAlias<"qvfset $FRT",
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/PowerPC/
H A DPPCInstrQPX.td391 [(set v4f64:$FRT,
405 [(set v4i1:$FRT,
412 [(set v4f64:$FRT,
424 [(set v4i1:$FRT,
430 [(set v4f64:$FRT,
808 def : InstAlias<"qvfclr $FRT",
809 (QVFLOGICALb qbrc:$FRT, qbrc:$FRT, qbrc:$FRT, 0)>;
814 def : InstAlias<"qvfctfb $FRT, $FRA",
824 def : InstAlias<"qvfnot $FRT, $FRA",
830 def : InstAlias<"qvfset $FRT",
[all …]
/dports/editors/hte/ht-e9e63373148da5d7df397d8075740d8c096ecb1d/asm/
H A Dppcopc.cc534 #define FRT FRS macro
2707 { "lfsx", X(31,535), X_MASK, COM, { FRT, RA0, RB } },
2717 { "lfsux", X(31,567), X_MASK, COM, { FRT, RAS, RB } },
2871 { "lfs", OP(48), OP_MASK, COM, { FRT, D, RA0 } },
2873 { "lfsu", OP(49), OP_MASK, COM, { FRT, D, RAS } },
2875 { "lfd", OP(50), OP_MASK, COM, { FRT, D, RA0 } },
2877 { "lfdu", OP(51), OP_MASK, COM, { FRT, D, RAS } },
2889 { "lfdp", OP(57), OP_MASK, POWER6, { FRT, D, RA0 } },
2994 { "stfdp", OP(61), OP_MASK, POWER6, { FRT, D, RA0 } },
3128 { "mffs", XRC(63,583,0), XRARB_MASK, COM, { FRT } },
[all …]
/dports/devel/radare2/radare2-5.1.1/libr/asm/arch/ppc/gnu/
H A Dppc-opc.c290 #define FRT FRS macro
4782 {"lfs", OP(48), OP_MASK, COM, {FRT, D, RA0}},
4784 {"lfsu", OP(49), OP_MASK, COM, {FRT, D, RAS}},
4786 {"lfd", OP(50), OP_MASK, COM, {FRT, D, RA0}},
4788 {"lfdu", OP(51), OP_MASK, COM, {FRT, D, RAS}},
4970 {"frsp", XRC(63,12,0), XRA_MASK, COM, {FRT, FRB}},
5046 {"fneg", XRC(63,40,0), XRA_MASK, COM, {FRT, FRB}},
5060 {"fmr", XRC(63,72,0), XRA_MASK, COM, {FRT, FRB}},
5061 {"fmr.", XRC(63,72,1), XRA_MASK, COM, {FRT, FRB}},
5114 {"mffs", XRC(63,583,0), XRARB_MASK, COM, {FRT}},
[all …]
/dports/devel/avr-gdb/gdb-7.3.1/opcodes/
H A Dppc-opc.c285 #define FRT FRS macro
4852 {"lfs", OP(48), OP_MASK, COM, PPCEFS, {FRT, D, RA0}},
4854 {"lfsu", OP(49), OP_MASK, COM, PPCEFS, {FRT, D, RAS}},
4856 {"lfd", OP(50), OP_MASK, COM, PPCEFS, {FRT, D, RA0}},
4858 {"lfdu", OP(51), OP_MASK, COM, PPCEFS, {FRT, D, RAS}},
5154 {"frsp", XRC(63,12,0), XRA_MASK, COM, PPCEFS, {FRT, FRB}},
5234 {"fneg", XRC(63,40,0), XRA_MASK, COM, PPCEFS, {FRT, FRB}},
5248 {"fmr", XRC(63,72,0), XRA_MASK, COM, PPCEFS, {FRT, FRB}},
5249 {"fmr.", XRC(63,72,1), XRA_MASK, COM, PPCEFS, {FRT, FRB}},
5313 {"mffs", XRC(63,583,0), XRARB_MASK, COM, PPCEFS, {FRT}},
[all …]
/dports/emulators/qemu/qemu-6.2.0/disas/
H A Dppc.c617 #define FRT FRS macro
4679 { "lfs", OP(48), OP_MASK, COM, { FRT, D, RA0 } },
4681 { "lfsu", OP(49), OP_MASK, COM, { FRT, D, RAS } },
4683 { "lfd", OP(50), OP_MASK, COM, { FRT, D, RA0 } },
4685 { "lfdu", OP(51), OP_MASK, COM, { FRT, D, RAS } },
4697 { "lfq", OP(56), OP_MASK, POWER2, { FRT, D, RA0 } },
4699 { "lfqu", OP(57), OP_MASK, POWER2, { FRT, D, RA0 } },
4701 { "lfdp", OP(57), OP_MASK, POWER6, { FRT, D, RA0 } },
4828 { "stfdp", OP(61), OP_MASK, POWER6, { FRT, D, RA0 } },
5006 { "mffs", XRC(63,583,0), XRARB_MASK, COM, { FRT } },
[all …]
/dports/emulators/qemu42/qemu-4.2.1/disas/
H A Dppc.c617 #define FRT FRS macro
4679 { "lfs", OP(48), OP_MASK, COM, { FRT, D, RA0 } },
4681 { "lfsu", OP(49), OP_MASK, COM, { FRT, D, RAS } },
4683 { "lfd", OP(50), OP_MASK, COM, { FRT, D, RA0 } },
4685 { "lfdu", OP(51), OP_MASK, COM, { FRT, D, RAS } },
4697 { "lfq", OP(56), OP_MASK, POWER2, { FRT, D, RA0 } },
4699 { "lfqu", OP(57), OP_MASK, POWER2, { FRT, D, RA0 } },
4701 { "lfdp", OP(57), OP_MASK, POWER6, { FRT, D, RA0 } },
4828 { "stfdp", OP(61), OP_MASK, POWER6, { FRT, D, RA0 } },
5006 { "mffs", XRC(63,583,0), XRARB_MASK, COM, { FRT } },
[all …]
/dports/emulators/qemu5/qemu-5.2.0/disas/
H A Dppc.c617 #define FRT FRS macro
4679 { "lfs", OP(48), OP_MASK, COM, { FRT, D, RA0 } },
4681 { "lfsu", OP(49), OP_MASK, COM, { FRT, D, RAS } },
4683 { "lfd", OP(50), OP_MASK, COM, { FRT, D, RA0 } },
4685 { "lfdu", OP(51), OP_MASK, COM, { FRT, D, RAS } },
4697 { "lfq", OP(56), OP_MASK, POWER2, { FRT, D, RA0 } },
4699 { "lfqu", OP(57), OP_MASK, POWER2, { FRT, D, RA0 } },
4701 { "lfdp", OP(57), OP_MASK, POWER6, { FRT, D, RA0 } },
4828 { "stfdp", OP(61), OP_MASK, POWER6, { FRT, D, RA0 } },
5006 { "mffs", XRC(63,583,0), XRARB_MASK, COM, { FRT } },
[all …]
/dports/emulators/qemu60/qemu-6.0.0/disas/
H A Dppc.c617 #define FRT FRS macro
4679 { "lfs", OP(48), OP_MASK, COM, { FRT, D, RA0 } },
4681 { "lfsu", OP(49), OP_MASK, COM, { FRT, D, RAS } },
4683 { "lfd", OP(50), OP_MASK, COM, { FRT, D, RA0 } },
4685 { "lfdu", OP(51), OP_MASK, COM, { FRT, D, RAS } },
4697 { "lfq", OP(56), OP_MASK, POWER2, { FRT, D, RA0 } },
4699 { "lfqu", OP(57), OP_MASK, POWER2, { FRT, D, RA0 } },
4701 { "lfdp", OP(57), OP_MASK, POWER6, { FRT, D, RA0 } },
4828 { "stfdp", OP(61), OP_MASK, POWER6, { FRT, D, RA0 } },
5006 { "mffs", XRC(63,583,0), XRARB_MASK, COM, { FRT } },
[all …]
/dports/emulators/qemu-utils/qemu-4.2.1/disas/
H A Dppc.c617 #define FRT FRS macro
4679 { "lfs", OP(48), OP_MASK, COM, { FRT, D, RA0 } },
4681 { "lfsu", OP(49), OP_MASK, COM, { FRT, D, RAS } },
4683 { "lfd", OP(50), OP_MASK, COM, { FRT, D, RA0 } },
4685 { "lfdu", OP(51), OP_MASK, COM, { FRT, D, RAS } },
4697 { "lfq", OP(56), OP_MASK, POWER2, { FRT, D, RA0 } },
4699 { "lfqu", OP(57), OP_MASK, POWER2, { FRT, D, RA0 } },
4701 { "lfdp", OP(57), OP_MASK, POWER6, { FRT, D, RA0 } },
4828 { "stfdp", OP(61), OP_MASK, POWER6, { FRT, D, RA0 } },
5006 { "mffs", XRC(63,583,0), XRARB_MASK, COM, { FRT } },
[all …]
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/disas/
H A Dppc.c617 #define FRT FRS macro
4679 { "lfs", OP(48), OP_MASK, COM, { FRT, D, RA0 } },
4681 { "lfsu", OP(49), OP_MASK, COM, { FRT, D, RAS } },
4683 { "lfd", OP(50), OP_MASK, COM, { FRT, D, RA0 } },
4685 { "lfdu", OP(51), OP_MASK, COM, { FRT, D, RAS } },
4697 { "lfq", OP(56), OP_MASK, POWER2, { FRT, D, RA0 } },
4699 { "lfqu", OP(57), OP_MASK, POWER2, { FRT, D, RA0 } },
4701 { "lfdp", OP(57), OP_MASK, POWER6, { FRT, D, RA0 } },
4828 { "stfdp", OP(61), OP_MASK, POWER6, { FRT, D, RA0 } },
5006 { "mffs", XRC(63,583,0), XRARB_MASK, COM, { FRT } },
[all …]
/dports/emulators/qemu-guest-agent/qemu-5.0.1/disas/
H A Dppc.c617 #define FRT FRS macro
4679 { "lfs", OP(48), OP_MASK, COM, { FRT, D, RA0 } },
4681 { "lfsu", OP(49), OP_MASK, COM, { FRT, D, RAS } },
4683 { "lfd", OP(50), OP_MASK, COM, { FRT, D, RA0 } },
4685 { "lfdu", OP(51), OP_MASK, COM, { FRT, D, RAS } },
4697 { "lfq", OP(56), OP_MASK, POWER2, { FRT, D, RA0 } },
4699 { "lfqu", OP(57), OP_MASK, POWER2, { FRT, D, RA0 } },
4701 { "lfdp", OP(57), OP_MASK, POWER6, { FRT, D, RA0 } },
4828 { "stfdp", OP(61), OP_MASK, POWER6, { FRT, D, RA0 } },
5006 { "mffs", XRC(63,583,0), XRARB_MASK, COM, { FRT } },
[all …]
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/disas/
H A Dppc.c617 #define FRT FRS macro
4679 { "lfs", OP(48), OP_MASK, COM, { FRT, D, RA0 } },
4681 { "lfsu", OP(49), OP_MASK, COM, { FRT, D, RAS } },
4683 { "lfd", OP(50), OP_MASK, COM, { FRT, D, RA0 } },
4685 { "lfdu", OP(51), OP_MASK, COM, { FRT, D, RAS } },
4697 { "lfq", OP(56), OP_MASK, POWER2, { FRT, D, RA0 } },
4699 { "lfqu", OP(57), OP_MASK, POWER2, { FRT, D, RA0 } },
4701 { "lfdp", OP(57), OP_MASK, POWER6, { FRT, D, RA0 } },
4828 { "stfdp", OP(61), OP_MASK, POWER6, { FRT, D, RA0 } },
5006 { "mffs", XRC(63,583,0), XRARB_MASK, COM, { FRT } },
[all …]
/dports/science/aircraft-datcom/aircraft-datcom-ed877bb/src/
H A Dali.f18 FRT=(F-XRT)/H
20 BB=BB-(FRT/ABS(FRT))*H*ATAN(ABS(FRT))+(XST-XRT)
/dports/emulators/x49gp/x49gp/x49gp-code/qemu/qemu-git/
H A Dppc-dis.c616 #define FRT FRS macro
4659 { "lfs", OP(48), OP_MASK, COM, { FRT, D, RA0 } },
4661 { "lfsu", OP(49), OP_MASK, COM, { FRT, D, RAS } },
4663 { "lfd", OP(50), OP_MASK, COM, { FRT, D, RA0 } },
4665 { "lfdu", OP(51), OP_MASK, COM, { FRT, D, RAS } },
4677 { "lfq", OP(56), OP_MASK, POWER2, { FRT, D, RA0 } },
4679 { "lfqu", OP(57), OP_MASK, POWER2, { FRT, D, RA0 } },
4681 { "lfdp", OP(57), OP_MASK, POWER6, { FRT, D, RA0 } },
4808 { "stfdp", OP(61), OP_MASK, POWER6, { FRT, D, RA0 } },
4984 { "mffs", XRC(63,583,0), XRARB_MASK, COM, { FRT } },
[all …]
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/disas/
H A Dppc.c617 #define FRT FRS macro
4674 { "lfs", OP(48), OP_MASK, COM, { FRT, D, RA0 } },
4676 { "lfsu", OP(49), OP_MASK, COM, { FRT, D, RAS } },
4678 { "lfd", OP(50), OP_MASK, COM, { FRT, D, RA0 } },
4680 { "lfdu", OP(51), OP_MASK, COM, { FRT, D, RAS } },
4692 { "lfq", OP(56), OP_MASK, POWER2, { FRT, D, RA0 } },
4694 { "lfqu", OP(57), OP_MASK, POWER2, { FRT, D, RA0 } },
4696 { "lfdp", OP(57), OP_MASK, POWER6, { FRT, D, RA0 } },
4823 { "stfdp", OP(61), OP_MASK, POWER6, { FRT, D, RA0 } },
4999 { "mffs", XRC(63,583,0), XRARB_MASK, COM, { FRT } },
[all …]

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