| /dports/multimedia/v4l_compat/linux-5.13-rc2/tools/arch/x86/include/asm/ |
| H A D | msr-index.h | 241 #define MSR_IA32_RTIT_OUTPUT_MASK 0x00000561 macro
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| /dports/multimedia/libv4l/linux-5.13-rc2/tools/arch/x86/include/asm/ |
| H A D | msr-index.h | 241 #define MSR_IA32_RTIT_OUTPUT_MASK 0x00000561 macro
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/x86/include/asm/ |
| H A D | msr-index.h | 241 #define MSR_IA32_RTIT_OUTPUT_MASK 0x00000561 macro
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/x86/include/asm/ |
| H A D | msr-index.h | 241 #define MSR_IA32_RTIT_OUTPUT_MASK 0x00000561 macro
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| /dports/multimedia/libv4l/linux-5.13-rc2/arch/x86/include/asm/ |
| H A D | msr-index.h | 241 #define MSR_IA32_RTIT_OUTPUT_MASK 0x00000561 macro
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/tools/arch/x86/include/asm/ |
| H A D | msr-index.h | 241 #define MSR_IA32_RTIT_OUTPUT_MASK 0x00000561 macro
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/x86/events/intel/ |
| H A D | pt.c | 628 wrmsrl(MSR_IA32_RTIT_OUTPUT_MASK, reg); in pt_config_buffer()
947 rdmsrl(MSR_IA32_RTIT_OUTPUT_MASK, pt->output_mask); in pt_read_offset()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/x86/events/intel/ |
| H A D | pt.c | 628 wrmsrl(MSR_IA32_RTIT_OUTPUT_MASK, reg); in pt_config_buffer()
947 rdmsrl(MSR_IA32_RTIT_OUTPUT_MASK, pt->output_mask); in pt_read_offset()
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| /dports/multimedia/libv4l/linux-5.13-rc2/arch/x86/events/intel/ |
| H A D | pt.c | 628 wrmsrl(MSR_IA32_RTIT_OUTPUT_MASK, reg); in pt_config_buffer()
947 rdmsrl(MSR_IA32_RTIT_OUTPUT_MASK, pt->output_mask); in pt_read_offset()
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| /dports/multimedia/v4l-utils/linux-5.13-rc2/arch/x86/kvm/vmx/ |
| H A D | vmx.c | 663 case MSR_IA32_RTIT_OUTPUT_MASK: in is_valid_passthrough_msr()
1119 wrmsrl(MSR_IA32_RTIT_OUTPUT_MASK, ctx->output_mask); in pt_load_msr()
1133 rdmsrl(MSR_IA32_RTIT_OUTPUT_MASK, ctx->output_mask); in pt_save_msr()
1965 case MSR_IA32_RTIT_OUTPUT_MASK: in vmx_get_msr()
2279 case MSR_IA32_RTIT_OUTPUT_MASK: in vmx_set_msr()
3955 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_OUTPUT_MASK, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
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| /dports/multimedia/v4l_compat/linux-5.13-rc2/arch/x86/kvm/vmx/ |
| H A D | vmx.c | 663 case MSR_IA32_RTIT_OUTPUT_MASK: in is_valid_passthrough_msr()
1119 wrmsrl(MSR_IA32_RTIT_OUTPUT_MASK, ctx->output_mask); in pt_load_msr()
1133 rdmsrl(MSR_IA32_RTIT_OUTPUT_MASK, ctx->output_mask); in pt_save_msr()
1965 case MSR_IA32_RTIT_OUTPUT_MASK: in vmx_get_msr()
2279 case MSR_IA32_RTIT_OUTPUT_MASK: in vmx_set_msr()
3955 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_OUTPUT_MASK, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
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| /dports/multimedia/libv4l/linux-5.13-rc2/arch/x86/kvm/vmx/ |
| H A D | vmx.c | 663 case MSR_IA32_RTIT_OUTPUT_MASK: in is_valid_passthrough_msr()
1119 wrmsrl(MSR_IA32_RTIT_OUTPUT_MASK, ctx->output_mask); in pt_load_msr()
1133 rdmsrl(MSR_IA32_RTIT_OUTPUT_MASK, ctx->output_mask); in pt_save_msr()
1965 case MSR_IA32_RTIT_OUTPUT_MASK: in vmx_get_msr()
2279 case MSR_IA32_RTIT_OUTPUT_MASK: in vmx_set_msr()
3955 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_OUTPUT_MASK, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/i386/ |
| H A D | kvm.c | 2009 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, in kvm_put_msrs()
2347 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, 0); in kvm_get_msrs()
2618 case MSR_IA32_RTIT_OUTPUT_MASK: in kvm_get_msrs()
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| H A D | cpu.h | 426 #define MSR_IA32_RTIT_OUTPUT_MASK 0x561 macro
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| /dports/emulators/qemu5/qemu-5.2.0/target/i386/ |
| H A D | kvm.c | 2968 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, in kvm_put_msrs()
3307 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, 0); in kvm_get_msrs()
3591 case MSR_IA32_RTIT_OUTPUT_MASK: in kvm_get_msrs()
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| H A D | cpu.h | 430 #define MSR_IA32_RTIT_OUTPUT_MASK 0x561 macro
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/target/i386/ |
| H A D | kvm.c | 2949 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, in kvm_put_msrs()
3285 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, 0); in kvm_get_msrs()
3566 case MSR_IA32_RTIT_OUTPUT_MASK: in kvm_get_msrs()
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/i386/ |
| H A D | kvm.c | 2944 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, in kvm_put_msrs()
3280 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, 0); in kvm_get_msrs()
3561 case MSR_IA32_RTIT_OUTPUT_MASK: in kvm_get_msrs()
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| /dports/emulators/qemu60/qemu-6.0.0/target/i386/ |
| H A D | cpu.h | 429 #define MSR_IA32_RTIT_OUTPUT_MASK 0x561 macro
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| /dports/emulators/qemu-utils/qemu-4.2.1/target/i386/ |
| H A D | kvm.c | 2947 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, in kvm_put_msrs()
3283 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, 0); in kvm_get_msrs()
3564 case MSR_IA32_RTIT_OUTPUT_MASK: in kvm_get_msrs()
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| H A D | cpu.h | 425 #define MSR_IA32_RTIT_OUTPUT_MASK 0x561 macro
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| /dports/emulators/qemu42/qemu-4.2.1/target/i386/ |
| H A D | kvm.c | 2947 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, in kvm_put_msrs()
3283 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, 0); in kvm_get_msrs()
3564 case MSR_IA32_RTIT_OUTPUT_MASK: in kvm_get_msrs()
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| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/i386/kvm/ |
| H A D | kvm.c | 3100 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, in kvm_put_msrs()
3442 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, 0); in kvm_get_msrs()
3729 case MSR_IA32_RTIT_OUTPUT_MASK: in kvm_get_msrs()
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| /dports/emulators/qemu/qemu-6.2.0/target/i386/kvm/ |
| H A D | kvm.c | 3167 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, in kvm_put_msrs()
3524 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, 0); in kvm_get_msrs()
3821 case MSR_IA32_RTIT_OUTPUT_MASK: in kvm_get_msrs()
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| /dports/emulators/qemu60/qemu-6.0.0/target/i386/kvm/ |
| H A D | kvm.c | 3023 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, in kvm_put_msrs()
3365 kvm_msr_entry_add(cpu, MSR_IA32_RTIT_OUTPUT_MASK, 0); in kvm_get_msrs()
3652 case MSR_IA32_RTIT_OUTPUT_MASK: in kvm_get_msrs()
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