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Searched refs:TempRegister (Results 1 – 25 of 79) sorted by relevance

1234

/dports/lang/v8/v8-9.6.180.12/src/compiler/backend/loong64/
H A Dcode-generator-loong64.cc342 __ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
354 __ andi(i.TempRegister(3), i.TempRegister(0), 0x3); \
357 __ andi(i.TempRegister(3), i.TempRegister(0), 0x7); \
359 __ Sub_d(i.TempRegister(0), i.TempRegister(0), \
361 __ slli_w(i.TempRegister(3), i.TempRegister(3), 3); \
364 __ load_linked(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
365 __ ExtractBits(i.OutputRegister(0), i.TempRegister(1), i.TempRegister(3), \
369 __ InsertBits(i.TempRegister(1), i.TempRegister(2), i.TempRegister(3), \
371 __ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
383 __ andi(i.TempRegister(1), i.TempRegister(0), 0x3); \
[all …]
/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/compiler/backend/mips/
H A Dcode-generator-mips.cc340 __ Sc(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
358 __ bin_instr(i.TempRegister(1), i.TempRegister(2), oldval_low, \
360 __ scx(i.TempRegister(2), MemOperand(i.TempRegister(0), 4)); \
361 __ sc(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
409 __ Subu(i.TempRegister(0), i.TempRegister(0), Operand(i.TempRegister(3))); \
418 __ InsertBits(i.TempRegister(1), i.TempRegister(2), i.TempRegister(3), \
433 __ Sc(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
443 __ Subu(i.TempRegister(0), i.TempRegister(0), Operand(i.TempRegister(1))); \
468 __ Sc(i.TempRegister(2), MemOperand(i.TempRegister(0), 0)); \
481 __ Subu(i.TempRegister(0), i.TempRegister(0), Operand(i.TempRegister(1))); \
[all …]
H A Dinstruction-selector-mips.cc416 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()}; in VisitStore()
765 InstructionOperand temps[] = {g.TempRegister(a0), g.TempRegister(), in VisitWord32AtomicPairStore()
1970 temp[0] = g.TempRegister(); in VisitWord32AtomicExchange()
1971 temp[1] = g.TempRegister(); in VisitWord32AtomicExchange()
1972 temp[2] = g.TempRegister(); in VisitWord32AtomicExchange()
2010 temp[0] = g.TempRegister(); in VisitWord32AtomicCompareExchange()
2011 temp[1] = g.TempRegister(); in VisitWord32AtomicCompareExchange()
2012 temp[2] = g.TempRegister(); in VisitWord32AtomicCompareExchange()
2050 temps[0] = g.TempRegister(); in VisitWord32AtomicBinaryOperation()
2051 temps[1] = g.TempRegister(); in VisitWord32AtomicBinaryOperation()
[all …]
/dports/lang/v8/v8-9.6.180.12/src/compiler/backend/mips/
H A Dcode-generator-mips.cc339 __ Sc(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
357 __ bin_instr(i.TempRegister(1), i.TempRegister(2), oldval_low, \
359 __ scx(i.TempRegister(2), MemOperand(i.TempRegister(0), 4)); \
408 __ Subu(i.TempRegister(0), i.TempRegister(0), Operand(i.TempRegister(3))); \
417 __ InsertBits(i.TempRegister(1), i.TempRegister(2), i.TempRegister(3), \
432 __ Sc(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
442 __ Subu(i.TempRegister(0), i.TempRegister(0), Operand(i.TempRegister(1))); \
467 __ Sc(i.TempRegister(2), MemOperand(i.TempRegister(0), 0)); \
480 __ Subu(i.TempRegister(0), i.TempRegister(0), Operand(i.TempRegister(1))); \
1934 __ sc(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); in AssembleArchInstruction()
[all …]
H A Dinstruction-selector-mips.cc421 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()}; in VisitStore()
777 InstructionOperand temps[] = {g.TempRegister(a0), g.TempRegister(), in VisitWord32AtomicPairStore()
1634 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()}; in VisitStackPointerGreaterThan()
2012 temp[0] = g.TempRegister(); in VisitWord32AtomicExchange()
2013 temp[1] = g.TempRegister(); in VisitWord32AtomicExchange()
2014 temp[2] = g.TempRegister(); in VisitWord32AtomicExchange()
2051 temp[0] = g.TempRegister(); in VisitWord32AtomicCompareExchange()
2052 temp[1] = g.TempRegister(); in VisitWord32AtomicCompareExchange()
2053 temp[2] = g.TempRegister(); in VisitWord32AtomicCompareExchange()
2090 temps[0] = g.TempRegister(); in VisitWord32AtomicBinaryOperation()
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/compiler/backend/mips/
H A Dcode-generator-mips.cc340 __ Sc(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
358 __ bin_instr(i.TempRegister(1), i.TempRegister(2), oldval_low, \
360 __ scx(i.TempRegister(2), MemOperand(i.TempRegister(0), 4)); \
361 __ sc(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
409 __ Subu(i.TempRegister(0), i.TempRegister(0), Operand(i.TempRegister(3))); \
418 __ InsertBits(i.TempRegister(1), i.TempRegister(2), i.TempRegister(3), \
433 __ Sc(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
443 __ Subu(i.TempRegister(0), i.TempRegister(0), Operand(i.TempRegister(1))); \
468 __ Sc(i.TempRegister(2), MemOperand(i.TempRegister(0), 0)); \
481 __ Subu(i.TempRegister(0), i.TempRegister(0), Operand(i.TempRegister(1))); \
[all …]
H A Dinstruction-selector-mips.cc428 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()}; in VisitStore()
779 InstructionOperand temps[] = {g.TempRegister(a0), g.TempRegister(), in VisitWord32AtomicPairStore()
1987 temp[0] = g.TempRegister(); in VisitWord32AtomicExchange()
1988 temp[1] = g.TempRegister(); in VisitWord32AtomicExchange()
1989 temp[2] = g.TempRegister(); in VisitWord32AtomicExchange()
2026 temp[0] = g.TempRegister(); in VisitWord32AtomicCompareExchange()
2027 temp[1] = g.TempRegister(); in VisitWord32AtomicCompareExchange()
2028 temp[2] = g.TempRegister(); in VisitWord32AtomicCompareExchange()
2065 temps[0] = g.TempRegister(); in VisitWord32AtomicBinaryOperation()
2066 temps[1] = g.TempRegister(); in VisitWord32AtomicBinaryOperation()
[all …]
/dports/lang/v8/v8-9.6.180.12/src/compiler/backend/riscv64/
H A Dcode-generator-riscv64.cc333 __ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
344 __ And(i.TempRegister(3), i.TempRegister(0), 0x3); \
347 __ And(i.TempRegister(3), i.TempRegister(0), 0x7); \
349 __ Sub64(i.TempRegister(0), i.TempRegister(0), \
351 __ Sll32(i.TempRegister(3), i.TempRegister(3), 3); \
354 __ load_linked(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
355 __ ExtractBits(i.OutputRegister(0), i.TempRegister(1), i.TempRegister(3), \
359 __ InsertBits(i.TempRegister(1), i.TempRegister(2), i.TempRegister(3), \
361 __ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
374 __ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
[all …]
/dports/www/node10/node-v10.24.1/deps/v8/src/compiler/mips/
H A Dcode-generator-mips.cc351 __ Sc(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
360 __ andi(i.TempRegister(3), i.TempRegister(0), 0x3); \
361 __ Subu(i.TempRegister(0), i.TempRegister(0), Operand(i.TempRegister(3))); \
362 __ sll(i.TempRegister(3), i.TempRegister(3), 3); \
365 __ Ll(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
366 __ ExtractBits(i.OutputRegister(0), i.TempRegister(1), i.TempRegister(3), \
370 __ InsertBits(i.TempRegister(1), i.TempRegister(2), i.TempRegister(3), \
385 __ Sc(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
395 __ Subu(i.TempRegister(0), i.TempRegister(0), Operand(i.TempRegister(1))); \
420 __ Sc(i.TempRegister(2), MemOperand(i.TempRegister(0), 0)); \
[all …]
/dports/www/node10/node-v10.24.1/deps/v8/src/compiler/mips64/
H A Dcode-generator-mips64.cc360 __ Sc(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
369 __ andi(i.TempRegister(3), i.TempRegister(0), 0x3); \
370 __ Dsubu(i.TempRegister(0), i.TempRegister(0), \
372 __ sll(i.TempRegister(3), i.TempRegister(3), 3); \
375 __ Ll(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
376 __ ExtractBits(i.OutputRegister(0), i.TempRegister(1), i.TempRegister(3), \
380 __ InsertBits(i.TempRegister(1), i.TempRegister(2), i.TempRegister(3), \
382 __ Sc(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
395 __ Sc(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
404 __ andi(i.TempRegister(1), i.TempRegister(0), 0x3); \
[all …]
/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/compiler/backend/mips64/
H A Dcode-generator-mips64.cc348 __ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
359 __ andi(i.TempRegister(3), i.TempRegister(0), 0x3); \
362 __ andi(i.TempRegister(3), i.TempRegister(0), 0x7); \
364 __ Dsubu(i.TempRegister(0), i.TempRegister(0), \
366 __ sll(i.TempRegister(3), i.TempRegister(3), 3); \
369 __ load_linked(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
370 __ ExtractBits(i.OutputRegister(0), i.TempRegister(1), i.TempRegister(3), \
374 __ InsertBits(i.TempRegister(1), i.TempRegister(2), i.TempRegister(3), \
376 __ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
651 i.TempRegister(0), i.TempRegister(1), in AssembleArchInstruction()
[all …]
/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/compiler/backend/arm/
H A Dcode-generator-arm.cc369 __ store_instr(i.TempRegister(0), i.InputRegister(2), i.TempRegister(1)); \
385 __ store_instr(i.TempRegister(0), i.InputRegister(3), i.TempRegister(1)); \
401 __ store_instr(i.TempRegister(2), i.TempRegister(0), i.TempRegister(1)); \
417 __ strexd(i.TempRegister(3), i.TempRegister(1), i.TempRegister(2), \
433 __ strexd(i.TempRegister(3), i.TempRegister(1), i.TempRegister(2), \
793 i.TempRegister(0), i.TempRegister(1), in AssembleArchInstruction()
995 lhs_register = i.TempRegister(0); in AssembleArchInstruction()
3289 __ ldrexd(i.TempRegister(1), i.TempRegister(2), i.TempRegister(0)); in AssembleArchInstruction()
3291 i.TempRegister(0)); in AssembleArchInstruction()
3324 i.TempRegister(0)); in AssembleArchInstruction()
[all …]
H A Dinstruction-selector-arm.cc465 temps[temp_count++] = g.TempRegister(); in VisitPairAtomicBinOp()
468 temps[temp_count++] = g.TempRegister(); in VisitPairAtomicBinOp()
823 InstructionOperand fp[] = {g.TempRegister(), g.TempRegister()}; in VisitUnalignedStore()
2260 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()}; in VisitWord32AtomicExchange()
2297 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister(), in VisitWord32AtomicCompareExchange()
2335 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister(), in VisitWord32AtomicBinaryOperation()
2399 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister(r0), in VisitWord32AtomicPairStore()
2443 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()}; in VisitWord32AtomicPairExchange()
2448 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister(), in VisitWord32AtomicPairExchange()
2453 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister(), in VisitWord32AtomicPairExchange()
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/compiler/backend/mips64/
H A Dcode-generator-mips64.cc348 __ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
359 __ andi(i.TempRegister(3), i.TempRegister(0), 0x3); \
362 __ andi(i.TempRegister(3), i.TempRegister(0), 0x7); \
364 __ Dsubu(i.TempRegister(0), i.TempRegister(0), \
366 __ sll(i.TempRegister(3), i.TempRegister(3), 3); \
369 __ load_linked(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
370 __ ExtractBits(i.OutputRegister(0), i.TempRegister(1), i.TempRegister(3), \
374 __ InsertBits(i.TempRegister(1), i.TempRegister(2), i.TempRegister(3), \
376 __ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
651 i.TempRegister(0), i.TempRegister(1), in AssembleArchInstruction()
[all …]
/dports/lang/v8/v8-9.6.180.12/src/compiler/backend/mips64/
H A Dcode-generator-mips64.cc347 __ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
358 __ andi(i.TempRegister(3), i.TempRegister(0), 0x3); \
361 __ andi(i.TempRegister(3), i.TempRegister(0), 0x7); \
363 __ Dsubu(i.TempRegister(0), i.TempRegister(0), \
365 __ sll(i.TempRegister(3), i.TempRegister(3), 3); \
368 __ load_linked(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
369 __ ExtractBits(i.OutputRegister(0), i.TempRegister(1), i.TempRegister(3), \
373 __ InsertBits(i.TempRegister(1), i.TempRegister(2), i.TempRegister(3), \
375 __ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
388 __ store_conditional(i.TempRegister(1), MemOperand(i.TempRegister(0), 0)); \
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/compiler/backend/arm/
H A Dcode-generator-arm.cc368 __ store_instr(i.TempRegister(0), i.InputRegister(2), i.TempRegister(1)); \
384 __ store_instr(i.TempRegister(0), i.InputRegister(3), i.TempRegister(1)); \
400 __ store_instr(i.TempRegister(2), i.TempRegister(0), i.TempRegister(1)); \
416 __ strexd(i.TempRegister(3), i.TempRegister(1), i.TempRegister(2), \
432 __ strexd(i.TempRegister(3), i.TempRegister(1), i.TempRegister(2), \
792 i.TempRegister(0), i.TempRegister(1), in AssembleArchInstruction()
992 lhs_register = i.TempRegister(0); in AssembleArchInstruction()
3408 Register tmp1 = i.TempRegister(1); in AssembleArchInstruction()
3409 Register tmp2 = i.TempRegister(2); in AssembleArchInstruction()
3451 i.TempRegister(0)); in AssembleArchInstruction()
[all …]
H A Dinstruction-selector-arm.cc466 temps[temp_count++] = g.TempRegister(); in VisitPairAtomicBinOp()
467 temps[temp_count++] = g.TempRegister(r6); in VisitPairAtomicBinOp()
468 temps[temp_count++] = g.TempRegister(r7); in VisitPairAtomicBinOp()
469 temps[temp_count++] = g.TempRegister(); in VisitPairAtomicBinOp()
835 InstructionOperand fp[] = {g.TempRegister(), g.TempRegister()}; in VisitUnalignedStore()
2054 index_operand = g.TempRegister(); in VisitSwitch()
2281 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()}; in VisitWord32AtomicExchange()
2317 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister(), in VisitWord32AtomicCompareExchange()
2354 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister(), in VisitWord32AtomicBinaryOperation()
2418 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister(r0), in VisitWord32AtomicPairStore()
[all …]
/dports/lang/v8/v8-9.6.180.12/src/compiler/backend/arm/
H A Dcode-generator-arm.cc346 __ store_instr(i.TempRegister(0), i.InputRegister(2), i.TempRegister(1)); \
362 __ store_instr(i.TempRegister(0), i.InputRegister(3), i.TempRegister(1)); \
378 __ store_instr(i.TempRegister(2), i.TempRegister(0), i.TempRegister(1)); \
394 __ strexd(i.TempRegister(3), i.TempRegister(1), i.TempRegister(2), \
410 __ strexd(i.TempRegister(3), i.TempRegister(1), i.TempRegister(2), \
913 lhs_register = i.TempRegister(0); in AssembleArchInstruction()
3448 Register tmp1 = i.TempRegister(1); in AssembleArchInstruction()
3449 Register tmp2 = i.TempRegister(2); in AssembleArchInstruction()
3489 __ ldrexd(r6, r7, i.TempRegister(0)); in AssembleArchInstruction()
3491 i.TempRegister(0)); in AssembleArchInstruction()
[all …]
H A Dinstruction-selector-arm.cc470 temps[temp_count++] = g.TempRegister(); in VisitPairAtomicBinOp()
471 temps[temp_count++] = g.TempRegister(r6); in VisitPairAtomicBinOp()
472 temps[temp_count++] = g.TempRegister(r7); in VisitPairAtomicBinOp()
473 temps[temp_count++] = g.TempRegister(); in VisitPairAtomicBinOp()
909 InstructionOperand fp[] = {g.TempRegister(), g.TempRegister()}; in VisitUnalignedStore()
2130 index_operand = g.TempRegister(); in VisitSwitch()
2337 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()}; in VisitWord32AtomicExchange()
2373 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister(), in VisitWord32AtomicCompareExchange()
2410 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister(), in VisitWord32AtomicBinaryOperation()
2473 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister(r0), in VisitWord32AtomicPairStore()
[all …]
/dports/lang/v8/v8-9.6.180.12/src/compiler/backend/ia32/
H A Dcode-generator-ia32.cc1388 Register tmp = i.TempRegister(1); in AssembleArchInstruction()
1450 i.TempRegister(0)); in AssembleArchInstruction()
1458 i.TempRegister(0)); in AssembleArchInstruction()
1531 i.TempRegister(0)); in AssembleArchInstruction()
1536 i.TempRegister(0)); in AssembleArchInstruction()
1541 i.TempRegister(0)); in AssembleArchInstruction()
1546 i.TempRegister(0)); in AssembleArchInstruction()
2748 Register tmp = i.TempRegister(0); in AssembleArchInstruction()
2864 Register tmp = i.TempRegister(0); in AssembleArchInstruction()
2943 Register tmp = i.TempRegister(0); in AssembleArchInstruction()
[all …]
H A Dinstruction-selector-ia32.cc694 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()}; in VisitStoreCommon()
1106 temps[temp_count++] = g.TempRegister(edx); in VisitWord32PairShift()
1364 InstructionOperand temps[] = {g.TempRegister(eax), g.TempRegister()}; in VisitFloat64Mod()
1740 temps[temp_count++] = g.TempRegister(eax); in VisitPairAtomicBinOp()
1745 temps[temp_count++] = g.TempRegister(edx); in VisitPairAtomicBinOp()
1864 index_operand = g.TempRegister(); in VisitSwitch()
2183 InstructionOperand temps[] = {g.TempRegister(eax), g.TempRegister(edx)}; in VisitWord32AtomicPairStore()
2241 temps[temp_count++] = g.TempRegister(eax); in VisitWord32AtomicPairCompareExchange()
2246 temps[temp_count++] = g.TempRegister(edx); in VisitWord32AtomicPairCompareExchange()
2413 InstructionOperand temp(g.TempRegister()); in VisitS128Const()
[all …]
/dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/compiler/backend/ia32/
H A Dinstruction-selector-ia32.cc223 InstructionOperand temps[] = {g.TempRegister()}; in VisitROWithTemp()
478 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()}; in VisitStore()
880 temps[temp_count++] = g.TempRegister(edx); in VisitWord32PairShift()
1123 InstructionOperand temps[] = {g.TempRegister(eax), g.TempRegister()}; in VisitFloat64Mod()
1524 temps[temp_count++] = g.TempRegister(eax); in VisitPairAtomicBinOp()
1529 temps[temp_count++] = g.TempRegister(edx); in VisitPairAtomicBinOp()
1648 index_operand = g.TempRegister(); in VisitSwitch()
1957 InstructionOperand temps[] = {g.TempRegister(eax), g.TempRegister(edx)}; in VisitWord32AtomicPairStore()
2014 temps[temp_count++] = g.TempRegister(eax); in VisitWord32AtomicPairCompareExchange()
2019 temps[temp_count++] = g.TempRegister(edx); in VisitWord32AtomicPairCompareExchange()
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/compiler/backend/ia32/
H A Dinstruction-selector-ia32.cc506 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()}; in VisitStore()
899 temps[temp_count++] = g.TempRegister(edx); in VisitWord32PairShift()
1155 InstructionOperand temps[] = {g.TempRegister(eax), g.TempRegister()}; in VisitFloat64Mod()
1554 temps[temp_count++] = g.TempRegister(eax); in VisitPairAtomicBinOp()
1559 temps[temp_count++] = g.TempRegister(edx); in VisitPairAtomicBinOp()
1678 index_operand = g.TempRegister(); in VisitSwitch()
1985 InstructionOperand temps[] = {g.TempRegister(eax), g.TempRegister(edx)}; in VisitWord32AtomicPairStore()
2042 temps[temp_count++] = g.TempRegister(eax); in VisitWord32AtomicPairCompareExchange()
2047 temps[temp_count++] = g.TempRegister(edx); in VisitWord32AtomicPairCompareExchange()
2197 InstructionOperand temp(g.TempRegister()); in VisitS128Const()
[all …]
/dports/www/node10/node-v10.24.1/deps/v8/src/compiler/arm/
H A Dcode-generator-arm.cc380 __ store_instr(i.TempRegister(0), i.InputRegister(2), i.TempRegister(1)); \
396 __ store_instr(i.TempRegister(0), i.InputRegister(3), i.TempRegister(1)); \
412 __ store_instr(i.TempRegister(2), i.TempRegister(0), i.TempRegister(1)); \
722 i.TempRegister(0), i.TempRegister(1), in AssembleArchInstruction()
723 i.TempRegister(2)); in AssembleArchInstruction()
936 Register scratch0 = i.TempRegister(0); in AssembleArchInstruction()
937 Register scratch1 = i.TempRegister(1); in AssembleArchInstruction()
2688 __ uxtb(i.TempRegister(2), i.InputRegister(2)); in AssembleArchInstruction()
2695 __ uxtb(i.TempRegister(2), i.InputRegister(2)); in AssembleArchInstruction()
2701 __ uxth(i.TempRegister(2), i.InputRegister(2)); in AssembleArchInstruction()
[all …]
/dports/www/node10/node-v10.24.1/deps/v8/src/compiler/ia32/
H A Dinstruction-selector-ia32.cc344 InstructionOperand temps[] = {g.TempRegister(), g.TempRegister()}; in VisitStore()
613 InstructionOperand temps[] = {g.TempRegister()}; in VisitInt32PairAdd()
700 temps[temp_count++] = g.TempRegister(edx); in VisitWord32PairShift()
908 InstructionOperand temps[] = {g.TempRegister()}; in VisitRoundUint32ToFloat32()
923 InstructionOperand temps[] = {g.TempRegister()}; in VisitFloat32Max()
931 InstructionOperand temps[] = {g.TempRegister()}; in VisitFloat64Max()
939 InstructionOperand temps[] = {g.TempRegister()}; in VisitFloat32Min()
947 InstructionOperand temps[] = {g.TempRegister()}; in VisitFloat64Min()
1375 index_operand = g.TempRegister(); in VisitSwitch()
1710 temp[0] = g.TempRegister(); in VisitWord32AtomicBinaryOperation()
[all …]

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