Home
last modified time | relevance | path

Searched refs:ddr3_axi_rlast (Results 1 – 8 of 8) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/x300/
H A Dx300_core.v175 input ddr3_axi_rlast, port
391 .ddr3_axi_rlast ({s01_axi_rlast, s00_axi_rlast}),
515 .M00_AXI_RLAST(ddr3_axi_rlast), // input M00_AXI_RLAST
H A Dbus_int.v135 input [1*2-1:0] ddr3_axi_rlast, port
825 .m_axi_rlast (ddr3_axi_rlast ),
H A Dx300.v1434 .ddr3_axi_rlast (s_axi_rlast),
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/e320/
H A De320.v583 wire ddr3_axi_rlast; net
660 .s_axi_rlast (ddr3_axi_rlast),
1778 .ddr3_axi_rlast (ddr3_axi_rlast),
H A De320_core.v143 input wire ddr3_axi_rlast, port
817 .M00_AXI_RLAST (ddr3_axi_rlast ),
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/
H A Dn3xx_core.v161 input ddr3_axi_rlast, port
870 .M00_AXI_RLAST (ddr3_axi_rlast ),
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/dboards/mg/
H A Dn3xx.v3233 wire ddr3_axi_rlast; net
3321 .s_axi_rlast (ddr3_axi_rlast),
3653 .ddr3_axi_rlast (ddr3_axi_rlast),
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/dboards/rh/
H A Dn3xx.v3205 wire ddr3_axi_rlast; net
3293 .s_axi_rlast (ddr3_axi_rlast),
3576 .ddr3_axi_rlast (ddr3_axi_rlast),