1 // license:BSD-3-Clause
2 // copyright-holders:Mark McDougall, R. Belmont
3 /*************************************************************
4
5 Namco ND-1 Driver - Mark McDougall
6 R. Belmont
7
8 With contributions from:
9 James Jenkins
10 Walter Fath
11
12 abcheck TODOs:
13 - Ending has a rowscroll GFX bug;
14 - Where is the extra data ROM mapped?
15
16 gynotai TODOs:
17 - printer (disable it in service mode to suppress POST error);
18 - ball sensors aren't understood;
19 - Seems to dislike our YGV608 row/colscroll handling
20 (for example vertical bounding box is halved offset & size wise for Pac-Man goal stage);
21
22 To make abcheck run when the EEPROM is clear:
23 - F2 to enter service mode
24 - Player 3 A/B to navigate to GAME OPTIONS
25 - Player 1 A to enter, Player 1 B to cancel or go back
26 - Go to LOCAL SELECT and choose the Japanese city of your choice (I don't know what it affects yet)
27 - Exit test mode (F2) and reset (F3) and the game will boot
28
29 -----------------------------------
30 Guru-Readme for Namco ND-1 hardware
31 -----------------------------------
32
33 Games on this system include...
34 Namco Classics Volume 1 (Namco 1995)
35 Namco Classics Volume 2 (Namco 1996)
36 Abnormal Check (Namco 1996)
37
38
39 PCB Layout
40 ----------
41 ND-1 GAME PCB
42 8655960101 (8655970101) - for Namco Classics 1 & 2
43
44 ND-1 GAME(B) PCB
45 8655960401 (8655970401) - for Namco Classics 1 & 2
46
47 ND-1 GAME(C) PCB
48 8655960500 (8655970500) - for Abnormal Check
49 |----------------------------------------|
50 | LA4705 MAIN0 68000 |
51 | 4558 LC78815 MAIN1 |
52 |J VR1 |
53 | NFA221 AT28C16 |
54 |A |
55 | NFA222 |
56 |M CG0 CG1* |
57 | LT1109 |
58 |M NFA222 LM1203 |
59 | VR2 J3|
60 |A |
61 | NFA222 YGV608-F |
62 | SW1 |
63 | VOICE |
64 | NFA222* 49.152MHz |
65 |N 25.326MHz |
66 |A NFA222* |
67 |M C352 |
68 |C NFA221* MACH210 C416 |
69 |O IR2C24* |
70 |4 PC410* MB3771|
71 |8 NFA222* H8/3002 62256 |
72 | PC410* SUB 62256 |
73 |----------------------------------------|
74 Notes:
75 68000 - Motorola MC68HC000FN12 Micro-Processor (PLCC68). Clock input 12.288MHz (49.152/4)
76 H8/3002 - Hitachi H8/3002 HD6413002F16 Micro-Controller (QFP100). Clock input 16.384MHz (49.152/3)
77 Note the H8/3002 has no internal ROM capability.
78 C352 - Namco custom 32-voice 4-channel PCM sound chip (QFP100). Clock input 24.576MHz (49.152/2)
79 Note this is probably a Micro-Controller with internal ROM.
80 HSync - 15.4700kHz
81 VSync - 59.9648Hz
82 J3 - 100-pin connector for daughter board (not populated on Namco Classics 1 & 2)
83 SW1 - 2-position DIP Switch
84 VR1 - Master volume
85 VR2 - Brightness adjustment (video level)
86 LM1203 - National LM1203 RGB VIDEO AMP (DIP28). Note on some PCB revisions there is a capacitor glued on top of this chip.
87 AT28C16 - Atmel 2k x8-bit EEPROM (DIP24)
88 YGV608-F - Yamaha YVG608-F video controller (QFP100)
89 LT1109 - Linear Technology LT1109A DC/DC converter (SOIC8). Note on some PCB revisions this is not present. If the IC is required there
90 is an additional 'SREG PCB' with the LT1109 and other support components present at this location.
91 C416 - Namco custom (QFP176), Memory/DMA Controller
92 MACH210 - AMD MACH211 CPLD, used as Namco "KEYCUS" protection chip (PLCC44)
93 - for Namco Classics 1 stamped 'KC001' at 3C
94 - for Namco Classics 2 stamped 'KC002' at 3C
95 - for Abnormal Check stamped 'KC008' at 3D
96 62256 - 32k x8-bit SRAM (SOJ28)
97 MB3771 - Fujitsu MB3771 Master Reset IC (SOIC8)
98 IR2C24 - Sharp IR2C24 6-Circuit 320mA Transistor Array with Clamping Diodes and Strobe (SOIC16)
99 PC410 - Sharp PC410 Ultra-high Speed Response OPIC Photocoupler (SOIC5)
100 NFA221 - muRata NFA221 Capacitor Array EMI Suppression Filter
101 NFA222 - muRata NFA222 Capacitor Array EMI Suppression Filter
102 * - Not populated on Namco Classics 1 & 2
103
104
105 ROMs: (note IC locations are different between GAME+GAME(B) and GAME(C) PCBs.
106
107 Namco Classics Volume 1
108 -------------------------
109 NC2 MAIN0B.14D - 512k x16-bit EPROM type 27C240/27C4002 (for Japan: NC1) (revisions: MAIN0 or MAIN0B)
110 NC2 MAIN1B.13D - 512k x16-bit EPROM type 27C240/27C4002 (for Japan: NC1) (revisions: MAIN1 or MAIN1B)
111 NC1 SUB.1C - 512k x16-bit EPROM type 27C240/27C4002
112 NC1 CG0.10C - 16M-bit SOP44 mask ROM
113 NC1 VOICE.7B - 16M-bit SOP44 mask ROM
114
115 Namco Classics Volume 2
116 -------------------------
117 NCS2 MAIN0B.14D - 512k x16-bit EPROM type 27C240/27C4002 (for Japan: NCS1) (revisions: MAIN0 or MAIN0B)
118 NCS2 MAIN1B.13D - 512k x16-bit EPROM type 27C240/27C4002 (for Japan: NCS1) (revisions: MAIN1 or MAIN1B)
119 NCS1 SUB.1C - 512k x16-bit EPROM type 27C240/27C4002
120 NCS1 CG0.10C - 16M-bit SOP44 mask ROM
121 NCS1 VOICE.7B - 16M-bit SOP44 mask ROM
122
123 Abnormal Check
124 -------------------------
125 AN1 MAIN0B.14E - 512k x16-bit EPROM type 27C240/27C4002
126 AN1 MAIN1B.13E - 512k x16-bit EPROM type 27C240/27C4002
127 AN1 SUB.1D - 512k x16-bit EPROM type 27C240/27C4002
128 AN1 CG0.10E - 16M-bit SOP44 mask ROM
129 AN1 CG1.10F - 16M-bit SOP44 mask ROM
130 AN1 VOICE.7C - 16M-bit SOP44 mask ROM
131
132
133 ------------------------------------------------------
134 Additional Guru-Readme for Abnormal Check (Namco 1996)
135 ------------------------------------------------------
136
137 Main PCB is common Namco ND-1 hardware documented above.
138 Several parts that were not populated on the GAME/GAME(B) PCB near the NAMCO48 connector
139 are populated on this revision and the NAMCO48 connector is used.
140 Because of the changes the PCB is marked 'GAME(C) PCB' with numbers 8655960500 (8655970500).
141 The other main difference is the presence of an extra connector on one edge between
142 the 68000 and the C416, labelled J3.
143 Most of the parts on the GAME(C) PCB have different locations, however the PCB appears
144 to be electrically identical to the earlier revision ND-1 GAME PCB.
145
146 There is an extra daughter board 115mm x 110mm plugged into connector J3.
147 The PCB is marked "M122 MEM/PRN PCB 1507960103 (1507970103)
148 The PCB contains the following parts....
149 1x ST 27C4002 EPROM (DIP40 at IC1)
150 2x ST M48Z30Y ZEROPOWER RAM (DIP28 at IC2 & IC3)
151 2x 74HC244 logic (SOIC20)
152 2x Toshiba TD64064 Darlington Driver (SOIC18)
153 1x AMD MACH120 CPLD (PLCC68 at IC8)
154 1x 10-pin JST connector labelled J11 for connection to the printer.
155 1x 20-pin flat cable connector labelled J12 for connection to the printer.
156
157 Partial Pinout of J12
158 ----------------------
159 GND 10b 10a GND
160 ERROR 9b 9a
161 EMPTY 8b 8a BUSY
162 7b 7a
163 6b 6a
164 5b 5a
165 4b 4a
166 3b 3a
167 +12V 2b 2a +5V
168 GND 1b 1a GND
169
170 To get the board to boot some pins on the J12 connector must be set to 0 or 1 (tied to ground or +5V).
171 The status can be checked in test mode in the "Printer Test" menu.
172 ERROR = HIGH (No Error)
173 EMPTY = LOW (Not Empty)
174 BUSY = LOW (Ready)
175
176 Connected to J11/J12 is a thermal printer. It prints on a roll of 2 1/4" wide thermal paper.
177 Bolted onto the metal frame is a small 80mm square PCB. There is no manufacturer name on it
178 and only some numbers/letters "32-104C SEC-A"
179 The PCB contains the following parts....
180 1x 27C010 128k x8-bit EPROM (DIP32 at U9)
181 1x 16M-bit mask ROM (SOP44 at U4)
182 1x 8-position DIP Switch labelled SW1. Position 2 is on, all others are off
183 1x NEC uPC393 Dual Comparitor (SIL9)
184 1x Sanyo LB1650 Dual-Directional Motor Driver (DIP16)
185 1x Maxim MAX202 RS232 Transceiver (SOIC16)
186 1x Toshiba TC55257 32k x8-bit SRAM (TSOP28)
187 1x Toshiba TMP95C061AF TLCS90/900 compatible 16-bit Micro-Controller (TQFP100). Note there is no internal ROM capability.
188 Some logic, resistors/caps/transistors, some connectors etc.
189
190 *************************************************************/
191
192 #include "emu.h"
193 #include "includes/namcond1.h"
194
195 #include "cpu/h8/h83002.h"
196 #include "cpu/m68000/m68000.h"
197 #include "machine/at28c16.h"
198 #include "sound/c352.h"
199 #include "screen.h"
200 #include "speaker.h"
201
202
203 /*************************************************************/
204
namcond1_map(address_map & map)205 void namcond1_state::namcond1_map(address_map &map)
206 {
207 map(0x000000, 0x0fffff).rom();
208 map(0x400000, 0x40ffff).ram().share("shared_ram");
209 map(0x800000, 0x80000f).m(m_ygv608, FUNC(ygv608_device::port_map)).umask16(0xff00);
210 map(0xa00000, 0xa00fff).rw("at28c16", FUNC(at28c16_device::read), FUNC(at28c16_device::write)).umask16(0xff00);
211 map(0xc3ff00, 0xc3ffff).rw(FUNC(namcond1_state::cuskey_r), FUNC(namcond1_state::cuskey_w));
212 }
213
abcheck_map(address_map & map)214 void namcond1_state::abcheck_map(address_map &map)
215 {
216 map(0x000000, 0x0fffff).rom();
217 map(0x400000, 0x40ffff).ram().share("shared_ram");
218 map(0x600000, 0x607fff).ram().share("zpr1");
219 map(0x608000, 0x60ffff).ram().share("zpr2");
220 map(0x700000, 0x700001).nopw();
221 map(0x740000, 0x740001).nopw();
222 map(0x780000, 0x780001).r(FUNC(namcond1_state::printer_r));
223 map(0x800000, 0x80000f).m(m_ygv608, FUNC(ygv608_device::port_map)).umask16(0xff00);
224 map(0xa00000, 0xa00fff).rw("at28c16", FUNC(at28c16_device::read), FUNC(at28c16_device::write)).umask16(0xff00);
225 map(0xc3ff00, 0xc3ffff).rw(FUNC(namcond1_state::cuskey_r), FUNC(namcond1_state::cuskey_w));
226 }
227
printer_r()228 uint16_t namcond1_state::printer_r()
229 {
230 // bits tested:
231 // bit 2 = 0 for paper cut switch on, 1 for off
232 // bit 4 = 0 for paper OK, 1 for empty
233 // bit 5 = 1 for normal status, 0 for error
234 return 0x0020;
235 }
236
237 /*************************************************************/
238
239 static INPUT_PORTS_START( namcond1 )
240 PORT_START("P1_P2")
241 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT )
242 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT )
243 PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN )
244 PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_UP )
245 PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 )
246 PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 )
247 PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 )
248 PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START1 )
249 PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_PLAYER(2)
250 PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_PLAYER(2)
251 PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_PLAYER(2)
252 PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_PLAYER(2)
253 PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
254 PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
255 PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
256 PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_START2 )
257
258 PORT_START("DSW")
259 PORT_DIPNAME( 0x0100, 0x0100, "Freeze" )
DEF_STR(Off)260 PORT_DIPSETTING( 0x0100, DEF_STR( Off ) )
261 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
262 PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Test ) )
263 PORT_DIPSETTING( 0x0200, DEF_STR( Off ) )
264 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
265 PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_COIN1 )
266 PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_COIN2 )
267 PORT_SERVICE( 0x4000, IP_ACTIVE_LOW )
268 PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_SERVICE1 )
269 PORT_BIT( 0x00ff, IP_ACTIVE_LOW, IPT_UNUSED )
270 INPUT_PORTS_END
271
272 static INPUT_PORTS_START( gynotai )
273 PORT_INCLUDE( namcond1 )
274
275 PORT_MODIFY("P1_P2")
276 // TODO: these are presumably ball sensors
277 PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Left 1")
278 PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Left 2")
279 PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Center 1")
280 PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("Center 2")
281 PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON5 ) PORT_NAME("Right 1")
282 PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON6 ) PORT_NAME("Right 2")
283 PORT_BIT( 0xffc0, IP_ACTIVE_LOW, IPT_UNUSED )
284 INPUT_PORTS_END
285
286 static INPUT_PORTS_START( abcheck )
287 PORT_INCLUDE( namcond1 )
288
289 PORT_MODIFY("P1_P2")
290 PORT_BIT( 0x000f, IP_ACTIVE_LOW, IPT_UNUSED )
291 PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1) PORT_NAME("P1 A")
292 PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1) PORT_NAME("P1 B")
293 PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2) PORT_NAME("P2 A")
294 PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNUSED )
295 PORT_BIT( 0x0f00, IP_ACTIVE_LOW, IPT_UNUSED )
296 PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2) PORT_NAME("P2 B")
297 PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3) PORT_NAME("P3 A")
298 PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3) PORT_NAME("P3 B")
299 PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNUSED )
300
301 PORT_MODIFY("DSW")
302 PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNUSED )
303 PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_COIN1 )
304 INPUT_PORTS_END
305
306
307 uint16_t namcond1_state::mcu_p7_read()
308 {
309 return 0xff;
310 }
311
mcu_pa_read()312 uint16_t namcond1_state::mcu_pa_read()
313 {
314 return 0xff;
315 }
316
mcu_pa_write(uint16 data)317 void namcond1_state::mcu_pa_write(uint16 data)
318 {
319 m_p8 = data;
320 }
321
322 /* H8/3002 MCU stuff */
nd1h8rwmap(address_map & map)323 void namcond1_state::nd1h8rwmap(address_map &map)
324 {
325 map(0x000000, 0x07ffff).rom();
326 map(0x200000, 0x20ffff).ram().share("shared_ram");
327 map(0xa00000, 0xa07fff).rw("c352", FUNC(c352_device::read), FUNC(c352_device::write));
328 map(0xc00000, 0xc00001).portr("DSW");
329 map(0xc00002, 0xc00003).portr("P1_P2");
330 map(0xc00010, 0xc00011).noprw();
331 map(0xc00030, 0xc00031).noprw();
332 map(0xc00040, 0xc00041).noprw();
333 map(0xffff1a, 0xffff1b).noprw(); // abcheck
334 map(0xffff1e, 0xffff1f).noprw(); // ^
335 }
336
nd1h8iomap(address_map & map)337 void namcond1_state::nd1h8iomap(address_map &map)
338 {
339 map(h8_device::PORT_7, h8_device::PORT_7).r(FUNC(namcond1_state::mcu_p7_read));
340 map(h8_device::PORT_A, h8_device::PORT_A).rw(FUNC(namcond1_state::mcu_pa_read), FUNC(namcond1_state::mcu_pa_write));
341 map(h8_device::ADC_0, h8_device::ADC_3).noprw(); // MCU reads these, but the games have no analog controls
342 map(0x14, 0x17).nopr(); // abcheck
343 }
344
INTERRUPT_GEN_MEMBER(namcond1_state::mcu_interrupt)345 INTERRUPT_GEN_MEMBER(namcond1_state::mcu_interrupt)
346 {
347 if( m_h8_irq5_enabled )
348 {
349 device.execute().pulse_input_line(5, device.execute().minimum_quantum_time());
350 }
351 }
352
353 /******************************************
354 ND-1 Master clock = 49.152MHz
355 - 68000 = 12288000 (CLK/4)
356 - H8/3002 = 16384000 (CLK/3)
357 - The level 1 interrupt to the 68k has been measured at 60Hz.
358 *******************************************/
359
WRITE_LINE_MEMBER(namcond1_state::vblank_irq_w)360 WRITE_LINE_MEMBER( namcond1_state::vblank_irq_w )
361 {
362 m_maincpu->set_input_line(1, state ? ASSERT_LINE : CLEAR_LINE);
363 }
364
WRITE_LINE_MEMBER(namcond1_state::raster_irq_w)365 WRITE_LINE_MEMBER( namcond1_state::raster_irq_w )
366 {
367 m_maincpu->set_input_line(2, state ? ASSERT_LINE : CLEAR_LINE);
368 }
369
namcond1(machine_config & config)370 void namcond1_state::namcond1(machine_config &config)
371 {
372 /* basic machine hardware */
373 M68000(config, m_maincpu, XTAL(49'152'000)/4);
374 m_maincpu->set_addrmap(AS_PROGRAM, &namcond1_state::namcond1_map);
375 // m_maincpu->set_vblank_int("screen", FUNC(namcond1_state::irq1_line_hold));
376
377 H83002(config, m_mcu, XTAL(49'152'000)/3 );
378 m_mcu->set_addrmap(AS_PROGRAM, &namcond1_state::nd1h8rwmap);
379 m_mcu->set_addrmap(AS_IO, &namcond1_state::nd1h8iomap);
380 m_mcu->set_vblank_int("screen", FUNC(namcond1_state::mcu_interrupt));
381
382 config.set_maximum_quantum(attotime::from_hz(6000));
383
384 YGV608(config, m_ygv608, 0);
385 m_ygv608->vblank_callback().set(FUNC(namcond1_state::vblank_irq_w));
386 m_ygv608->raster_callback().set(FUNC(namcond1_state::raster_irq_w));
387 m_ygv608->set_screen("screen");
388
389 /* video hardware */
390 screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
391 /*
392 H 804 108 576 48 32
393 V 261 26 224 3 0
394 */
395 screen.set_raw( XTAL(49'152'000)/8, 804/2, 108/2, (108+576)/2, 261, 26, 26+224);
396 screen.set_screen_update("ygv608", FUNC(ygv608_device::update_screen));
397 screen.set_palette("ygv608");
398
399 /* sound hardware */
400 SPEAKER(config, "lspeaker").front_left();
401 SPEAKER(config, "rspeaker").front_right();
402
403 c352_device &c352(C352(config, "c352", XTAL(49'152'000)/2, 288));
404 c352.add_route(0, "lspeaker", 1.00);
405 c352.add_route(1, "rspeaker", 1.00);
406 //c352.add_route(2, "lspeaker", 1.00); // Second DAC not present.
407 //c352.add_route(3, "rspeaker", 1.00);
408
409 AT28C16(config, "at28c16", 0);
410 }
411
abcheck(machine_config & config)412 void namcond1_state::abcheck(machine_config &config)
413 {
414 namcond1(config);
415 m_maincpu->set_addrmap(AS_PROGRAM, &namcond1_state::abcheck_map);
416 // m_maincpu->set_vblank_int("screen", FUNC(namcond1_state::irq1_line_hold));
417
418 NVRAM(config, "zpr1", nvram_device::DEFAULT_ALL_0);
419 NVRAM(config, "zpr2", nvram_device::DEFAULT_ALL_0);
420 }
421
422 ROM_START( ncv1 )
423 ROM_REGION( 0x100000, "maincpu", 0 ) /* 16MB for Main CPU */
424 ROM_LOAD16_WORD( "nc2main0.14d", 0x00000, 0x80000, CRC(4ffc530b) SHA1(23d622d0261a3584236a77b2cefa522a0f46490e) )
425 ROM_LOAD16_WORD( "nc2main1.13d", 0x80000, 0x80000, CRC(26499a4e) SHA1(4af0c365713b4a51da684a3423b07cbb70d9599b) )
426
427 ROM_REGION( 0x80000, "mcu", 0 ) /* sub CPU */
428 ROM_LOAD( "nc1sub.1c", 0x00000, 0x80000, CRC(48ea0de2) SHA1(33e57c8d084a960ccbda462d18e355de44ec7ad9) )
429
430 ROM_REGION( 0x800000, "ygv608", 0 ) /* 2MB character generator */
431 ROM_LOAD( "nc1cg0.10c", 0x000000, 0x200000, CRC(355e7f29) SHA1(47d92c4e28c3610a620d3c9b3be558199477f6d8) )
432 ROM_RELOAD( 0x200000, 0x200000 )
433 ROM_RELOAD( 0x400000, 0x200000 )
434 ROM_RELOAD( 0x600000, 0x200000 )
435
436 ROM_REGION( 0x200000, "c352", 0 ) // Samples
437 ROM_LOAD( "nc1voice.7b", 0x000000, 0x200000, CRC(91c85bd6) SHA1(c2af8b1518b2b601f2b14c3f327e7e3eae9e29fc) )
438 ROM_END
439
440 ROM_START( ncv1j )
441 ROM_REGION( 0x100000, "maincpu", 0 ) /* 16MB for Main CPU */
442 ROM_LOAD16_WORD( "nc1main0.14d", 0x00000, 0x80000, CRC(48ce0b2b) SHA1(07dfca8ba935ee0151211f9eb4d453f2da1d4bd7) )
443 ROM_LOAD16_WORD( "nc1main1.13d", 0x80000, 0x80000, CRC(49f99235) SHA1(97afde7f7dddd8538de78a74325d0038cb1217f7) )
444
445 ROM_REGION( 0x80000, "mcu", 0 ) /* sub CPU */
446 ROM_LOAD( "nc1sub.1c", 0x00000, 0x80000, CRC(48ea0de2) SHA1(33e57c8d084a960ccbda462d18e355de44ec7ad9) )
447
448 ROM_REGION( 0x800000, "ygv608", 0 ) /* 2MB character generator */
449 ROM_LOAD( "nc1cg0.10c", 0x000000, 0x200000, CRC(355e7f29) SHA1(47d92c4e28c3610a620d3c9b3be558199477f6d8) )
450 ROM_RELOAD( 0x200000, 0x200000 )
451 ROM_RELOAD( 0x400000, 0x200000 )
452 ROM_RELOAD( 0x600000, 0x200000 )
453
454 ROM_REGION( 0x200000, "c352", 0 ) // Samples
455 ROM_LOAD( "nc1voice.7b", 0x000000, 0x200000, CRC(91c85bd6) SHA1(c2af8b1518b2b601f2b14c3f327e7e3eae9e29fc) )
456 ROM_END
457
458 ROM_START( ncv1j2 )
459 ROM_REGION( 0x100000, "maincpu", 0 ) /* 16MB for Main CPU */
460 ROM_LOAD16_WORD( "nc1main0b.14d", 0x00000, 0x80000, CRC(7207469d) SHA1(73faf1973a57c1bc2163e9ee3fe2febd3b8763a4) )
461 ROM_LOAD16_WORD( "nc1main1b.13d", 0x80000, 0x80000, CRC(52401b17) SHA1(60c9f20831d0101c02dafbc0bd15422f71f3ad81) )
462
463 ROM_REGION( 0x80000, "mcu", 0 ) /* sub CPU */
464 ROM_LOAD( "nc1sub.1c", 0x00000, 0x80000, CRC(48ea0de2) SHA1(33e57c8d084a960ccbda462d18e355de44ec7ad9) )
465
466 ROM_REGION( 0x800000, "ygv608", 0 ) /* 2MB character generator */
467 ROM_LOAD( "nc1cg0.10c", 0x000000, 0x200000, CRC(355e7f29) SHA1(47d92c4e28c3610a620d3c9b3be558199477f6d8) )
468 ROM_RELOAD( 0x200000, 0x200000 )
469 ROM_RELOAD( 0x400000, 0x200000 )
470 ROM_RELOAD( 0x600000, 0x200000 )
471
472 ROM_REGION( 0x200000, "c352", 0 ) // Samples
473 ROM_LOAD( "nc1voice.7b", 0x000000, 0x200000, CRC(91c85bd6) SHA1(c2af8b1518b2b601f2b14c3f327e7e3eae9e29fc) )
474 ROM_END
475
476 ROM_START( ncv2 )
477 ROM_REGION( 0x100000, "maincpu", 0 ) /* 16MB for Main CPU */
478 ROM_LOAD16_WORD( "ncs2main0.14e", 0x00000, 0x80000, CRC(fb8a4123) SHA1(47acdfe9b5441d0e3649aaa9780e676f760c4e42) )
479 ROM_LOAD16_WORD( "ncs2main1.13e", 0x80000, 0x80000, CRC(7a5ef23b) SHA1(0408742424a6abad512b5baff63409fe44353e10) )
480
481 ROM_REGION( 0x80000, "mcu", 0 ) /* sub CPU */
482 ROM_LOAD( "ncs1sub.1d", 0x00000, 0x80000, CRC(365cadbf) SHA1(7263220e1630239e3e88b828c00389d02628bd7d) )
483
484 ROM_REGION( 0x800000, "ygv608", 0 ) /* 4MB character generator */
485 ROM_LOAD( "ncs1cg0.10e", 0x000000, 0x200000, CRC(fdd24dbe) SHA1(4dceaae3d853075f58a7408be879afc91d80292e) )
486 ROM_RELOAD( 0x200000, 0x200000 )
487 ROM_LOAD( "ncs1cg1.10f", 0x400000, 0x200000, CRC(007b19de) SHA1(d3c093543511ec1dd2f8be6db45f33820123cabc) )
488 ROM_RELOAD( 0x600000, 0x200000 )
489
490 ROM_REGION( 0x200000, "c352", 0 ) // Samples
491 ROM_LOAD( "ncs1voic.7c", 0x000000, 0x200000, CRC(ed05fd88) SHA1(ad88632c89a9946708fc6b4c9247e1bae9b2944b) )
492 ROM_END
493
494 ROM_START( ncv2j )
495 ROM_REGION( 0x100000, "maincpu", 0 ) /* 16MB for Main CPU */
496 ROM_LOAD16_WORD( "ncs1main0.14e", 0x00000, 0x80000, CRC(99991192) SHA1(e0b0e15ae23560b77119b3d3e4b2d2bb9d8b36c9) )
497 ROM_LOAD16_WORD( "ncs1main1.13e", 0x80000, 0x80000, CRC(af4ba4f6) SHA1(ff5adfdd462cfd3f17fbe2401dfc88ff8c71b6f8) )
498
499 ROM_REGION( 0x80000, "mcu", 0 ) /* sub CPU */
500 ROM_LOAD("ncs1sub.1d", 0x00000, 0x80000, CRC(365cadbf) SHA1(7263220e1630239e3e88b828c00389d02628bd7d) )
501
502 ROM_REGION( 0x800000, "ygv608", 0 ) /* 4MB character generator */
503 ROM_LOAD( "ncs1cg0.10e", 0x000000, 0x200000, CRC(fdd24dbe) SHA1(4dceaae3d853075f58a7408be879afc91d80292e) )
504 ROM_RELOAD( 0x200000, 0x200000 )
505 ROM_LOAD( "ncs1cg1.10f", 0x400000, 0x200000, CRC(007b19de) SHA1(d3c093543511ec1dd2f8be6db45f33820123cabc) )
506 ROM_RELOAD( 0x600000, 0x200000 )
507
508 ROM_REGION( 0x1000000, "c352", 0 ) // Samples
509 ROM_LOAD( "ncs1voic.7c", 0x000000, 0x200000, CRC(ed05fd88) SHA1(ad88632c89a9946708fc6b4c9247e1bae9b2944b) )
510 ROM_END
511
512 ROM_START( gynotai )
513 ROM_REGION( 0x100000, "maincpu", 0 ) /* 16MB for Main CPU */
514 ROM_LOAD( "gy1main0.14e", 0x000000, 0x080000, CRC(1421dbf5) SHA1(7e4322cddc3317c9ed82a97c0fe387ce1364cf9b) )
515 ROM_LOAD( "gy1main1.13e", 0x080000, 0x080000, CRC(dc10a4a7) SHA1(01a6b5aae8599de9015d6e332f5bd286bc84c807) )
516
517 ROM_REGION( 0x80000, "mcu", 0 ) /* sub CPU */
518 ROM_LOAD( "gy1sub0.1d", 0x000000, 0x080000, CRC(fd31e963) SHA1(b658921dd29cfad0c366465ae37a356c3d2fb4d3) )
519
520 ROM_REGION( 0x800000, "ygv608", 0 ) /* 8MB character generator */
521 ROM_LOAD( "gy1cg0.10e", 0x000000, 0x400000, CRC(938c7912) SHA1(36278a945a00e1549ae55ec65a9b4001537023b0) )
522 ROM_LOAD( "gy1cg1.10f", 0x400000, 0x400000, CRC(5a518733) SHA1(b6ea91629bc6ddf67c47c4189084aa947f4e31ed) )
523
524 ROM_REGION( 0x200000, "c352", 0 ) // Samples
525 ROM_LOAD( "gy1voice.7c", 0x000000, 0x200000, CRC(f135e79b) SHA1(01ce3e3b366d0b9045ad8599b60ca33c6d21f150) )
526 ROM_END
527
528 ROM_START( abcheck )
529 ROM_REGION( 0x100000, "maincpu", 0 ) /* 16MB for Main CPU */
530 ROM_LOAD( "an1main0b.14e", 0x000000, 0x080000, CRC(f1b9777d) SHA1(b28f4106e1e145dc1aaa5af455b6f991d2b04c59) )
531 ROM_LOAD( "an1main1b.13e", 0x080000, 0x080000, CRC(d40ccdcc) SHA1(05f864d84bf34a1722c598378ed8d27fba00f575) )
532
533 ROM_REGION( 0x80000, "mcu", 0 ) /* sub CPU */
534 ROM_LOAD( "an1sub.1d", 0x000000, 0x080000, CRC(50de9130) SHA1(470b3977f4bf12ca65bc42631ccdf81753ef56fd) )
535
536 ROM_REGION( 0x800000, "ygv608", 0 ) /* 4MB character generator */
537 ROM_LOAD( "an1cg0.10e", 0x000000, 0x400000, CRC(14425378) SHA1(c690bd0f48fa2bc285b63e6bc379d2b345eafc7b) )
538 ROM_LOAD( "an1cg1.10f", 0x400000, 0x400000, CRC(0428d718) SHA1(4b4dca7196b9ba1a01558f41c761d3211be67fb0) )
539
540 ROM_REGION( 0x1000000, "c352", 0 ) // Samples
541 ROM_LOAD( "an1voice.7c", 0x000000, 0x200000, CRC(d2bfa453) SHA1(6b7d6bb4d65290d8fd3df5d12b41ae7dce5f3f1c) )
542
543 ROM_REGION( 0x80000, "data", 0 ) // game data?
544 ROM_LOAD( "an1dat0.ic1", 0x000000, 0x080000, CRC(44dc7da1) SHA1(dd57670a2b07c4988ca30bba134931c1701a926f) )
545
546 ROM_REGION( 0x8000, "zpr1", 0 )
547 ROM_LOAD( "m48z30y.ic2", 0x000000, 0x008000, CRC(a816d989) SHA1(c78fe06b049c31cf8de2a79025823dbc0c95d526) )
548
549 ROM_REGION( 0x8000, "zpr2", 0 )
550 ROM_LOAD( "m48z30y.ic3", 0x000000, 0x008000, CRC(bfa687bb) SHA1(463ae40f21b675f3b4155efda9c965b71519a49e) )
551
552 ROM_REGION( 0x800, "at28c16", 0 )
553 ROM_LOAD( "at28c16.12e", 0x000000, 0x000800, CRC(df92af14) SHA1(1ae8c318f1eb2628e97914d15a06779c7bb87506) )
554
555 ROM_REGION( 0x220000, "printer", 0 )
556 ROM_LOAD( "np-b205_nmc_ver1.00.u9", 0x000000, 0x020000, CRC(445ceb0d) SHA1(49491b936f50577564196992df3a3c93aa3fcc99) )
557 ROM_LOAD( "npg1624lc.u4", 0x020000, 0x200000, CRC(7e00254f) SHA1(b0fa8f979e8322d71f842de5358ae2a2e36386f7) )
558 ROM_END
559
560
561 // fwiw it looks like version numbering at POST is for the ND1 framework build the games are based on.
562 GAME( 1995, ncv1, 0, namcond1, namcond1, namcond1_state, empty_init, ROT90, "Namco", "Namco Classic Collection Vol.1", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) // 1.00
563 GAME( 1995, ncv1j, ncv1, namcond1, namcond1, namcond1_state, empty_init, ROT90, "Namco", "Namco Classic Collection Vol.1 (Japan, v1.00)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE )
564 GAME( 1995, ncv1j2, ncv1, namcond1, namcond1, namcond1_state, empty_init, ROT90, "Namco", "Namco Classic Collection Vol.1 (Japan, v1.03)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) // 1.03
565 GAME( 1996, gynotai, 0, namcond1, gynotai, namcond1_state, empty_init, ROT0, "Namco", "Gynotai (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NOT_WORKING | MACHINE_NODEVICE_PRINTER | MACHINE_MECHANICAL | MACHINE_SUPPORTS_SAVE ) // 1.04
566 GAME( 1996, ncv2, 0, namcond1, namcond1, namcond1_state, empty_init, ROT90, "Namco", "Namco Classic Collection Vol.2", MACHINE_IMPERFECT_GRAPHICS | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE ) // 1.10
567 GAME( 1996, ncv2j, ncv2, namcond1, namcond1, namcond1_state, empty_init, ROT90, "Namco", "Namco Classic Collection Vol.2 (Japan)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE )
568 GAME( 1996, abcheck, 0, abcheck, abcheck, namcond1_state, empty_init, ROT0, "Namco", "Abnormal Check", MACHINE_IMPERFECT_GRAPHICS | MACHINE_UNEMULATED_PROTECTION | MACHINE_NODEVICE_PRINTER | MACHINE_SUPPORTS_SAVE ) // 1.20EM
569