1 /*
2 **
3 ** File: ym2413.c - software implementation of YM2413
4 ** FM sound generator type OPLL
5 **
6 ** Copyright Jarek Burczynski
7 **
8 ** Version 1.0
9 **
10
11 Features as listed in LSI-212413A2 data sheet:
12 1. FM Sound Generator for real sound creation.
13 2. Two Selectable modes: 9 simultaneous sounds or 6 melody sounds plus 5 rhythm sounds
14 (different tones can be used together in either case).
15 3. Built-in Instruments data (15 melody tones, 5 rhythm tones, "CAPTAIN and TELETEXT applicalbe tones).
16 4. Built-in DA Converter.
17 5. Built-in Quartz Oscillator.
18 6. Built-in Vibrato Oscillator/AM Oscillator
19 7. TTL Compatible Input.
20 8. Si-Gate NMOS LSI
21 9. A single 5V power source.
22
23 to do:
24
25 - make sure of the sinus amplitude bits
26
27 - make sure of the EG resolution bits (looks like the biggest
28 modulation index generated by the modulator is 123, 124 = no modulation)
29 - find proper algorithm for attack phase of EG
30
31 - tune up instruments ROM
32
33 - support sample replay in test mode (it is NOT as simple as setting bit 0
34 in register 0x0f and using register 0x10 for sample data).
35 Which games use this feature ?
36
37
38 */
39
40 #include <stdio.h>
41 #include <math.h>
42 #include "mamedef.h"
43 #include <stdlib.h>
44 #include <memory.h>
45 //#include "sndintrf.h"
46 #include "ym2413.h"
47
48 #define NULL ((void *)0)
49
50 /* output final shift */
51 #if (SAMPLE_BITS==16)
52 #define FINAL_SH (0)
53 #define MAXOUT (+32767)
54 #define MINOUT (-32768)
55 #else
56 #define FINAL_SH (8)
57 #define MAXOUT (+127)
58 #define MINOUT (-128)
59 #endif
60
61
62 #define FREQ_SH 16 /* 16.16 fixed point (frequency calculations) */
63 #define EG_SH 16 /* 16.16 fixed point (EG timing) */
64 #define LFO_SH 24 /* 8.24 fixed point (LFO calculations) */
65
66 #define FREQ_MASK ((1<<FREQ_SH)-1)
67
68 /* envelope output entries */
69 #define ENV_BITS 10
70 #define ENV_LEN (1<<ENV_BITS)
71 #define ENV_STEP (128.0/ENV_LEN)
72
73 #define MAX_ATT_INDEX ((1<<(ENV_BITS-2))-1) /*255*/
74 #define MIN_ATT_INDEX (0)
75
76 /* sinwave entries */
77 #define SIN_BITS 10
78 #define SIN_LEN (1<<SIN_BITS)
79 #define SIN_MASK (SIN_LEN-1)
80
81 #define TL_RES_LEN (256) /* 8 bits addressing (real chip) */
82
83
84
85 /* register number to channel number , slot offset */
86 #define SLOT1 0
87 #define SLOT2 1
88
89 /* Envelope Generator phases */
90
91 #define EG_DMP 5
92 #define EG_ATT 4
93 #define EG_DEC 3
94 #define EG_SUS 2
95 #define EG_REL 1
96 #define EG_OFF 0
97
98
99 /* save output as raw 16-bit sample */
100
101 //#define SAVE_SAMPLE
102
103 #ifdef SAVE_SAMPLE
104 #include <stdio.h>
105
acc_calc(signed int value)106 INLINE signed int acc_calc(signed int value)
107 {
108 if (value>=0)
109 {
110 if (value < 0x0200)
111 return (value & ~0);
112 if (value < 0x0400)
113 return (value & ~1);
114 if (value < 0x0800)
115 return (value & ~3);
116 if (value < 0x1000)
117 return (value & ~7);
118 if (value < 0x2000)
119 return (value & ~15);
120 if (value < 0x4000)
121 return (value & ~31);
122 return (value & ~63);
123 }
124 /*else value < 0*/
125 if (value > -0x0200)
126 return (~abs(value) & ~0);
127 if (value > -0x0400)
128 return (~abs(value) & ~1);
129 if (value > -0x0800)
130 return (~abs(value) & ~3);
131 if (value > -0x1000)
132 return (~abs(value) & ~7);
133 if (value > -0x2000)
134 return (~abs(value) & ~15);
135 if (value > -0x4000)
136 return (~abs(value) & ~31);
137 return (~abs(value) & ~63);
138 }
139
140
141 static FILE *sample[1];
142 #if 0 /*save to MONO file */
143 #define SAVE_ALL_CHANNELS \
144 { signed int pom = acc_calc(mo); \
145 fputc((unsigned short)pom&0xff,sample[0]); \
146 fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
147 }
148 #else /*save to STEREO file */
149 #define SAVE_ALL_CHANNELS \
150 { signed int pom = mo; \
151 fputc((unsigned short)pom&0xff,sample[0]); \
152 fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
153 pom = ro; \
154 fputc((unsigned short)pom&0xff,sample[0]); \
155 fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
156 }
157 #define SAVE_SEPARATE_CHANNEL(j) \
158 { signed int pom = outchan; \
159 fputc((unsigned short)pom&0xff,sample[0]); \
160 fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
161 pom = chip->instvol_r[j]>>4; \
162 fputc((unsigned short)pom&0xff,sample[0]); \
163 fputc(((unsigned short)pom>>8)&0xff,sample[0]); \
164 }
165 #endif
166 #endif
167
168 //#define LOG_CYM_FILE 0
169 //static FILE * cymfile = NULL;
170
171
172
173
174 typedef struct{
175 UINT32 ar; /* attack rate: AR<<2 */
176 UINT32 dr; /* decay rate: DR<<2 */
177 UINT32 rr; /* release rate:RR<<2 */
178 UINT8 KSR; /* key scale rate */
179 UINT8 ksl; /* keyscale level */
180 UINT8 ksr; /* key scale rate: kcode>>KSR */
181 UINT8 mul; /* multiple: mul_tab[ML] */
182
183 /* Phase Generator */
184 UINT32 phase; /* frequency counter */
185 UINT32 freq; /* frequency counter step */
186 UINT8 fb_shift; /* feedback shift value */
187 INT32 op1_out[2]; /* slot1 output for feedback */
188
189 /* Envelope Generator */
190 UINT8 eg_type; /* percussive/nonpercussive mode*/
191 UINT8 state; /* phase type */
192 UINT32 TL; /* total level: TL << 2 */
193 INT32 TLL; /* adjusted now TL */
194 INT32 volume; /* envelope counter */
195 UINT32 sl; /* sustain level: sl_tab[SL] */
196
197 UINT8 eg_sh_dp; /* (dump state) */
198 UINT8 eg_sel_dp; /* (dump state) */
199 UINT8 eg_sh_ar; /* (attack state) */
200 UINT8 eg_sel_ar; /* (attack state) */
201 UINT8 eg_sh_dr; /* (decay state) */
202 UINT8 eg_sel_dr; /* (decay state) */
203 UINT8 eg_sh_rr; /* (release state for non-perc.)*/
204 UINT8 eg_sel_rr; /* (release state for non-perc.)*/
205 UINT8 eg_sh_rs; /* (release state for perc.mode)*/
206 UINT8 eg_sel_rs; /* (release state for perc.mode)*/
207
208 UINT32 key; /* 0 = KEY OFF, >0 = KEY ON */
209
210 /* LFO */
211 UINT32 AMmask; /* LFO Amplitude Modulation enable mask */
212 UINT8 vib; /* LFO Phase Modulation enable flag (active high)*/
213
214 /* waveform select */
215 unsigned int wavetable;
216 } OPLL_SLOT;
217
218 typedef struct{
219 OPLL_SLOT SLOT[2];
220 /* phase generator state */
221 UINT32 block_fnum; /* block+fnum */
222 UINT32 fc; /* Freq. freqement base */
223 UINT32 ksl_base; /* KeyScaleLevel Base step */
224 UINT8 kcode; /* key code (for key scaling) */
225 UINT8 sus; /* sus on/off (release speed in percussive mode)*/
226 UINT8 Muted;
227 } OPLL_CH;
228
229 /* chip state */
230 typedef struct {
231 OPLL_CH P_CH[9]; /* OPLL chips have 9 channels*/
232 UINT8 instvol_r[9]; /* instrument/volume (or volume/volume in percussive mode)*/
233 UINT8 MuteSpc[5]; /* Mute Special: 5 Rhythm */
234
235 UINT32 eg_cnt; /* global envelope generator counter */
236 UINT32 eg_timer; /* global envelope generator counter works at frequency = chipclock/72 */
237 UINT32 eg_timer_add; /* step of eg_timer */
238 UINT32 eg_timer_overflow; /* envelope generator timer overlfows every 1 sample (on real chip) */
239
240 UINT8 rhythm; /* Rhythm mode */
241
242 /* LFO */
243 UINT32 LFO_AM;
244 INT32 LFO_PM;
245 UINT32 lfo_am_cnt;
246 UINT32 lfo_am_inc;
247 UINT32 lfo_pm_cnt;
248 UINT32 lfo_pm_inc;
249
250 UINT32 noise_rng; /* 23 bit noise shift register */
251 UINT32 noise_p; /* current noise 'phase' */
252 UINT32 noise_f; /* current noise period */
253
254
255 /* instrument settings */
256 /*
257 0-user instrument
258 1-15 - fixed instruments
259 16 -bass drum settings
260 17,18 - other percussion instruments
261 */
262 UINT8 inst_tab[19][8];
263
264 /* external event callback handlers */
265 OPLL_UPDATEHANDLER UpdateHandler; /* stream update handler */
266 void * UpdateParam; /* stream update parameter */
267
268 UINT32 fn_tab[1024]; /* fnumber->increment counter */
269
270 UINT8 address; /* address register */
271 UINT8 status; /* status flag */
272
273 UINT8 VRC7_Mode;
274 int clock; /* master clock (Hz) */
275 int rate; /* sampling rate (Hz) */
276 double freqbase; /* frequency base */
277
278 signed int output[2];
279 signed int outchan;
280 } YM2413;
281
282 /* key scale level */
283 /* table is 3dB/octave, DV converts this into 6dB/octave */
284 /* 0.1875 is bit 0 weight of the envelope counter (volume) expressed in the 'decibel' scale */
285 #define DV (0.1875/1.0)
286 static const UINT32 ksl_tab[8*16]=
287 {
288 /* OCT 0 */
289 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
290 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
291 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
292 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
293 /* OCT 1 */
294 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
295 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
296 0.000/DV, 0.750/DV, 1.125/DV, 1.500/DV,
297 1.875/DV, 2.250/DV, 2.625/DV, 3.000/DV,
298 /* OCT 2 */
299 0.000/DV, 0.000/DV, 0.000/DV, 0.000/DV,
300 0.000/DV, 1.125/DV, 1.875/DV, 2.625/DV,
301 3.000/DV, 3.750/DV, 4.125/DV, 4.500/DV,
302 4.875/DV, 5.250/DV, 5.625/DV, 6.000/DV,
303 /* OCT 3 */
304 0.000/DV, 0.000/DV, 0.000/DV, 1.875/DV,
305 3.000/DV, 4.125/DV, 4.875/DV, 5.625/DV,
306 6.000/DV, 6.750/DV, 7.125/DV, 7.500/DV,
307 7.875/DV, 8.250/DV, 8.625/DV, 9.000/DV,
308 /* OCT 4 */
309 0.000/DV, 0.000/DV, 3.000/DV, 4.875/DV,
310 6.000/DV, 7.125/DV, 7.875/DV, 8.625/DV,
311 9.000/DV, 9.750/DV,10.125/DV,10.500/DV,
312 10.875/DV,11.250/DV,11.625/DV,12.000/DV,
313 /* OCT 5 */
314 0.000/DV, 3.000/DV, 6.000/DV, 7.875/DV,
315 9.000/DV,10.125/DV,10.875/DV,11.625/DV,
316 12.000/DV,12.750/DV,13.125/DV,13.500/DV,
317 13.875/DV,14.250/DV,14.625/DV,15.000/DV,
318 /* OCT 6 */
319 0.000/DV, 6.000/DV, 9.000/DV,10.875/DV,
320 12.000/DV,13.125/DV,13.875/DV,14.625/DV,
321 15.000/DV,15.750/DV,16.125/DV,16.500/DV,
322 16.875/DV,17.250/DV,17.625/DV,18.000/DV,
323 /* OCT 7 */
324 0.000/DV, 9.000/DV,12.000/DV,13.875/DV,
325 15.000/DV,16.125/DV,16.875/DV,17.625/DV,
326 18.000/DV,18.750/DV,19.125/DV,19.500/DV,
327 19.875/DV,20.250/DV,20.625/DV,21.000/DV
328 };
329 #undef DV
330
331 /* 0 / 1.5 / 3.0 / 6.0 dB/OCT, confirmed on a real YM2413 (the application manual is incorrect) */
332 static const UINT32 ksl_shift[4] = { 31, 2, 1, 0 };
333
334
335 /* sustain level table (3dB per step) */
336 /* 0 - 15: 0, 3, 6, 9,12,15,18,21,24,27,30,33,36,39,42,45 (dB)*/
337 #define SC(db) (UINT32) ( db * (1.0/ENV_STEP) )
338 static const UINT32 sl_tab[16]={
339 SC( 0),SC( 1),SC( 2),SC(3 ),SC(4 ),SC(5 ),SC(6 ),SC( 7),
340 SC( 8),SC( 9),SC(10),SC(11),SC(12),SC(13),SC(14),SC(15)
341 };
342 #undef SC
343
344
345 #define RATE_STEPS (8)
346 static const unsigned char eg_inc[15*RATE_STEPS]={
347
348 /*cycle:0 1 2 3 4 5 6 7*/
349
350 /* 0 */ 0,1, 0,1, 0,1, 0,1, /* rates 00..12 0 (increment by 0 or 1) */
351 /* 1 */ 0,1, 0,1, 1,1, 0,1, /* rates 00..12 1 */
352 /* 2 */ 0,1, 1,1, 0,1, 1,1, /* rates 00..12 2 */
353 /* 3 */ 0,1, 1,1, 1,1, 1,1, /* rates 00..12 3 */
354
355 /* 4 */ 1,1, 1,1, 1,1, 1,1, /* rate 13 0 (increment by 1) */
356 /* 5 */ 1,1, 1,2, 1,1, 1,2, /* rate 13 1 */
357 /* 6 */ 1,2, 1,2, 1,2, 1,2, /* rate 13 2 */
358 /* 7 */ 1,2, 2,2, 1,2, 2,2, /* rate 13 3 */
359
360 /* 8 */ 2,2, 2,2, 2,2, 2,2, /* rate 14 0 (increment by 2) */
361 /* 9 */ 2,2, 2,4, 2,2, 2,4, /* rate 14 1 */
362 /*10 */ 2,4, 2,4, 2,4, 2,4, /* rate 14 2 */
363 /*11 */ 2,4, 4,4, 2,4, 4,4, /* rate 14 3 */
364
365 /*12 */ 4,4, 4,4, 4,4, 4,4, /* rates 15 0, 15 1, 15 2, 15 3 (increment by 4) */
366 /*13 */ 8,8, 8,8, 8,8, 8,8, /* rates 15 2, 15 3 for attack */
367 /*14 */ 0,0, 0,0, 0,0, 0,0, /* infinity rates for attack and decay(s) */
368 };
369
370
371 #define O(a) (a*RATE_STEPS)
372
373 /*note that there is no O(13) in this table - it's directly in the code */
374 static const unsigned char eg_rate_select[16+64+16]={ /* Envelope Generator rates (16 + 64 rates + 16 RKS) */
375 /* 16 infinite time rates */
376 O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
377 O(14),O(14),O(14),O(14),O(14),O(14),O(14),O(14),
378
379 /* rates 00-12 */
380 O( 0),O( 1),O( 2),O( 3),
381 O( 0),O( 1),O( 2),O( 3),
382 O( 0),O( 1),O( 2),O( 3),
383 O( 0),O( 1),O( 2),O( 3),
384 O( 0),O( 1),O( 2),O( 3),
385 O( 0),O( 1),O( 2),O( 3),
386 O( 0),O( 1),O( 2),O( 3),
387 O( 0),O( 1),O( 2),O( 3),
388 O( 0),O( 1),O( 2),O( 3),
389 O( 0),O( 1),O( 2),O( 3),
390 O( 0),O( 1),O( 2),O( 3),
391 O( 0),O( 1),O( 2),O( 3),
392 O( 0),O( 1),O( 2),O( 3),
393
394 /* rate 13 */
395 O( 4),O( 5),O( 6),O( 7),
396
397 /* rate 14 */
398 O( 8),O( 9),O(10),O(11),
399
400 /* rate 15 */
401 O(12),O(12),O(12),O(12),
402
403 /* 16 dummy rates (same as 15 3) */
404 O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
405 O(12),O(12),O(12),O(12),O(12),O(12),O(12),O(12),
406
407 };
408 #undef O
409
410 /*rate 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 */
411 /*shift 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0, 0, 0 */
412 /*mask 8191, 4095, 2047, 1023, 511, 255, 127, 63, 31, 15, 7, 3, 1, 0, 0, 0 */
413
414 #define O(a) (a*1)
415 static const unsigned char eg_rate_shift[16+64+16]={ /* Envelope Generator counter shifts (16 + 64 rates + 16 RKS) */
416 /* 16 infinite time rates */
417 O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
418 O(0),O(0),O(0),O(0),O(0),O(0),O(0),O(0),
419
420 /* rates 00-12 */
421 O(13),O(13),O(13),O(13),
422 O(12),O(12),O(12),O(12),
423 O(11),O(11),O(11),O(11),
424 O(10),O(10),O(10),O(10),
425 O( 9),O( 9),O( 9),O( 9),
426 O( 8),O( 8),O( 8),O( 8),
427 O( 7),O( 7),O( 7),O( 7),
428 O( 6),O( 6),O( 6),O( 6),
429 O( 5),O( 5),O( 5),O( 5),
430 O( 4),O( 4),O( 4),O( 4),
431 O( 3),O( 3),O( 3),O( 3),
432 O( 2),O( 2),O( 2),O( 2),
433 O( 1),O( 1),O( 1),O( 1),
434
435 /* rate 13 */
436 O( 0),O( 0),O( 0),O( 0),
437
438 /* rate 14 */
439 O( 0),O( 0),O( 0),O( 0),
440
441 /* rate 15 */
442 O( 0),O( 0),O( 0),O( 0),
443
444 /* 16 dummy rates (same as 15 3) */
445 O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
446 O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),O( 0),
447
448 };
449 #undef O
450
451
452 /* multiple table */
453 #define ML 2
454 static const UINT8 mul_tab[16]= {
455 /* 1/2, 1, 2, 3, 4, 5, 6, 7, 8, 9,10,10,12,12,15,15 */
456 0.50*ML, 1.00*ML, 2.00*ML, 3.00*ML, 4.00*ML, 5.00*ML, 6.00*ML, 7.00*ML,
457 8.00*ML, 9.00*ML,10.00*ML,10.00*ML,12.00*ML,12.00*ML,15.00*ML,15.00*ML
458 };
459 #undef ML
460
461 /* TL_TAB_LEN is calculated as:
462 * 11 - sinus amplitude bits (Y axis)
463 * 2 - sinus sign bit (Y axis)
464 * TL_RES_LEN - sinus resolution (X axis)
465 */
466 #define TL_TAB_LEN (11*2*TL_RES_LEN)
467 static signed int tl_tab[TL_TAB_LEN];
468
469 #define ENV_QUIET (TL_TAB_LEN>>5)
470
471 /* sin waveform table in 'decibel' scale */
472 /* two waveforms on OPLL type chips */
473 static unsigned int sin_tab[SIN_LEN * 2];
474
475
476 /* LFO Amplitude Modulation table (verified on real YM3812)
477 27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples
478
479 Length: 210 elements.
480
481 Each of the elements has to be repeated
482 exactly 64 times (on 64 consecutive samples).
483 The whole table takes: 64 * 210 = 13440 samples.
484
485 We use data>>1, until we find what it really is on real chip...
486
487 */
488
489 #define LFO_AM_TAB_ELEMENTS 210
490
491 static const UINT8 lfo_am_table[LFO_AM_TAB_ELEMENTS] = {
492 0,0,0,0,0,0,0,
493 1,1,1,1,
494 2,2,2,2,
495 3,3,3,3,
496 4,4,4,4,
497 5,5,5,5,
498 6,6,6,6,
499 7,7,7,7,
500 8,8,8,8,
501 9,9,9,9,
502 10,10,10,10,
503 11,11,11,11,
504 12,12,12,12,
505 13,13,13,13,
506 14,14,14,14,
507 15,15,15,15,
508 16,16,16,16,
509 17,17,17,17,
510 18,18,18,18,
511 19,19,19,19,
512 20,20,20,20,
513 21,21,21,21,
514 22,22,22,22,
515 23,23,23,23,
516 24,24,24,24,
517 25,25,25,25,
518 26,26,26,
519 25,25,25,25,
520 24,24,24,24,
521 23,23,23,23,
522 22,22,22,22,
523 21,21,21,21,
524 20,20,20,20,
525 19,19,19,19,
526 18,18,18,18,
527 17,17,17,17,
528 16,16,16,16,
529 15,15,15,15,
530 14,14,14,14,
531 13,13,13,13,
532 12,12,12,12,
533 11,11,11,11,
534 10,10,10,10,
535 9,9,9,9,
536 8,8,8,8,
537 7,7,7,7,
538 6,6,6,6,
539 5,5,5,5,
540 4,4,4,4,
541 3,3,3,3,
542 2,2,2,2,
543 1,1,1,1
544 };
545
546 /* LFO Phase Modulation table (verified on real YM2413) */
547 static const INT8 lfo_pm_table[8*8] = {
548
549 /* FNUM2/FNUM = 0 00xxxxxx (0x0000) */
550 0, 0, 0, 0, 0, 0, 0, 0,
551
552 /* FNUM2/FNUM = 0 01xxxxxx (0x0040) */
553 1, 0, 0, 0,-1, 0, 0, 0,
554
555 /* FNUM2/FNUM = 0 10xxxxxx (0x0080) */
556 2, 1, 0,-1,-2,-1, 0, 1,
557
558 /* FNUM2/FNUM = 0 11xxxxxx (0x00C0) */
559 3, 1, 0,-1,-3,-1, 0, 1,
560
561 /* FNUM2/FNUM = 1 00xxxxxx (0x0100) */
562 4, 2, 0,-2,-4,-2, 0, 2,
563
564 /* FNUM2/FNUM = 1 01xxxxxx (0x0140) */
565 5, 2, 0,-2,-5,-2, 0, 2,
566
567 /* FNUM2/FNUM = 1 10xxxxxx (0x0180) */
568 6, 3, 0,-3,-6,-3, 0, 3,
569
570 /* FNUM2/FNUM = 1 11xxxxxx (0x01C0) */
571 7, 3, 0,-3,-7,-3, 0, 3,
572 };
573
574
575
576
577
578
579 /* This is not 100% perfect yet but very close */
580 /*
581 - multi parameters are 100% correct (instruments and drums)
582 - LFO PM and AM enable are 100% correct
583 - waveform DC and DM select are 100% correct
584 */
585
586 static const unsigned char table[19][8] = {
587 /* MULT MULT modTL DcDmFb AR/DR AR/DR SL/RR SL/RR */
588 /* 0 1 2 3 4 5 6 7 */
589 {0x49, 0x4c, 0x4c, 0x12, 0x00, 0x00, 0x00, 0x00 }, //0
590
591 {0x61, 0x61, 0x1e, 0x17, 0xf0, 0x78, 0x00, 0x17 }, //1
592 {0x13, 0x41, 0x1e, 0x0d, 0xd7, 0xf7, 0x13, 0x13 }, //2
593 {0x13, 0x01, 0x99, 0x04, 0xf2, 0xf4, 0x11, 0x23 }, //3
594 {0x21, 0x61, 0x1b, 0x07, 0xaf, 0x64, 0x40, 0x27 }, //4
595
596 //{0x22, 0x21, 0x1e, 0x09, 0xf0, 0x76, 0x08, 0x28 }, //5
597 {0x22, 0x21, 0x1e, 0x06, 0xf0, 0x75, 0x08, 0x18 }, //5
598
599 //{0x31, 0x22, 0x16, 0x09, 0x90, 0x7f, 0x00, 0x08 }, //6
600 {0x31, 0x22, 0x16, 0x05, 0x90, 0x71, 0x00, 0x13 }, //6
601
602 {0x21, 0x61, 0x1d, 0x07, 0x82, 0x80, 0x10, 0x17 }, //7
603 {0x23, 0x21, 0x2d, 0x16, 0xc0, 0x70, 0x07, 0x07 }, //8
604 {0x61, 0x61, 0x1b, 0x06, 0x64, 0x65, 0x10, 0x17 }, //9
605
606 //{0x61, 0x61, 0x0c, 0x08, 0x85, 0xa0, 0x79, 0x07 }, //A
607 {0x61, 0x61, 0x0c, 0x18, 0x85, 0xf0, 0x70, 0x07 }, //A
608
609 {0x23, 0x01, 0x07, 0x11, 0xf0, 0xa4, 0x00, 0x22 }, //B
610 {0x97, 0xc1, 0x24, 0x07, 0xff, 0xf8, 0x22, 0x12 }, //C
611
612 //{0x61, 0x10, 0x0c, 0x08, 0xf2, 0xc4, 0x40, 0xc8 }, //D
613 {0x61, 0x10, 0x0c, 0x05, 0xf2, 0xf4, 0x40, 0x44 }, //D
614
615 {0x01, 0x01, 0x55, 0x03, 0xf3, 0x92, 0xf3, 0xf3 }, //E
616 {0x61, 0x41, 0x89, 0x03, 0xf1, 0xf4, 0xf0, 0x13 }, //F
617
618 /* drum instruments definitions */
619 /* MULTI MULTI modTL xxx AR/DR AR/DR SL/RR SL/RR */
620 /* 0 1 2 3 4 5 6 7 */
621 {0x01, 0x01, 0x16, 0x00, 0xfd, 0xf8, 0x2f, 0x6d },/* BD(multi verified, modTL verified, mod env - verified(close), carr. env verifed) */
622 {0x01, 0x01, 0x00, 0x00, 0xd8, 0xd8, 0xf9, 0xf8 },/* HH(multi verified), SD(multi not used) */
623 {0x05, 0x01, 0x00, 0x00, 0xf8, 0xba, 0x49, 0x55 },/* TOM(multi,env verified), TOP CYM(multi verified, env verified) */
624 };
625
626 /* lock level of common table */
627 static int num_lock = 0;
628
629 /* work table */
630 #define SLOT7_1 (&chip->P_CH[7].SLOT[SLOT1])
631 #define SLOT7_2 (&chip->P_CH[7].SLOT[SLOT2])
632 #define SLOT8_1 (&chip->P_CH[8].SLOT[SLOT1])
633 #define SLOT8_2 (&chip->P_CH[8].SLOT[SLOT2])
634
635
636 /*INLINE int limit( int val, int max, int min ) {
637 if ( val > max )
638 val = max;
639 else if ( val < min )
640 val = min;
641
642 return val;
643 }*/
644
645
646 /* advance LFO to next sample */
advance_lfo(YM2413 * chip)647 INLINE void advance_lfo(YM2413 *chip)
648 {
649 /* LFO */
650 chip->lfo_am_cnt += chip->lfo_am_inc;
651 if (chip->lfo_am_cnt >= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH) ) /* lfo_am_table is 210 elements long */
652 chip->lfo_am_cnt -= ((UINT32)LFO_AM_TAB_ELEMENTS<<LFO_SH);
653
654 chip->LFO_AM = lfo_am_table[ chip->lfo_am_cnt >> LFO_SH ] >> 1;
655
656 chip->lfo_pm_cnt += chip->lfo_pm_inc;
657 chip->LFO_PM = (chip->lfo_pm_cnt>>LFO_SH) & 7;
658 }
659
660 /* advance to next sample */
advance(YM2413 * chip)661 INLINE void advance(YM2413 *chip)
662 {
663 OPLL_CH *CH;
664 OPLL_SLOT *op;
665 unsigned int i;
666
667 /* Envelope Generator */
668 chip->eg_timer += chip->eg_timer_add;
669
670 while (chip->eg_timer >= chip->eg_timer_overflow)
671 {
672 chip->eg_timer -= chip->eg_timer_overflow;
673
674 chip->eg_cnt++;
675
676 for (i=0; i<9*2; i++)
677 {
678 CH = &chip->P_CH[i/2];
679
680 op = &CH->SLOT[i&1];
681
682 switch(op->state)
683 {
684
685 case EG_DMP: /* dump phase */
686 /*dump phase is performed by both operators in each channel*/
687 /*when CARRIER envelope gets down to zero level,
688 ** phases in BOTH opearators are reset (at the same time ?)
689 */
690 if ( !(chip->eg_cnt & ((1<<op->eg_sh_dp)-1) ) )
691 {
692 op->volume += eg_inc[op->eg_sel_dp + ((chip->eg_cnt>>op->eg_sh_dp)&7)];
693
694 if ( op->volume >= MAX_ATT_INDEX )
695 {
696 op->volume = MAX_ATT_INDEX;
697 op->state = EG_ATT;
698 /* restart Phase Generator */
699 op->phase = 0;
700 }
701 }
702 break;
703
704 case EG_ATT: /* attack phase */
705 if ( !(chip->eg_cnt & ((1<<op->eg_sh_ar)-1) ) )
706 {
707 op->volume += (~op->volume *
708 (eg_inc[op->eg_sel_ar + ((chip->eg_cnt>>op->eg_sh_ar)&7)])
709 ) >>2;
710
711 if (op->volume <= MIN_ATT_INDEX)
712 {
713 op->volume = MIN_ATT_INDEX;
714 op->state = EG_DEC;
715 }
716 }
717 break;
718
719 case EG_DEC: /* decay phase */
720 if ( !(chip->eg_cnt & ((1<<op->eg_sh_dr)-1) ) )
721 {
722 op->volume += eg_inc[op->eg_sel_dr + ((chip->eg_cnt>>op->eg_sh_dr)&7)];
723
724 if ( op->volume >= op->sl )
725 op->state = EG_SUS;
726 }
727 break;
728
729 case EG_SUS: /* sustain phase */
730 /* this is important behaviour:
731 one can change percusive/non-percussive modes on the fly and
732 the chip will remain in sustain phase - verified on real YM3812 */
733
734 if(op->eg_type) /* non-percussive mode (sustained tone) */
735 {
736 /* do nothing */
737 }
738 else /* percussive mode */
739 {
740 /* during sustain phase chip adds Release Rate (in percussive mode) */
741 if ( !(chip->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
742 {
743 op->volume += eg_inc[op->eg_sel_rr + ((chip->eg_cnt>>op->eg_sh_rr)&7)];
744
745 if ( op->volume >= MAX_ATT_INDEX )
746 op->volume = MAX_ATT_INDEX;
747 }
748 /* else do nothing in sustain phase */
749 }
750 break;
751
752 case EG_REL: /* release phase */
753 /* exclude modulators in melody channels from performing anything in this mode*/
754 /* allowed are only carriers in melody mode and rhythm slots in rhythm mode */
755
756 /*This table shows which operators and on what conditions are allowed to perform EG_REL:
757 (a) - always perform EG_REL
758 (n) - never perform EG_REL
759 (r) - perform EG_REL in Rhythm mode ONLY
760 0: 0 (n), 1 (a)
761 1: 2 (n), 3 (a)
762 2: 4 (n), 5 (a)
763 3: 6 (n), 7 (a)
764 4: 8 (n), 9 (a)
765 5: 10(n), 11(a)
766 6: 12(r), 13(a)
767 7: 14(r), 15(a)
768 8: 16(r), 17(a)
769 */
770 if ( (i&1) || ((chip->rhythm&0x20) && (i>=12)) )/* exclude modulators */
771 {
772 if(op->eg_type) /* non-percussive mode (sustained tone) */
773 /*this is correct: use RR when SUS = OFF*/
774 /*and use RS when SUS = ON*/
775 {
776 if (CH->sus)
777 {
778 if ( !(chip->eg_cnt & ((1<<op->eg_sh_rs)-1) ) )
779 {
780 op->volume += eg_inc[op->eg_sel_rs + ((chip->eg_cnt>>op->eg_sh_rs)&7)];
781 if ( op->volume >= MAX_ATT_INDEX )
782 {
783 op->volume = MAX_ATT_INDEX;
784 op->state = EG_OFF;
785 }
786 }
787 }
788 else
789 {
790 if ( !(chip->eg_cnt & ((1<<op->eg_sh_rr)-1) ) )
791 {
792 op->volume += eg_inc[op->eg_sel_rr + ((chip->eg_cnt>>op->eg_sh_rr)&7)];
793 if ( op->volume >= MAX_ATT_INDEX )
794 {
795 op->volume = MAX_ATT_INDEX;
796 op->state = EG_OFF;
797 }
798 }
799 }
800 }
801 else /* percussive mode */
802 {
803 if ( !(chip->eg_cnt & ((1<<op->eg_sh_rs)-1) ) )
804 {
805 op->volume += eg_inc[op->eg_sel_rs + ((chip->eg_cnt>>op->eg_sh_rs)&7)];
806 if ( op->volume >= MAX_ATT_INDEX )
807 {
808 op->volume = MAX_ATT_INDEX;
809 op->state = EG_OFF;
810 }
811 }
812 }
813 }
814 break;
815
816 default:
817 break;
818 }
819 }
820 }
821
822 for (i=0; i<9*2; i++)
823 {
824 CH = &chip->P_CH[i/2];
825 op = &CH->SLOT[i&1];
826
827 /* Phase Generator */
828 if(op->vib)
829 {
830 UINT8 block;
831
832 unsigned int fnum_lfo = 8*((CH->block_fnum&0x01c0) >> 6);
833 unsigned int block_fnum = CH->block_fnum * 2;
834 signed int lfo_fn_table_index_offset = lfo_pm_table[chip->LFO_PM + fnum_lfo ];
835
836 if (lfo_fn_table_index_offset) /* LFO phase modulation active */
837 {
838 block_fnum += lfo_fn_table_index_offset;
839 block = (block_fnum&0x1c00) >> 10;
840 op->phase += (chip->fn_tab[block_fnum&0x03ff] >> (7-block)) * op->mul;
841 }
842 else /* LFO phase modulation = zero */
843 {
844 op->phase += op->freq;
845 }
846 }
847 else /* LFO phase modulation disabled for this operator */
848 {
849 op->phase += op->freq;
850 }
851 }
852
853 /* The Noise Generator of the YM3812 is 23-bit shift register.
854 * Period is equal to 2^23-2 samples.
855 * Register works at sampling frequency of the chip, so output
856 * can change on every sample.
857 *
858 * Output of the register and input to the bit 22 is:
859 * bit0 XOR bit14 XOR bit15 XOR bit22
860 *
861 * Simply use bit 22 as the noise output.
862 */
863
864 chip->noise_p += chip->noise_f;
865 i = chip->noise_p >> FREQ_SH; /* number of events (shifts of the shift register) */
866 chip->noise_p &= FREQ_MASK;
867 while (i)
868 {
869 /*
870 UINT32 j;
871 j = ( (chip->noise_rng) ^ (chip->noise_rng>>14) ^ (chip->noise_rng>>15) ^ (chip->noise_rng>>22) ) & 1;
872 chip->noise_rng = (j<<22) | (chip->noise_rng>>1);
873 */
874
875 /*
876 Instead of doing all the logic operations above, we
877 use a trick here (and use bit 0 as the noise output).
878 The difference is only that the noise bit changes one
879 step ahead. This doesn't matter since we don't know
880 what is real state of the noise_rng after the reset.
881 */
882
883 if (chip->noise_rng & 1) chip->noise_rng ^= 0x800302;
884 chip->noise_rng >>= 1;
885
886 i--;
887 }
888 }
889
890
op_calc(UINT32 phase,unsigned int env,signed int pm,unsigned int wave_tab)891 INLINE signed int op_calc(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab)
892 {
893 UINT32 p;
894
895 p = (env<<5) + sin_tab[wave_tab + ((((signed int)((phase & ~FREQ_MASK) + (pm<<17))) >> FREQ_SH ) & SIN_MASK) ];
896
897 if (p >= TL_TAB_LEN)
898 return 0;
899 return tl_tab[p];
900 }
901
op_calc1(UINT32 phase,unsigned int env,signed int pm,unsigned int wave_tab)902 INLINE signed int op_calc1(UINT32 phase, unsigned int env, signed int pm, unsigned int wave_tab)
903 {
904 UINT32 p;
905 INT32 i;
906
907 i = (phase & ~FREQ_MASK) + pm;
908
909 /*logerror("i=%08x (i>>16)&511=%8i phase=%i [pm=%08x] ",i, (i>>16)&511, phase>>FREQ_SH, pm);*/
910
911 p = (env<<5) + sin_tab[ wave_tab + ((i>>FREQ_SH) & SIN_MASK)];
912
913 /*logerror("(p&255=%i p>>8=%i) out= %i\n", p&255,p>>8, tl_tab[p&255]>>(p>>8) );*/
914
915 if (p >= TL_TAB_LEN)
916 return 0;
917 return tl_tab[p];
918 }
919
920
921 #define volume_calc(OP) ((OP)->TLL + ((UINT32)(OP)->volume) + (chip->LFO_AM & (OP)->AMmask))
922
923 /* calculate output */
chan_calc(YM2413 * chip,OPLL_CH * CH)924 INLINE void chan_calc( YM2413*chip, OPLL_CH *CH )
925 {
926 OPLL_SLOT *SLOT;
927 unsigned int env;
928 signed int out;
929 signed int phase_modulation; /* phase modulation input (SLOT 2) */
930
931
932 if (CH->Muted)
933 return;
934
935 /* SLOT 1 */
936 SLOT = &CH->SLOT[SLOT1];
937 env = volume_calc(SLOT);
938 out = SLOT->op1_out[0] + SLOT->op1_out[1];
939
940 SLOT->op1_out[0] = SLOT->op1_out[1];
941 phase_modulation = SLOT->op1_out[0];
942
943 SLOT->op1_out[1] = 0;
944
945 if( env < ENV_QUIET )
946 {
947 if (!SLOT->fb_shift)
948 out = 0;
949 SLOT->op1_out[1] = op_calc1(SLOT->phase, env, (out<<SLOT->fb_shift), SLOT->wavetable );
950 }
951
952 /* SLOT 2 */
953
954 chip->outchan=0;
955
956 SLOT++;
957 env = volume_calc(SLOT);
958 if( env < ENV_QUIET )
959 {
960 signed int outp = op_calc(SLOT->phase, env, phase_modulation, SLOT->wavetable);
961 chip->output[0] += outp;
962 chip->outchan = outp;
963 //chip->output[0] += op_calc(SLOT->phase, env, phase_modulation, SLOT->wavetable);
964 }
965 }
966
967 /*
968 operators used in the rhythm sounds generation process:
969
970 Envelope Generator:
971
972 channel operator register number Bass High Snare Tom Top
973 / slot number TL ARDR SLRR Wave Drum Hat Drum Tom Cymbal
974 6 / 0 12 50 70 90 f0 +
975 6 / 1 15 53 73 93 f3 +
976 7 / 0 13 51 71 91 f1 +
977 7 / 1 16 54 74 94 f4 +
978 8 / 0 14 52 72 92 f2 +
979 8 / 1 17 55 75 95 f5 +
980
981 Phase Generator:
982
983 channel operator register number Bass High Snare Tom Top
984 / slot number MULTIPLE Drum Hat Drum Tom Cymbal
985 6 / 0 12 30 +
986 6 / 1 15 33 +
987 7 / 0 13 31 + + +
988 7 / 1 16 34 ----- n o t u s e d -----
989 8 / 0 14 32 +
990 8 / 1 17 35 + +
991
992 channel operator register number Bass High Snare Tom Top
993 number number BLK/FNUM2 FNUM Drum Hat Drum Tom Cymbal
994 6 12,15 B6 A6 +
995
996 7 13,16 B7 A7 + + +
997
998 8 14,17 B8 A8 + + +
999
1000 */
1001
1002 /* calculate rhythm */
1003
rhythm_calc(YM2413 * chip,OPLL_CH * CH,unsigned int noise)1004 INLINE void rhythm_calc( YM2413 *chip, OPLL_CH *CH, unsigned int noise )
1005 {
1006 OPLL_SLOT *SLOT;
1007 signed int out;
1008 unsigned int env;
1009 signed int phase_modulation; /* phase modulation input (SLOT 2) */
1010
1011
1012 /* Bass Drum (verified on real YM3812):
1013 - depends on the channel 6 'connect' register:
1014 when connect = 0 it works the same as in normal (non-rhythm) mode (op1->op2->out)
1015 when connect = 1 _only_ operator 2 is present on output (op2->out), operator 1 is ignored
1016 - output sample always is multiplied by 2
1017 */
1018
1019
1020 /* SLOT 1 */
1021 SLOT = &CH[6].SLOT[SLOT1];
1022 env = volume_calc(SLOT);
1023
1024 out = SLOT->op1_out[0] + SLOT->op1_out[1];
1025 SLOT->op1_out[0] = SLOT->op1_out[1];
1026
1027 phase_modulation = SLOT->op1_out[0];
1028
1029 SLOT->op1_out[1] = 0;
1030 if( env < ENV_QUIET )
1031 {
1032 if (!SLOT->fb_shift)
1033 out = 0;
1034 SLOT->op1_out[1] = op_calc1(SLOT->phase, env, (out<<SLOT->fb_shift), SLOT->wavetable );
1035 }
1036
1037 /* SLOT 2 */
1038 SLOT++;
1039 env = volume_calc(SLOT);
1040 if( env < ENV_QUIET && ! chip->MuteSpc[0] )
1041 chip->output[1] += op_calc(SLOT->phase, env, phase_modulation, SLOT->wavetable) * 2;
1042
1043
1044 /* Phase generation is based on: */
1045 // HH (13) channel 7->slot 1 combined with channel 8->slot 2 (same combination as TOP CYMBAL but different output phases)
1046 // SD (16) channel 7->slot 1
1047 // TOM (14) channel 8->slot 1
1048 // TOP (17) channel 7->slot 1 combined with channel 8->slot 2 (same combination as HIGH HAT but different output phases)
1049
1050 /* Envelope generation based on: */
1051 // HH channel 7->slot1
1052 // SD channel 7->slot2
1053 // TOM channel 8->slot1
1054 // TOP channel 8->slot2
1055
1056
1057 /* The following formulas can be well optimized.
1058 I leave them in direct form for now (in case I've missed something).
1059 */
1060
1061 /* High Hat (verified on real YM3812) */
1062 env = volume_calc(SLOT7_1);
1063 if( env < ENV_QUIET && ! chip->MuteSpc[4] )
1064 {
1065
1066 /* high hat phase generation:
1067 phase = d0 or 234 (based on frequency only)
1068 phase = 34 or 2d0 (based on noise)
1069 */
1070
1071 /* base frequency derived from operator 1 in channel 7 */
1072 unsigned char bit7 = ((SLOT7_1->phase>>FREQ_SH)>>7)&1;
1073 unsigned char bit3 = ((SLOT7_1->phase>>FREQ_SH)>>3)&1;
1074 unsigned char bit2 = ((SLOT7_1->phase>>FREQ_SH)>>2)&1;
1075
1076 unsigned char res1 = (bit2 ^ bit7) | bit3;
1077
1078 /* when res1 = 0 phase = 0x000 | 0xd0; */
1079 /* when res1 = 1 phase = 0x200 | (0xd0>>2); */
1080 UINT32 phase = res1 ? (0x200|(0xd0>>2)) : 0xd0;
1081
1082 /* enable gate based on frequency of operator 2 in channel 8 */
1083 unsigned char bit5e= ((SLOT8_2->phase>>FREQ_SH)>>5)&1;
1084 unsigned char bit3e= ((SLOT8_2->phase>>FREQ_SH)>>3)&1;
1085
1086 unsigned char res2 = (bit3e | bit5e);
1087
1088 /* when res2 = 0 pass the phase from calculation above (res1); */
1089 /* when res2 = 1 phase = 0x200 | (0xd0>>2); */
1090 if (res2)
1091 phase = (0x200|(0xd0>>2));
1092
1093
1094 /* when phase & 0x200 is set and noise=1 then phase = 0x200|0xd0 */
1095 /* when phase & 0x200 is set and noise=0 then phase = 0x200|(0xd0>>2), ie no change */
1096 if (phase&0x200)
1097 {
1098 if (noise)
1099 phase = 0x200|0xd0;
1100 }
1101 else
1102 /* when phase & 0x200 is clear and noise=1 then phase = 0xd0>>2 */
1103 /* when phase & 0x200 is clear and noise=0 then phase = 0xd0, ie no change */
1104 {
1105 if (noise)
1106 phase = 0xd0>>2;
1107 }
1108
1109 chip->output[1] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_1->wavetable) * 2;
1110 }
1111
1112 /* Snare Drum (verified on real YM3812) */
1113 env = volume_calc(SLOT7_2);
1114 if( env < ENV_QUIET && ! chip->MuteSpc[1] )
1115 {
1116 /* base frequency derived from operator 1 in channel 7 */
1117 unsigned char bit8 = ((SLOT7_1->phase>>FREQ_SH)>>8)&1;
1118
1119 /* when bit8 = 0 phase = 0x100; */
1120 /* when bit8 = 1 phase = 0x200; */
1121 UINT32 phase = bit8 ? 0x200 : 0x100;
1122
1123 /* Noise bit XOR'es phase by 0x100 */
1124 /* when noisebit = 0 pass the phase from calculation above */
1125 /* when noisebit = 1 phase ^= 0x100; */
1126 /* in other words: phase ^= (noisebit<<8); */
1127 if (noise)
1128 phase ^= 0x100;
1129
1130 chip->output[1] += op_calc(phase<<FREQ_SH, env, 0, SLOT7_2->wavetable) * 2;
1131 }
1132
1133 /* Tom Tom (verified on real YM3812) */
1134 env = volume_calc(SLOT8_1);
1135 if( env < ENV_QUIET && ! chip->MuteSpc[2] )
1136 chip->output[1] += op_calc(SLOT8_1->phase, env, 0, SLOT8_1->wavetable) * 2;
1137
1138 /* Top Cymbal (verified on real YM2413) */
1139 env = volume_calc(SLOT8_2);
1140 if( env < ENV_QUIET && ! chip->MuteSpc[3] )
1141 {
1142 /* base frequency derived from operator 1 in channel 7 */
1143 unsigned char bit7 = ((SLOT7_1->phase>>FREQ_SH)>>7)&1;
1144 unsigned char bit3 = ((SLOT7_1->phase>>FREQ_SH)>>3)&1;
1145 unsigned char bit2 = ((SLOT7_1->phase>>FREQ_SH)>>2)&1;
1146
1147 unsigned char res1 = (bit2 ^ bit7) | bit3;
1148
1149 /* when res1 = 0 phase = 0x000 | 0x100; */
1150 /* when res1 = 1 phase = 0x200 | 0x100; */
1151 UINT32 phase = res1 ? 0x300 : 0x100;
1152
1153 /* enable gate based on frequency of operator 2 in channel 8 */
1154 unsigned char bit5e= ((SLOT8_2->phase>>FREQ_SH)>>5)&1;
1155 unsigned char bit3e= ((SLOT8_2->phase>>FREQ_SH)>>3)&1;
1156
1157 unsigned char res2 = (bit3e | bit5e);
1158 /* when res2 = 0 pass the phase from calculation above (res1); */
1159 /* when res2 = 1 phase = 0x200 | 0x100; */
1160 if (res2)
1161 phase = 0x300;
1162
1163 chip->output[1] += op_calc(phase<<FREQ_SH, env, 0, SLOT8_2->wavetable) * 2;
1164 }
1165
1166 }
1167
1168
1169 /* generic table initialize */
init_tables(void)1170 static int init_tables(void)
1171 {
1172 signed int i,x;
1173 signed int n;
1174 double o,m;
1175
1176
1177 for (x=0; x<TL_RES_LEN; x++)
1178 {
1179 m = (1<<16) / pow(2, (x+1) * (ENV_STEP/4.0) / 8.0);
1180 m = floor(m);
1181
1182 /* we never reach (1<<16) here due to the (x+1) */
1183 /* result fits within 16 bits at maximum */
1184
1185 n = (int)m; /* 16 bits here */
1186 n >>= 4; /* 12 bits here */
1187 if (n&1) /* round to nearest */
1188 n = (n>>1)+1;
1189 else
1190 n = n>>1;
1191 /* 11 bits here (rounded) */
1192 tl_tab[ x*2 + 0 ] = n;
1193 tl_tab[ x*2 + 1 ] = -tl_tab[ x*2 + 0 ];
1194
1195 for (i=1; i<11; i++)
1196 {
1197 tl_tab[ x*2+0 + i*2*TL_RES_LEN ] = tl_tab[ x*2+0 ]>>i;
1198 tl_tab[ x*2+1 + i*2*TL_RES_LEN ] = -tl_tab[ x*2+0 + i*2*TL_RES_LEN ];
1199 }
1200 //#if 0
1201 // logerror("tl %04i", x*2);
1202 // for (i=0; i<11; i++)
1203 // logerror(", [%02i] %5i", i*2, tl_tab[ x*2 /*+1*/ + i*2*TL_RES_LEN ] );
1204 // logerror("\n");
1205 //#endif*/
1206 }
1207 /*logerror("ym2413.c: TL_TAB_LEN = %i elements (%i bytes)\n",TL_TAB_LEN, (int)sizeof(tl_tab));*/
1208
1209
1210 for (i=0; i<SIN_LEN; i++)
1211 {
1212 /* non-standard sinus */
1213 m = sin( ((i*2)+1) * M_PI / SIN_LEN ); /* checked against the real chip */
1214
1215 /* we never reach zero here due to ((i*2)+1) */
1216
1217 if (m>0.0)
1218 o = 8*log(1.0/m)/log(2.0); /* convert to 'decibels' */
1219 else
1220 o = 8*log(-1.0/m)/log(2.0); /* convert to 'decibels' */
1221
1222 o = o / (ENV_STEP/4);
1223
1224 n = (int)(2.0*o);
1225 if (n&1) /* round to nearest */
1226 n = (n>>1)+1;
1227 else
1228 n = n>>1;
1229
1230 /* waveform 0: standard sinus */
1231 sin_tab[ i ] = n*2 + (m>=0.0? 0: 1 );
1232
1233 /*logerror("ym2413.c: sin [%4i (hex=%03x)]= %4i (tl_tab value=%5i)\n", i, i, sin_tab[i], tl_tab[sin_tab[i]] );*/
1234
1235
1236 /* waveform 1: __ __ */
1237 /* / \____/ \____*/
1238 /* output only first half of the sinus waveform (positive one) */
1239 if (i & (1<<(SIN_BITS-1)) )
1240 sin_tab[1*SIN_LEN+i] = TL_TAB_LEN;
1241 else
1242 sin_tab[1*SIN_LEN+i] = sin_tab[i];
1243
1244 /*logerror("ym2413.c: sin1[%4i]= %4i (tl_tab value=%5i)\n", i, sin_tab[1*SIN_LEN+i], tl_tab[sin_tab[1*SIN_LEN+i]] );*/
1245 }
1246 /*#if 0
1247 logerror("YM2413.C: ENV_QUIET= %08x (*32=%08x)\n", ENV_QUIET, ENV_QUIET*32 );
1248 for (i=0; i<ENV_QUIET; i++)
1249 {
1250 logerror("tl_tb[%4x(%4i)]=%8x\n", i<<5, i, tl_tab[i<<5] );
1251 }
1252 #endif*/
1253 #ifdef SAVE_SAMPLE
1254 sample[0]=fopen("sampsum.pcm","wb");
1255 #endif
1256
1257 return 1;
1258 }
1259
OPLCloseTable(void)1260 static void OPLCloseTable( void )
1261 {
1262 #ifdef SAVE_SAMPLE
1263 fclose(sample[0]);
1264 #endif
1265 }
1266
1267
1268 /*static void OPLL_init_save(YM2413 *chip, const device_config *device)
1269 {
1270 int chnum;
1271
1272 state_save_register_device_item_array(device, 0, chip->instvol_r);
1273 state_save_register_device_item(device, 0, chip->eg_cnt);
1274 state_save_register_device_item(device, 0, chip->eg_timer);
1275 state_save_register_device_item(device, 0, chip->eg_timer_add);
1276 state_save_register_device_item(device, 0, chip->eg_timer_overflow);
1277 state_save_register_device_item(device, 0, chip->rhythm);
1278 state_save_register_device_item(device, 0, chip->lfo_am_cnt);
1279 state_save_register_device_item(device, 0, chip->lfo_am_inc);
1280 state_save_register_device_item(device, 0, chip->lfo_pm_cnt);
1281 state_save_register_device_item(device, 0, chip->lfo_pm_inc);
1282 state_save_register_device_item(device, 0, chip->noise_rng);
1283 state_save_register_device_item(device, 0, chip->noise_p);
1284 state_save_register_device_item(device, 0, chip->noise_f);
1285 state_save_register_device_item_2d_array(device, 0, chip->inst_tab);
1286 state_save_register_device_item(device, 0, chip->address);
1287 state_save_register_device_item(device, 0, chip->status);
1288
1289 for (chnum = 0; chnum < ARRAY_LENGTH(chip->P_CH); chnum++)
1290 {
1291 OPLL_CH *ch = &chip->P_CH[chnum];
1292 int slotnum;
1293
1294 state_save_register_device_item(device, chnum, ch->block_fnum);
1295 state_save_register_device_item(device, chnum, ch->fc);
1296 state_save_register_device_item(device, chnum, ch->ksl_base);
1297 state_save_register_device_item(device, chnum, ch->kcode);
1298 state_save_register_device_item(device, chnum, ch->sus);
1299
1300 for (slotnum = 0; slotnum < ARRAY_LENGTH(ch->SLOT); slotnum++)
1301 {
1302 OPLL_SLOT *sl = &ch->SLOT[slotnum];
1303
1304 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->ar);
1305 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->dr);
1306 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->rr);
1307 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->KSR);
1308 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->ksl);
1309 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->ksr);
1310 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->mul);
1311 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->phase);
1312 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->freq);
1313 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->fb_shift);
1314 state_save_register_device_item_array(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->op1_out);
1315 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_type);
1316 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->state);
1317 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->TL);
1318 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->TLL);
1319 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->volume);
1320 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->sl);
1321 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sh_dp);
1322 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sel_dp);
1323 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sh_ar);
1324 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sel_ar);
1325 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sh_dr);
1326 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sel_dr);
1327 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sh_rr);
1328 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sel_rr);
1329 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sh_rs);
1330 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->eg_sel_rs);
1331 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->key);
1332 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->AMmask);
1333 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->vib);
1334 state_save_register_device_item(device, chnum * ARRAY_LENGTH(ch->SLOT) + slotnum, sl->wavetable);
1335 }
1336 }
1337 }*/
1338
1339
1340 //static void OPLL_initalize(YM2413 *chip, const device_config *device)
OPLL_initalize(YM2413 * chip)1341 static void OPLL_initalize(YM2413 *chip)
1342 {
1343 int i;
1344
1345 //OPLL_init_save(chip, device);
1346
1347 /* frequency base */
1348 chip->freqbase = (chip->rate) ? ((double)chip->clock / 72.0) / chip->rate : 0;
1349 /*#if 0
1350 chip->rate = (double)chip->clock / 72.0;
1351 chip->freqbase = 1.0;
1352 logerror("freqbase=%f\n", chip->freqbase);
1353 #endif*/
1354
1355
1356
1357 /* make fnumber -> increment counter table */
1358 for( i = 0 ; i < 1024; i++ )
1359 {
1360 /* OPLL (YM2413) phase increment counter = 18bit */
1361
1362 chip->fn_tab[i] = (UINT32)( (double)i * 64 * chip->freqbase * (1<<(FREQ_SH-10)) ); /* -10 because chip works with 10.10 fixed point, while we use 16.16 */
1363 /*#if 0
1364 logerror("ym2413.c: fn_tab[%4i] = %08x (dec=%8i)\n",
1365 i, chip->fn_tab[i]>>6, chip->fn_tab[i]>>6 );
1366 #endif*/
1367 }
1368
1369 /*#if 0
1370 for( i=0 ; i < 16 ; i++ )
1371 {
1372 logerror("ym2413.c: sl_tab[%i] = %08x\n", i, sl_tab[i] );
1373 }
1374 for( i=0 ; i < 8 ; i++ )
1375 {
1376 int j;
1377 logerror("ym2413.c: ksl_tab[oct=%2i] =",i);
1378 for (j=0; j<16; j++)
1379 {
1380 logerror("%08x ", ksl_tab[i*16+j] );
1381 }
1382 logerror("\n");
1383 }
1384 #endif*/
1385
1386 for(i = 0; i < 9; i ++)
1387 chip->P_CH[i].Muted = 0x00;
1388 for(i = 0; i < 5; i ++)
1389 chip->MuteSpc[i] = 0x00;
1390
1391
1392 /* Amplitude modulation: 27 output levels (triangle waveform); 1 level takes one of: 192, 256 or 448 samples */
1393 /* One entry from LFO_AM_TABLE lasts for 64 samples */
1394 chip->lfo_am_inc = (1.0 / 64.0 ) * (1<<LFO_SH) * chip->freqbase;
1395
1396 /* Vibrato: 8 output levels (triangle waveform); 1 level takes 1024 samples */
1397 chip->lfo_pm_inc = (1.0 / 1024.0) * (1<<LFO_SH) * chip->freqbase;
1398
1399 /*logerror ("chip->lfo_am_inc = %8x ; chip->lfo_pm_inc = %8x\n", chip->lfo_am_inc, chip->lfo_pm_inc);*/
1400
1401 /* Noise generator: a step takes 1 sample */
1402 chip->noise_f = (1.0 / 1.0) * (1<<FREQ_SH) * chip->freqbase;
1403 /*logerror("YM2413init noise_f=%8x\n", chip->noise_f);*/
1404
1405 chip->eg_timer_add = (1<<EG_SH) * chip->freqbase;
1406 chip->eg_timer_overflow = ( 1 ) * (1<<EG_SH);
1407 /*logerror("YM2413init eg_timer_add=%8x eg_timer_overflow=%8x\n", chip->eg_timer_add, chip->eg_timer_overflow);*/
1408 }
1409
KEY_ON(OPLL_SLOT * SLOT,UINT32 key_set)1410 INLINE void KEY_ON(OPLL_SLOT *SLOT, UINT32 key_set)
1411 {
1412 if( !SLOT->key )
1413 {
1414 /* do NOT restart Phase Generator (verified on real YM2413)*/
1415 /* phase -> Dump */
1416 SLOT->state = EG_DMP;
1417 }
1418 SLOT->key |= key_set;
1419 }
1420
KEY_OFF(OPLL_SLOT * SLOT,UINT32 key_clr)1421 INLINE void KEY_OFF(OPLL_SLOT *SLOT, UINT32 key_clr)
1422 {
1423 if( SLOT->key )
1424 {
1425 SLOT->key &= key_clr;
1426
1427 if( !SLOT->key )
1428 {
1429 /* phase -> Release */
1430 if (SLOT->state>EG_REL)
1431 SLOT->state = EG_REL;
1432 }
1433 }
1434 }
1435
1436 /* update phase increment counter of operator (also update the EG rates if necessary) */
CALC_FCSLOT(OPLL_CH * CH,OPLL_SLOT * SLOT)1437 INLINE void CALC_FCSLOT(OPLL_CH *CH,OPLL_SLOT *SLOT)
1438 {
1439 int ksr;
1440 UINT32 SLOT_rs;
1441 UINT32 SLOT_dp;
1442
1443 /* (frequency) phase increment counter */
1444 SLOT->freq = CH->fc * SLOT->mul;
1445 ksr = CH->kcode >> SLOT->KSR;
1446
1447 if( SLOT->ksr != ksr )
1448 {
1449 SLOT->ksr = ksr;
1450
1451 /* calculate envelope generator rates */
1452 if ((SLOT->ar + SLOT->ksr) < 16+62)
1453 {
1454 SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ];
1455 SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
1456 }
1457 else
1458 {
1459 SLOT->eg_sh_ar = 0;
1460 SLOT->eg_sel_ar = 13*RATE_STEPS;
1461 }
1462 SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ];
1463 SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ];
1464 SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ];
1465 SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ];
1466
1467 }
1468
1469 if (CH->sus)
1470 SLOT_rs = 16 + (5<<2);
1471 else
1472 SLOT_rs = 16 + (7<<2);
1473
1474 SLOT->eg_sh_rs = eg_rate_shift [SLOT_rs + SLOT->ksr ];
1475 SLOT->eg_sel_rs = eg_rate_select[SLOT_rs + SLOT->ksr ];
1476
1477 SLOT_dp = 16 + (13<<2);
1478 SLOT->eg_sh_dp = eg_rate_shift [SLOT_dp + SLOT->ksr ];
1479 SLOT->eg_sel_dp = eg_rate_select[SLOT_dp + SLOT->ksr ];
1480 }
1481
1482 /* set multi,am,vib,EG-TYP,KSR,mul */
set_mul(YM2413 * chip,int slot,int v)1483 INLINE void set_mul(YM2413 *chip,int slot,int v)
1484 {
1485 OPLL_CH *CH = &chip->P_CH[slot/2];
1486 OPLL_SLOT *SLOT = &CH->SLOT[slot&1];
1487
1488 SLOT->mul = mul_tab[v&0x0f];
1489 SLOT->KSR = (v&0x10) ? 0 : 2;
1490 SLOT->eg_type = (v&0x20);
1491 SLOT->vib = (v&0x40);
1492 SLOT->AMmask = (v&0x80) ? ~0 : 0;
1493 CALC_FCSLOT(CH,SLOT);
1494 }
1495
1496 /* set ksl, tl */
set_ksl_tl(YM2413 * chip,int chan,int v)1497 INLINE void set_ksl_tl(YM2413 *chip,int chan,int v)
1498 {
1499 OPLL_CH *CH = &chip->P_CH[chan];
1500 /* modulator */
1501 OPLL_SLOT *SLOT = &CH->SLOT[SLOT1];
1502
1503 SLOT->ksl = ksl_shift[v >> 6];
1504 SLOT->TL = (v&0x3f)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */
1505 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1506 }
1507
1508 /* set ksl , waveforms, feedback */
set_ksl_wave_fb(YM2413 * chip,int chan,int v)1509 INLINE void set_ksl_wave_fb(YM2413 *chip,int chan,int v)
1510 {
1511 OPLL_CH *CH = &chip->P_CH[chan];
1512 /* modulator */
1513 OPLL_SLOT *SLOT = &CH->SLOT[SLOT1];
1514 SLOT->wavetable = ((v&0x08)>>3)*SIN_LEN;
1515 SLOT->fb_shift = (v&7) ? (v&7) + 8 : 0;
1516
1517 /*carrier*/
1518 SLOT = &CH->SLOT[SLOT2];
1519
1520 SLOT->ksl = ksl_shift[v >> 6];
1521 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1522
1523 SLOT->wavetable = ((v&0x10)>>4)*SIN_LEN;
1524 }
1525
1526 /* set attack rate & decay rate */
set_ar_dr(YM2413 * chip,int slot,int v)1527 INLINE void set_ar_dr(YM2413 *chip,int slot,int v)
1528 {
1529 OPLL_CH *CH = &chip->P_CH[slot/2];
1530 OPLL_SLOT *SLOT = &CH->SLOT[slot&1];
1531
1532 SLOT->ar = (v>>4) ? 16 + ((v>>4) <<2) : 0;
1533
1534 if ((SLOT->ar + SLOT->ksr) < 16+62)
1535 {
1536 SLOT->eg_sh_ar = eg_rate_shift [SLOT->ar + SLOT->ksr ];
1537 SLOT->eg_sel_ar = eg_rate_select[SLOT->ar + SLOT->ksr ];
1538 }
1539 else
1540 {
1541 SLOT->eg_sh_ar = 0;
1542 SLOT->eg_sel_ar = 13*RATE_STEPS;
1543 }
1544
1545 SLOT->dr = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0;
1546 SLOT->eg_sh_dr = eg_rate_shift [SLOT->dr + SLOT->ksr ];
1547 SLOT->eg_sel_dr = eg_rate_select[SLOT->dr + SLOT->ksr ];
1548 }
1549
1550 /* set sustain level & release rate */
set_sl_rr(YM2413 * chip,int slot,int v)1551 INLINE void set_sl_rr(YM2413 *chip,int slot,int v)
1552 {
1553 OPLL_CH *CH = &chip->P_CH[slot/2];
1554 OPLL_SLOT *SLOT = &CH->SLOT[slot&1];
1555
1556 SLOT->sl = sl_tab[ v>>4 ];
1557
1558 SLOT->rr = (v&0x0f)? 16 + ((v&0x0f)<<2) : 0;
1559 SLOT->eg_sh_rr = eg_rate_shift [SLOT->rr + SLOT->ksr ];
1560 SLOT->eg_sel_rr = eg_rate_select[SLOT->rr + SLOT->ksr ];
1561 }
1562
load_instrument(YM2413 * chip,UINT32 chan,UINT32 slot,UINT8 * inst)1563 static void load_instrument(YM2413 *chip, UINT32 chan, UINT32 slot, UINT8* inst )
1564 {
1565 set_mul (chip, slot, inst[0]);
1566 set_mul (chip, slot+1, inst[1]);
1567 set_ksl_tl (chip, chan, inst[2]);
1568 set_ksl_wave_fb (chip, chan, inst[3]);
1569 set_ar_dr (chip, slot, inst[4]);
1570 set_ar_dr (chip, slot+1, inst[5]);
1571 set_sl_rr (chip, slot, inst[6]);
1572 set_sl_rr (chip, slot+1, inst[7]);
1573 }
update_instrument_zero(YM2413 * chip,UINT8 r)1574 static void update_instrument_zero(YM2413 *chip, UINT8 r )
1575 {
1576 UINT8* inst = &chip->inst_tab[0][0]; /* point to user instrument */
1577 UINT32 chan;
1578 UINT32 chan_max;
1579
1580 chan_max = 9;
1581 if (chip->rhythm & 0x20)
1582 chan_max=6;
1583
1584 switch(r)
1585 {
1586 case 0:
1587 for (chan=0; chan<chan_max; chan++)
1588 {
1589 if ((chip->instvol_r[chan]&0xf0)==0)
1590 {
1591 set_mul (chip, chan*2, inst[0]);
1592 }
1593 }
1594 break;
1595 case 1:
1596 for (chan=0; chan<chan_max; chan++)
1597 {
1598 if ((chip->instvol_r[chan]&0xf0)==0)
1599 {
1600 set_mul (chip, chan*2+1,inst[1]);
1601 }
1602 }
1603 break;
1604 case 2:
1605 for (chan=0; chan<chan_max; chan++)
1606 {
1607 if ((chip->instvol_r[chan]&0xf0)==0)
1608 {
1609 set_ksl_tl (chip, chan, inst[2]);
1610 }
1611 }
1612 break;
1613 case 3:
1614 for (chan=0; chan<chan_max; chan++)
1615 {
1616 if ((chip->instvol_r[chan]&0xf0)==0)
1617 {
1618 set_ksl_wave_fb (chip, chan, inst[3]);
1619 }
1620 }
1621 break;
1622 case 4:
1623 for (chan=0; chan<chan_max; chan++)
1624 {
1625 if ((chip->instvol_r[chan]&0xf0)==0)
1626 {
1627 set_ar_dr (chip, chan*2, inst[4]);
1628 }
1629 }
1630 break;
1631 case 5:
1632 for (chan=0; chan<chan_max; chan++)
1633 {
1634 if ((chip->instvol_r[chan]&0xf0)==0)
1635 {
1636 set_ar_dr (chip, chan*2+1,inst[5]);
1637 }
1638 }
1639 break;
1640 case 6:
1641 for (chan=0; chan<chan_max; chan++)
1642 {
1643 if ((chip->instvol_r[chan]&0xf0)==0)
1644 {
1645 set_sl_rr (chip, chan*2, inst[6]);
1646 }
1647 }
1648 break;
1649 case 7:
1650 for (chan=0; chan<chan_max; chan++)
1651 {
1652 if ((chip->instvol_r[chan]&0xf0)==0)
1653 {
1654 set_sl_rr (chip, chan*2+1,inst[7]);
1655 }
1656 }
1657 break;
1658 }
1659 }
1660
1661 /* write a value v to register r on chip chip */
OPLLWriteReg(YM2413 * chip,int r,int v)1662 static void OPLLWriteReg(YM2413 *chip, int r, int v)
1663 {
1664 OPLL_CH *CH;
1665 OPLL_SLOT *SLOT;
1666 UINT8 *inst;
1667 int chan;
1668 int slot;
1669
1670 /* adjust bus to 8 bits */
1671 r &= 0xff;
1672 v &= 0xff;
1673
1674
1675 /*if (LOG_CYM_FILE && (cymfile) && (r!=8) )
1676 {
1677 fputc( (unsigned char)r, cymfile );
1678 fputc( (unsigned char)v, cymfile );
1679 }*/
1680
1681
1682 switch(r&0xf0)
1683 {
1684 case 0x00: /* 00-0f:control */
1685 {
1686 switch(r&0x0f)
1687 {
1688 case 0x00: /* AM/VIB/EGTYP/KSR/MULTI (modulator) */
1689 case 0x01: /* AM/VIB/EGTYP/KSR/MULTI (carrier) */
1690 case 0x02: /* Key Scale Level, Total Level (modulator) */
1691 case 0x03: /* Key Scale Level, carrier waveform, modulator waveform, Feedback */
1692 case 0x04: /* Attack, Decay (modulator) */
1693 case 0x05: /* Attack, Decay (carrier) */
1694 case 0x06: /* Sustain, Release (modulator) */
1695 case 0x07: /* Sustain, Release (carrier) */
1696 chip->inst_tab[0][r & 0x07] = v;
1697 update_instrument_zero(chip,r&7);
1698 break;
1699
1700 case 0x0e: /* x, x, r,bd,sd,tom,tc,hh */
1701 {
1702 if (chip->VRC7_Mode)
1703 break;
1704 if(v&0x20)
1705 {
1706 if ((chip->rhythm&0x20)==0)
1707 /*rhythm off to on*/
1708 {
1709 //logerror("YM2413: Rhythm mode enable\n");
1710
1711 /* Load instrument settings for channel seven(chan=6 since we're zero based). (Bass drum) */
1712 chan = 6;
1713 inst = &chip->inst_tab[16][0];
1714 slot = chan*2;
1715
1716 load_instrument(chip, chan, slot, inst);
1717
1718 /* Load instrument settings for channel eight. (High hat and snare drum) */
1719 chan = 7;
1720 inst = &chip->inst_tab[17][0];
1721 slot = chan*2;
1722
1723 load_instrument(chip, chan, slot, inst);
1724
1725 CH = &chip->P_CH[chan];
1726 SLOT = &CH->SLOT[SLOT1]; /* modulator envelope is HH */
1727 SLOT->TL = ((chip->instvol_r[chan]>>4)<<2)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */
1728 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1729
1730 /* Load instrument settings for channel nine. (Tom-tom and top cymbal) */
1731 chan = 8;
1732 inst = &chip->inst_tab[18][0];
1733 slot = chan*2;
1734
1735 load_instrument(chip, chan, slot, inst);
1736
1737 CH = &chip->P_CH[chan];
1738 SLOT = &CH->SLOT[SLOT1]; /* modulator envelope is TOM */
1739 SLOT->TL = ((chip->instvol_r[chan]>>4)<<2)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */
1740 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1741 }
1742 /* BD key on/off */
1743 if(v&0x10)
1744 {
1745 KEY_ON (&chip->P_CH[6].SLOT[SLOT1], 2);
1746 KEY_ON (&chip->P_CH[6].SLOT[SLOT2], 2);
1747 }
1748 else
1749 {
1750 KEY_OFF(&chip->P_CH[6].SLOT[SLOT1],~2);
1751 KEY_OFF(&chip->P_CH[6].SLOT[SLOT2],~2);
1752 }
1753 /* HH key on/off */
1754 if(v&0x01) KEY_ON (&chip->P_CH[7].SLOT[SLOT1], 2);
1755 else KEY_OFF(&chip->P_CH[7].SLOT[SLOT1],~2);
1756 /* SD key on/off */
1757 if(v&0x08) KEY_ON (&chip->P_CH[7].SLOT[SLOT2], 2);
1758 else KEY_OFF(&chip->P_CH[7].SLOT[SLOT2],~2);
1759 /* TOM key on/off */
1760 if(v&0x04) KEY_ON (&chip->P_CH[8].SLOT[SLOT1], 2);
1761 else KEY_OFF(&chip->P_CH[8].SLOT[SLOT1],~2);
1762 /* TOP-CY key on/off */
1763 if(v&0x02) KEY_ON (&chip->P_CH[8].SLOT[SLOT2], 2);
1764 else KEY_OFF(&chip->P_CH[8].SLOT[SLOT2],~2);
1765 }
1766 else
1767 {
1768 if ((chip->rhythm&0x20)!=0)
1769 /*rhythm on to off*/
1770 {
1771 //logerror("YM2413: Rhythm mode disable\n");
1772 /* Load instrument settings for channel seven(chan=6 since we're zero based).*/
1773 chan = 6;
1774 inst = &chip->inst_tab[chip->instvol_r[chan]>>4][0];
1775 slot = chan*2;
1776
1777 load_instrument(chip, chan, slot, inst);
1778
1779 /* Load instrument settings for channel eight.*/
1780 chan = 7;
1781 inst = &chip->inst_tab[chip->instvol_r[chan]>>4][0];
1782 slot = chan*2;
1783
1784 load_instrument(chip, chan, slot, inst);
1785
1786 /* Load instrument settings for channel nine.*/
1787 chan = 8;
1788 inst = &chip->inst_tab[chip->instvol_r[chan]>>4][0];
1789 slot = chan*2;
1790
1791 load_instrument(chip, chan, slot, inst);
1792 }
1793 /* BD key off */
1794 KEY_OFF(&chip->P_CH[6].SLOT[SLOT1],~2);
1795 KEY_OFF(&chip->P_CH[6].SLOT[SLOT2],~2);
1796 /* HH key off */
1797 KEY_OFF(&chip->P_CH[7].SLOT[SLOT1],~2);
1798 /* SD key off */
1799 KEY_OFF(&chip->P_CH[7].SLOT[SLOT2],~2);
1800 /* TOM key off */
1801 KEY_OFF(&chip->P_CH[8].SLOT[SLOT1],~2);
1802 /* TOP-CY off */
1803 KEY_OFF(&chip->P_CH[8].SLOT[SLOT2],~2);
1804 }
1805 chip->rhythm = v&0x3f;
1806 }
1807 break;
1808 }
1809 }
1810 break;
1811
1812 case 0x10:
1813 case 0x20:
1814 {
1815 int block_fnum;
1816
1817 chan = r&0x0f;
1818
1819 if (chan >= 9)
1820 chan -= 9; /* verified on real YM2413 */
1821 if (chip->VRC7_Mode && chan >= 6)
1822 break;
1823
1824 CH = &chip->P_CH[chan];
1825
1826 if(r&0x10)
1827 { /* 10-18: FNUM 0-7 */
1828 block_fnum = (CH->block_fnum&0x0f00) | v;
1829 }
1830 else
1831 { /* 20-28: suson, keyon, block, FNUM 8 */
1832 block_fnum = ((v&0x0f)<<8) | (CH->block_fnum&0xff);
1833
1834 if(v&0x10)
1835 {
1836 KEY_ON (&CH->SLOT[SLOT1], 1);
1837 KEY_ON (&CH->SLOT[SLOT2], 1);
1838 }
1839 else
1840 {
1841 KEY_OFF(&CH->SLOT[SLOT1],~1);
1842 KEY_OFF(&CH->SLOT[SLOT2],~1);
1843 }
1844
1845
1846 //if (CH->sus!=(v&0x20))
1847 // logerror("chan=%i sus=%2x\n",chan,v&0x20);
1848
1849 CH->sus = v & 0x20;
1850 }
1851 /* update */
1852 if(CH->block_fnum != block_fnum)
1853 {
1854 UINT8 block;
1855
1856 CH->block_fnum = block_fnum;
1857
1858 /* BLK 2,1,0 bits -> bits 3,2,1 of kcode, FNUM MSB -> kcode LSB */
1859 CH->kcode = (block_fnum&0x0f00)>>8;
1860
1861 CH->ksl_base = ksl_tab[block_fnum>>5];
1862
1863 block_fnum = block_fnum * 2;
1864 block = (block_fnum&0x1c00) >> 10;
1865 CH->fc = chip->fn_tab[block_fnum&0x03ff] >> (7-block);
1866
1867 /* refresh Total Level in both SLOTs of this channel */
1868 CH->SLOT[SLOT1].TLL = CH->SLOT[SLOT1].TL + (CH->ksl_base>>CH->SLOT[SLOT1].ksl);
1869 CH->SLOT[SLOT2].TLL = CH->SLOT[SLOT2].TL + (CH->ksl_base>>CH->SLOT[SLOT2].ksl);
1870
1871 /* refresh frequency counter in both SLOTs of this channel */
1872 CALC_FCSLOT(CH,&CH->SLOT[SLOT1]);
1873 CALC_FCSLOT(CH,&CH->SLOT[SLOT2]);
1874 }
1875 }
1876 break;
1877
1878 case 0x30: /* inst 4 MSBs, VOL 4 LSBs */
1879 {
1880 UINT8 old_instvol;
1881
1882 chan = r&0x0f;
1883
1884 if (chan >= 9)
1885 chan -= 9; /* verified on real YM2413 */
1886 if (chip->VRC7_Mode && chan >= 6)
1887 break;
1888
1889 old_instvol = chip->instvol_r[chan];
1890 chip->instvol_r[chan] = v; /* store for later use */
1891
1892 CH = &chip->P_CH[chan];
1893 SLOT = &CH->SLOT[SLOT2]; /* carrier */
1894 SLOT->TL = ((v&0x0f)<<2)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */
1895 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1896
1897
1898 /*check whether we are in rhythm mode and handle instrument/volume register accordingly*/
1899 if ((chan>=6) && (chip->rhythm&0x20))
1900 {
1901 /* we're in rhythm mode*/
1902
1903 if (chan>=7) /* only for channel 7 and 8 (channel 6 is handled in usual way)*/
1904 {
1905 SLOT = &CH->SLOT[SLOT1]; /* modulator envelope is HH(chan=7) or TOM(chan=8) */
1906 SLOT->TL = ((chip->instvol_r[chan]>>4)<<2)<<(ENV_BITS-2-7); /* 7 bits TL (bit 6 = always 0) */
1907 SLOT->TLL = SLOT->TL + (CH->ksl_base>>SLOT->ksl);
1908 }
1909 }
1910 else
1911 {
1912 if ( (old_instvol&0xf0) == (v&0xf0) )
1913 return;
1914
1915 inst = &chip->inst_tab[chip->instvol_r[chan]>>4][0];
1916 slot = chan*2;
1917
1918 load_instrument(chip, chan, slot, inst);
1919
1920 /*#if 0
1921 logerror("YM2413: chan#%02i inst=%02i: (r=%2x, v=%2x)\n",chan,v>>4,r,v);
1922 logerror(" 0:%2x 1:%2x\n",inst[0],inst[1]); logerror(" 2:%2x 3:%2x\n",inst[2],inst[3]);
1923 logerror(" 4:%2x 5:%2x\n",inst[4],inst[5]); logerror(" 6:%2x 7:%2x\n",inst[6],inst[7]);
1924 #endif*/
1925 }
1926 }
1927 break;
1928
1929 default:
1930 break;
1931 }
1932 }
1933
1934 /*static TIMER_CALLBACK( cymfile_callback )
1935 {
1936 if (cymfile)
1937 {
1938 fputc( (unsigned char)8, cymfile );
1939 }
1940 }*/
1941
1942 /* lock/unlock for common table */
1943 //static int OPLL_LockTable(const device_config *device)
OPLL_LockTable(void)1944 static int OPLL_LockTable(void)
1945 {
1946 num_lock++;
1947 if(num_lock>1) return 0;
1948
1949 /* first time */
1950
1951 /* allocate total level table (128kb space) */
1952 if( !init_tables() )
1953 {
1954 num_lock--;
1955 return -1;
1956 }
1957
1958 /*if (LOG_CYM_FILE)
1959 {
1960 cymfile = fopen("2413_.cym","wb");
1961 if (cymfile)
1962 timer_pulse ( device->machine, ATTOTIME_IN_HZ(110), NULL, 0, cymfile_callback); //110 Hz pulse timer
1963 else
1964 logerror("Could not create file 2413_.cym\n");
1965 }*/
1966
1967 return 0;
1968 }
1969
OPLL_UnLockTable(void)1970 static void OPLL_UnLockTable(void)
1971 {
1972 if(num_lock) num_lock--;
1973 if(num_lock) return;
1974
1975 /* last time */
1976
1977 OPLCloseTable();
1978
1979 /*if (cymfile)
1980 fclose (cymfile);
1981 cymfile = NULL;*/
1982 }
1983
OPLLResetChip(YM2413 * chip)1984 static void OPLLResetChip(YM2413 *chip)
1985 {
1986 int c,s;
1987 int i;
1988
1989 chip->eg_timer = 0;
1990 chip->eg_cnt = 0;
1991
1992 chip->noise_rng = 1; /* noise shift register */
1993
1994
1995 /* setup instruments table */
1996 for (i=0; i<19; i++)
1997 {
1998 for (c=0; c<8; c++)
1999 {
2000 chip->inst_tab[i][c] = table[i][c];
2001 }
2002 }
2003
2004
2005 /* reset with register write */
2006 OPLLWriteReg(chip,0x0f,0); /*test reg*/
2007 for(i = 0x3f ; i >= 0x10 ; i-- ) OPLLWriteReg(chip,i,0x00);
2008
2009 /* reset operator parameters */
2010 for( c = 0 ; c < 9 ; c++ )
2011 {
2012 OPLL_CH *CH = &chip->P_CH[c];
2013 for(s = 0 ; s < 2 ; s++ )
2014 {
2015 /* wave table */
2016 CH->SLOT[s].wavetable = 0;
2017 CH->SLOT[s].state = EG_OFF;
2018 CH->SLOT[s].volume = MAX_ATT_INDEX;
2019 }
2020 }
2021 }
2022
2023 /* Create one of virtual YM2413 */
2024 /* 'clock' is chip clock in Hz */
2025 /* 'rate' is sampling rate */
2026 //static YM2413 *OPLLCreate(const device_config *device, int clock, int rate)
OPLLCreate(int clock,int rate)2027 static YM2413 *OPLLCreate(int clock, int rate)
2028 {
2029 char *ptr;
2030 YM2413 *chip;
2031 int state_size;
2032
2033 if (OPLL_LockTable() == -1) return NULL;
2034
2035 /* calculate chip state size */
2036 state_size = sizeof(YM2413);
2037
2038 /* allocate memory block */
2039 ptr = (char *)malloc(state_size);
2040
2041 if (ptr==NULL)
2042 return NULL;
2043
2044 /* clear */
2045 memset(ptr,0,state_size);
2046
2047 chip = (YM2413 *)ptr;
2048
2049 chip->clock = clock;
2050 chip->rate = rate;
2051
2052 /* init global tables */
2053 OPLL_initalize(chip);
2054
2055 /* reset chip */
2056 OPLLResetChip(chip);
2057 return chip;
2058 }
2059
2060 /* Destroy one of virtual YM3812 */
OPLLDestroy(YM2413 * chip)2061 static void OPLLDestroy(YM2413 *chip)
2062 {
2063 OPLL_UnLockTable();
2064 free(chip);
2065 }
2066
2067 /* Option handlers */
2068
OPLLSetUpdateHandler(YM2413 * chip,OPLL_UPDATEHANDLER UpdateHandler,void * param)2069 static void OPLLSetUpdateHandler(YM2413 *chip,OPLL_UPDATEHANDLER UpdateHandler,void * param)
2070 {
2071 chip->UpdateHandler = UpdateHandler;
2072 chip->UpdateParam = param;
2073 }
2074
2075 /* YM3812 I/O interface */
OPLLWrite(YM2413 * chip,int a,int v)2076 static void OPLLWrite(YM2413 *chip,int a,int v)
2077 {
2078 if( !(a&1) )
2079 { /* address port */
2080 chip->address = v & 0xff;
2081 }
2082 else
2083 { /* data port */
2084 if(chip->UpdateHandler) chip->UpdateHandler(chip->UpdateParam,0);
2085 OPLLWriteReg(chip,chip->address,v);
2086 }
2087 }
2088
OPLLRead(YM2413 * chip,int a)2089 static unsigned char OPLLRead(YM2413 *chip,int a)
2090 {
2091 if( !(a&1) )
2092 {
2093 /* status port */
2094 return chip->status;
2095 }
2096 return 0xff;
2097 }
2098
2099
2100
2101
2102
2103 //void * ym2413_init(const device_config *device, int clock, int rate)
ym2413_init(int clock,int rate)2104 void * ym2413_init(int clock, int rate)
2105 {
2106 /* emulator create */
2107 return OPLLCreate(clock, rate);
2108 }
2109
ym2413_shutdown(void * chip)2110 void ym2413_shutdown(void *chip)
2111 {
2112 YM2413 *OPLL = (YM2413 *)chip;
2113
2114 /* emulator shutdown */
2115 OPLLDestroy(OPLL);
2116 }
2117
ym2413_reset_chip(void * chip)2118 void ym2413_reset_chip(void *chip)
2119 {
2120 YM2413 *OPLL = (YM2413 *)chip;
2121 OPLLResetChip(OPLL);
2122 }
2123
ym2413_write(void * chip,int a,int v)2124 void ym2413_write(void *chip, int a, int v)
2125 {
2126 YM2413 *OPLL = (YM2413 *)chip;
2127 OPLLWrite(OPLL, a, v);
2128 }
2129
ym2413_read(void * chip,int a)2130 unsigned char ym2413_read(void *chip, int a)
2131 {
2132 YM2413 *OPLL = (YM2413 *)chip;
2133 return OPLLRead(OPLL, a) & 0x03 ;
2134 }
2135
ym2413_set_update_handler(void * chip,OPLL_UPDATEHANDLER UpdateHandler,void * param)2136 void ym2413_set_update_handler(void *chip,OPLL_UPDATEHANDLER UpdateHandler,void *param)
2137 {
2138 YM2413 *OPLL = (YM2413 *)chip;
2139 OPLLSetUpdateHandler(OPLL, UpdateHandler, param);
2140 }
2141
2142
2143 /*
2144 ** Generate samples for one of the YM2413's
2145 **
2146 ** 'which' is the virtual YM2413 number
2147 ** '*buffer' is the output buffer pointer
2148 ** 'length' is the number of samples that should be generated
2149 */
ym2413_update_one(void * _chip,SAMP ** buffers,int length)2150 void ym2413_update_one(void *_chip, SAMP **buffers, int length)
2151 {
2152 YM2413 *chip = (YM2413 *)_chip;
2153 UINT8 rhythm = chip->rhythm&0x20;
2154 SAMP *bufMO = buffers[0];
2155 SAMP *bufRO = buffers[1];
2156
2157 int i;
2158
2159 for( i=0; i < length ; i++ )
2160 {
2161 int mo,ro;
2162
2163 chip->output[0] = 0;
2164 chip->output[1] = 0;
2165
2166 advance_lfo(chip);
2167
2168 /* FM part */
2169 chan_calc(chip, &chip->P_CH[0]);
2170 //SAVE_SEPARATE_CHANNEL(0);
2171 chan_calc(chip, &chip->P_CH[1]);
2172 chan_calc(chip, &chip->P_CH[2]);
2173 chan_calc(chip, &chip->P_CH[3]);
2174 chan_calc(chip, &chip->P_CH[4]);
2175 chan_calc(chip, &chip->P_CH[5]);
2176
2177 if (! chip->VRC7_Mode)
2178 {
2179 if(!rhythm)
2180 {
2181 chan_calc(chip, &chip->P_CH[6]);
2182 chan_calc(chip, &chip->P_CH[7]);
2183 chan_calc(chip, &chip->P_CH[8]);
2184 }
2185 else /* Rhythm part */
2186 {
2187 rhythm_calc(chip, &chip->P_CH[0], (chip->noise_rng>>0)&1 );
2188 }
2189 }
2190
2191 mo = chip->output[0];
2192 ro = chip->output[1];
2193
2194 mo >>= FINAL_SH;
2195 ro >>= FINAL_SH;
2196
2197 /* limit check */
2198 //mo = limit( mo , MAXOUT, MINOUT );
2199 //ro = limit( ro , MAXOUT, MINOUT );
2200
2201 #ifdef SAVE_SAMPLE
2202 //if (which==0)
2203 //{
2204 SAVE_ALL_CHANNELS
2205 //}
2206 #endif
2207
2208 /* store to sound buffer */
2209 bufMO[i] = mo + ro;
2210 bufRO[i] = mo + ro;
2211
2212 advance(chip);
2213 }
2214
2215 }
2216
ym2413_set_mutemask(void * chip,UINT32 MuteMask)2217 void ym2413_set_mutemask(void* chip, UINT32 MuteMask)
2218 {
2219 YM2413* OPLL = (YM2413*)chip;
2220 UINT8 CurChn;
2221
2222 for (CurChn = 0; CurChn < 9; CurChn ++)
2223 OPLL->P_CH[CurChn].Muted = (MuteMask >> CurChn) & 0x01;
2224 for (CurChn = 0; CurChn < 5; CurChn ++)
2225 OPLL->MuteSpc[CurChn] = (MuteMask >> (9 + CurChn)) & 0x01;
2226
2227 return;
2228 }
2229
ym2413_set_chip_mode(void * chip,UINT8 Mode)2230 void ym2413_set_chip_mode(void* chip, UINT8 Mode)
2231 {
2232 // Enable/Disable VRC7 Mode (with only 6 instead of 9 channels and no rhythm part)
2233 YM2413* OPLL = (YM2413*)chip;
2234
2235 OPLL->VRC7_Mode = Mode;
2236
2237 return;
2238 }
2239
ym2413_override_patches(void * chip,const UINT8 * PatchDump)2240 void ym2413_override_patches(void* chip, const UINT8* PatchDump)
2241 {
2242 YM2413* OPLL = (YM2413*)chip;
2243 UINT8 CurIns;
2244 UINT8 CurReg;
2245
2246 for (CurIns = 0; CurIns < 19; CurIns ++)
2247 {
2248 for (CurReg = 0; CurReg < 8; CurReg ++)
2249 {
2250 OPLL->inst_tab[CurIns][CurReg] = PatchDump[CurIns * 8 + CurReg];
2251 }
2252 }
2253
2254 return;
2255 }
2256