1 /* SPDX-License-Identifier: MIT
2 *
3 * Permission is hereby granted, free of charge, to any person
4 * obtaining a copy of this software and associated documentation
5 * files (the "Software"), to deal in the Software without
6 * restriction, including without limitation the rights to use, copy,
7 * modify, merge, publish, distribute, sublicense, and/or sell copies
8 * of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be
12 * included in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
16 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
18 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
19 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Copyright:
24 * 2020 Evan Nemerson <evan@nemerson.com>
25 * 2020 Christopher Moore <moore@free.fr>
26 */
27
28 #if !defined(SIMDE_ARM_NEON_SHL_N_H)
29 #define SIMDE_ARM_NEON_SHL_N_H
30
31 #include "types.h"
32
33 HEDLEY_DIAGNOSTIC_PUSH
34 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
35 SIMDE_BEGIN_DECLS_
36
37 SIMDE_FUNCTION_ATTRIBUTES
38 simde_int8x8_t
simde_vshl_n_s8(const simde_int8x8_t a,const int n)39 simde_vshl_n_s8 (const simde_int8x8_t a, const int n)
40 SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 7) {
41 simde_int8x8_private
42 r_,
43 a_ = simde_int8x8_to_private(a);
44
45 #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
46 r_.values = a_.values << HEDLEY_STATIC_CAST(int8_t, n);
47 #else
48 SIMDE_VECTORIZE
49 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
50 r_.values[i] = HEDLEY_STATIC_CAST(int8_t, a_.values[i] << n);
51 }
52 #endif
53
54 return simde_int8x8_from_private(r_);
55 }
56 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
57 #define simde_vshl_n_s8(a, n) vshl_n_s8((a), (n))
58 #elif defined(SIMDE_X86_MMX_NATIVE)
59 #define simde_vshl_n_s8(a, n) \
60 _mm_andnot_si64(_mm_set1_pi8((1 << n) - 1), _mm_slli_si64((a), (n)))
61 #endif
62 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
63 #undef vshl_n_s8
64 #define vshl_n_s8(a, n) simde_vshl_n_s8((a), (n))
65 #endif
66
67 SIMDE_FUNCTION_ATTRIBUTES
68 simde_int16x4_t
simde_vshl_n_s16(const simde_int16x4_t a,const int n)69 simde_vshl_n_s16 (const simde_int16x4_t a, const int n)
70 SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 15) {
71 simde_int16x4_private
72 r_,
73 a_ = simde_int16x4_to_private(a);
74
75 #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
76 r_.values = a_.values << HEDLEY_STATIC_CAST(int16_t, n);
77 #else
78 SIMDE_VECTORIZE
79 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
80 r_.values[i] = HEDLEY_STATIC_CAST(int16_t, a_.values[i] << n);
81 }
82 #endif
83
84 return simde_int16x4_from_private(r_);
85 }
86 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
87 #define simde_vshl_n_s16(a, n) vshl_n_s16((a), (n))
88 #elif defined(SIMDE_X86_MMX_NATIVE)
89 #define simde_vshl_n_s16(a, n) _mm_slli_pi16((a), (n))
90 #endif
91 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
92 #undef vshl_n_s16
93 #define vshl_n_s16(a, n) simde_vshl_n_s16((a), (n))
94 #endif
95
96 SIMDE_FUNCTION_ATTRIBUTES
97 simde_int32x2_t
simde_vshl_n_s32(const simde_int32x2_t a,const int n)98 simde_vshl_n_s32 (const simde_int32x2_t a, const int n)
99 SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 31) {
100 simde_int32x2_private
101 r_,
102 a_ = simde_int32x2_to_private(a);
103
104 #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
105 r_.values = a_.values << n;
106 #else
107 SIMDE_VECTORIZE
108 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
109 r_.values[i] = HEDLEY_STATIC_CAST(int32_t, a_.values[i] << n);
110 }
111 #endif
112
113 return simde_int32x2_from_private(r_);
114 }
115 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
116 #define simde_vshl_n_s32(a, n) vshl_n_s32((a), (n))
117 #elif defined(SIMDE_X86_MMX_NATIVE)
118 #define simde_vshl_n_s32(a, n) _mm_slli_pi32((a), (n))
119 #endif
120 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
121 #undef vshl_n_s32
122 #define vshl_n_s32(a, n) simde_vshl_n_s32((a), (n))
123 #endif
124
125 SIMDE_FUNCTION_ATTRIBUTES
126 simde_int64x1_t
simde_vshl_n_s64(const simde_int64x1_t a,const int n)127 simde_vshl_n_s64 (const simde_int64x1_t a, const int n)
128 SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 63) {
129 simde_int64x1_private
130 r_,
131 a_ = simde_int64x1_to_private(a);
132
133 #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
134 r_.values = a_.values << n;
135 #else
136 SIMDE_VECTORIZE
137 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
138 r_.values[i] = HEDLEY_STATIC_CAST(int64_t, a_.values[i] << n);
139 }
140 #endif
141
142 return simde_int64x1_from_private(r_);
143 }
144 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
145 #define simde_vshl_n_s64(a, n) vshl_n_s64((a), (n))
146 #elif defined(SIMDE_X86_MMX_NATIVE)
147 #define simde_vshl_n_s64(a, n) _mm_slli_si64((a), (n))
148 #endif
149 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
150 #undef vshl_n_s64
151 #define vshl_n_s64(a, n) simde_vshl_n_u64((a), (n))
152 #endif
153
154 SIMDE_FUNCTION_ATTRIBUTES
155 simde_uint8x8_t
simde_vshl_n_u8(const simde_uint8x8_t a,const int n)156 simde_vshl_n_u8 (const simde_uint8x8_t a, const int n)
157 SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 7) {
158 simde_uint8x8_private
159 r_,
160 a_ = simde_uint8x8_to_private(a);
161
162 #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
163 r_.values = a_.values << HEDLEY_STATIC_CAST(uint8_t, n);
164 #else
165 SIMDE_VECTORIZE
166 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
167 r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, a_.values[i] << n);
168 }
169 #endif
170
171 return simde_uint8x8_from_private(r_);
172 }
173 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
174 #define simde_vshl_n_u8(a, n) vshl_n_u8((a), (n))
175 #elif defined(SIMDE_X86_MMX_NATIVE)
176 #define simde_vshl_n_u8(a, n) \
177 _mm_andnot_si64(_mm_set1_pi8((1 << n) - 1), _mm_slli_si64((a), (n)))
178 #endif
179 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
180 #undef vshl_n_u8
181 #define vshl_n_u8(a, n) simde_vshl_n_u8((a), (n))
182 #endif
183
184 SIMDE_FUNCTION_ATTRIBUTES
185 simde_uint16x4_t
simde_vshl_n_u16(const simde_uint16x4_t a,const int n)186 simde_vshl_n_u16 (const simde_uint16x4_t a, const int n)
187 SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 15) {
188 simde_uint16x4_private
189 r_,
190 a_ = simde_uint16x4_to_private(a);
191
192 #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
193 r_.values = a_.values << HEDLEY_STATIC_CAST(uint16_t, n);
194 #else
195 SIMDE_VECTORIZE
196 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
197 r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, a_.values[i] << n);
198 }
199 #endif
200
201 return simde_uint16x4_from_private(r_);
202 }
203 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
204 #define simde_vshl_n_u16(a, n) vshl_n_u16((a), (n))
205 #elif defined(SIMDE_X86_MMX_NATIVE)
206 #define simde_vshl_n_u16(a, n) _mm_slli_pi16((a), (n))
207 #endif
208 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
209 #undef vshl_n_u16
210 #define vshl_n_u16(a, n) simde_vshl_n_u16((a), (n))
211 #endif
212
213 SIMDE_FUNCTION_ATTRIBUTES
214 simde_uint32x2_t
simde_vshl_n_u32(const simde_uint32x2_t a,const int n)215 simde_vshl_n_u32 (const simde_uint32x2_t a, const int n)
216 SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 31) {
217 simde_uint32x2_private
218 r_,
219 a_ = simde_uint32x2_to_private(a);
220
221 #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
222 r_.values = a_.values << n;
223 #else
224 SIMDE_VECTORIZE
225 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
226 r_.values[i] = HEDLEY_STATIC_CAST(uint32_t, a_.values[i] << n);
227 }
228 #endif
229
230 return simde_uint32x2_from_private(r_);
231 }
232 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
233 #define simde_vshl_n_u32(a, n) vshl_n_u32((a), (n))
234 #elif defined(SIMDE_X86_MMX_NATIVE)
235 #define simde_vshl_n_u32(a, n) _mm_slli_pi32((a), (n))
236 #endif
237 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
238 #undef vshl_n_u32
239 #define vshl_n_u32(a, n) simde_vshl_n_u32((a), (n))
240 #endif
241
242 SIMDE_FUNCTION_ATTRIBUTES
243 simde_uint64x1_t
simde_vshl_n_u64(const simde_uint64x1_t a,const int n)244 simde_vshl_n_u64 (const simde_uint64x1_t a, const int n)
245 SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 63) {
246 simde_uint64x1_private
247 r_,
248 a_ = simde_uint64x1_to_private(a);
249
250 #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
251 r_.values = a_.values << n;
252 #else
253 SIMDE_VECTORIZE
254 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
255 r_.values[i] = HEDLEY_STATIC_CAST(uint64_t, a_.values[i] << n);
256 }
257 #endif
258
259 return simde_uint64x1_from_private(r_);
260 }
261 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
262 #define simde_vshl_n_u64(a, n) vshl_n_u64((a), (n))
263 #elif defined(SIMDE_X86_MMX_NATIVE)
264 #define simde_vshl_n_u64(a, n) _mm_slli_si64((a), (n))
265 #endif
266 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
267 #undef vshl_n_u64
268 #define vshl_n_u64(a, n) simde_vshl_n_u64((a), (n))
269 #endif
270
271 SIMDE_FUNCTION_ATTRIBUTES
272 simde_int8x16_t
simde_vshlq_n_s8(const simde_int8x16_t a,const int n)273 simde_vshlq_n_s8 (const simde_int8x16_t a, const int n)
274 SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 7) {
275 #if defined(SIMDE_X86_SSE2_NATIVE)
276 return _mm_andnot_si128(_mm_set1_epi8(HEDLEY_STATIC_CAST(int8_t, (1 << n) - 1)), _mm_slli_epi64(a, n));
277 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
278 return wasm_i8x16_shl(a, n);
279 #else
280 simde_int8x16_private
281 r_,
282 a_ = simde_int8x16_to_private(a);
283
284 #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
285 r_.values = a_.values << HEDLEY_STATIC_CAST(int8_t, n);
286 #else
287 SIMDE_VECTORIZE
288 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
289 r_.values[i] = HEDLEY_STATIC_CAST(int8_t, a_.values[i] << n);
290 }
291 #endif
292
293 return simde_int8x16_from_private(r_);
294 #endif
295 }
296 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
297 #define simde_vshlq_n_s8(a, n) vshlq_n_s8((a), (n))
298 #elif defined(SIMDE_POWER_ALTIVEC_P5_NATIVE)
299 #define simde_vshlq_n_s8(a, n) vec_sl((a), vec_splats(SIMDE_CHECKED_STATIC_CAST(unsigned char, int, (n))))
300 #endif
301 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
302 #undef vshlq_n_s8
303 #define vshlq_n_s8(a, n) simde_vshlq_n_s8((a), (n))
304 #endif
305
306 SIMDE_FUNCTION_ATTRIBUTES
307 simde_int16x8_t
simde_vshlq_n_s16(const simde_int16x8_t a,const int n)308 simde_vshlq_n_s16 (const simde_int16x8_t a, const int n)
309 SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 15) {
310 #if defined(SIMDE_X86_SSE2_NATIVE)
311 return _mm_slli_epi16((a), (n));
312 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
313 return wasm_i16x8_shl((a), (n));
314 #else
315 simde_int16x8_private
316 r_,
317 a_ = simde_int16x8_to_private(a);
318
319 #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
320 r_.values = a_.values << HEDLEY_STATIC_CAST(int16_t, n);
321 #else
322 SIMDE_VECTORIZE
323 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
324 r_.values[i] = HEDLEY_STATIC_CAST(int16_t, a_.values[i] << n);
325 }
326 #endif
327
328 return simde_int16x8_from_private(r_);
329 #endif
330 }
331 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
332 #define simde_vshlq_n_s16(a, n) vshlq_n_s16((a), (n))
333 #elif defined(SIMDE_POWER_ALTIVEC_P5_NATIVE)
334 #define simde_vshlq_n_s16(a, n) vec_sl((a), vec_splats(SIMDE_CHECKED_STATIC_CAST(unsigned short, int, (n))))
335 #endif
336 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
337 #undef vshlq_n_s16
338 #define vshlq_n_s16(a, n) simde_vshlq_n_s16((a), (n))
339 #endif
340
341 SIMDE_FUNCTION_ATTRIBUTES
342 simde_int32x4_t
simde_vshlq_n_s32(const simde_int32x4_t a,const int n)343 simde_vshlq_n_s32 (const simde_int32x4_t a, const int n)
344 SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 31) {
345 #if defined(SIMDE_X86_SSE2_NATIVE)
346 return _mm_slli_epi32((a), (n));
347 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
348 return wasm_i32x4_shl((a), (n));
349 #else
350 simde_int32x4_private
351 r_,
352 a_ = simde_int32x4_to_private(a);
353
354 #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
355 r_.values = a_.values << n;
356 #else
357 SIMDE_VECTORIZE
358 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
359 r_.values[i] = HEDLEY_STATIC_CAST(int32_t, a_.values[i] << n);
360 }
361 #endif
362
363 return simde_int32x4_from_private(r_);
364 #endif
365 }
366 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
367 #define simde_vshlq_n_s32(a, n) vshlq_n_s32((a), (n))
368 #elif defined(SIMDE_POWER_ALTIVEC_P5_NATIVE)
369 #define simde_vshlq_n_s32(a, n) vec_sl((a), vec_splats(HEDLEY_STATIC_CAST(unsigned int, (n))))
370 #endif
371 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
372 #undef vshlq_n_s32
373 #define vshlq_n_s32(a, n) simde_vshlq_n_s32((a), (n))
374 #endif
375
376 SIMDE_FUNCTION_ATTRIBUTES
377 simde_int64x2_t
simde_vshlq_n_s64(const simde_int64x2_t a,const int n)378 simde_vshlq_n_s64 (const simde_int64x2_t a, const int n)
379 SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 63) {
380 #if defined(SIMDE_X86_SSE2_NATIVE)
381 return _mm_slli_epi64((a), (n));
382 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
383 return wasm_i64x2_shl((a), (n));
384 #else
385 simde_int64x2_private
386 r_,
387 a_ = simde_int64x2_to_private(a);
388
389 #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
390 r_.values = a_.values << n;
391 #else
392 SIMDE_VECTORIZE
393 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
394 r_.values[i] = HEDLEY_STATIC_CAST(int64_t, a_.values[i] << n);
395 }
396 #endif
397
398 return simde_int64x2_from_private(r_);
399 #endif
400 }
401 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
402 #define simde_vshlq_n_s64(a, n) vshlq_n_s64((a), (n))
403 #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
404 #define simde_vshlq_n_s64(a, n) vec_sl((a), vec_splats(HEDLEY_STATIC_CAST(unsigned long long, (n))))
405 #endif
406 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
407 #undef vshlq_n_s64
408 #define vshlq_n_s64(a, n) simde_vshlq_n_s64((a), (n))
409 #endif
410
411 SIMDE_FUNCTION_ATTRIBUTES
412 simde_uint8x16_t
simde_vshlq_n_u8(const simde_uint8x16_t a,const int n)413 simde_vshlq_n_u8 (const simde_uint8x16_t a, const int n)
414 SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 7) {
415 #if defined(SIMDE_X86_SSE2_NATIVE)
416 return _mm_andnot_si128(_mm_set1_epi8(HEDLEY_STATIC_CAST(int8_t, (1 << n) - 1)), _mm_slli_epi64((a), (n)));
417 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
418 return wasm_i8x16_shl((a), (n));
419 #else
420 simde_uint8x16_private
421 r_,
422 a_ = simde_uint8x16_to_private(a);
423
424 #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
425 r_.values = a_.values << HEDLEY_STATIC_CAST(uint8_t, n);
426 #else
427 SIMDE_VECTORIZE
428 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
429 r_.values[i] = HEDLEY_STATIC_CAST(uint8_t, a_.values[i] << n);
430 }
431 #endif
432
433 return simde_uint8x16_from_private(r_);
434 #endif
435 }
436 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
437 #define simde_vshlq_n_u8(a, n) vshlq_n_u8((a), (n))
438 #elif defined(SIMDE_POWER_ALTIVEC_P5_NATIVE)
439 #define simde_vshlq_n_u8(a, n) vec_sl((a), vec_splat_u8(n))
440 #endif
441 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
442 #undef vshlq_n_u8
443 #define vshlq_n_u8(a, n) simde_vshlq_n_u8((a), (n))
444 #endif
445
446 SIMDE_FUNCTION_ATTRIBUTES
447 simde_uint16x8_t
simde_vshlq_n_u16(const simde_uint16x8_t a,const int n)448 simde_vshlq_n_u16 (const simde_uint16x8_t a, const int n)
449 SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 15) {
450 #if defined(SIMDE_X86_SSE2_NATIVE)
451 return _mm_slli_epi16((a), (n));
452 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
453 return wasm_i16x8_shl((a), (n));
454 #else
455 simde_uint16x8_private
456 r_,
457 a_ = simde_uint16x8_to_private(a);
458
459 #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
460 r_.values = a_.values << HEDLEY_STATIC_CAST(uint16_t, n);
461 #else
462 SIMDE_VECTORIZE
463 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
464 r_.values[i] = HEDLEY_STATIC_CAST(uint16_t, a_.values[i] << n);
465 }
466 #endif
467
468 return simde_uint16x8_from_private(r_);
469 #endif
470 }
471 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
472 #define simde_vshlq_n_u16(a, n) vshlq_n_u16((a), (n))
473 #elif defined(SIMDE_POWER_ALTIVEC_P5_NATIVE)
474 #define simde_vshlq_n_u16(a, n) vec_sl((a), vec_splat_u16(n))
475 #endif
476 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
477 #undef vshlq_n_u16
478 #define vshlq_n_u16(a, n) simde_vshlq_n_u16((a), (n))
479 #endif
480
481 SIMDE_FUNCTION_ATTRIBUTES
482 simde_uint32x4_t
simde_vshlq_n_u32(const simde_uint32x4_t a,const int n)483 simde_vshlq_n_u32 (const simde_uint32x4_t a, const int n)
484 SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 31) {
485 #if defined(SIMDE_X86_SSE2_NATIVE)
486 return _mm_slli_epi32((a), (n));
487 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
488 return wasm_i32x4_shl((a), (n));
489 #else
490 simde_uint32x4_private
491 r_,
492 a_ = simde_uint32x4_to_private(a);
493
494 #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
495 r_.values = a_.values << n;
496 #else
497 SIMDE_VECTORIZE
498 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
499 r_.values[i] = HEDLEY_STATIC_CAST(uint32_t, a_.values[i] << n);
500 }
501 #endif
502
503 return simde_uint32x4_from_private(r_);
504 #endif
505 }
506 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
507 #define simde_vshlq_n_u32(a, n) vshlq_n_u32((a), (n))
508 #elif defined(SIMDE_POWER_ALTIVEC_P5_NATIVE)
509 #define simde_vshlq_n_u32(a, n) vec_sl((a), vec_splats(HEDLEY_STATIC_CAST(unsigned int, (n))))
510 #endif
511 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
512 #undef vshlq_n_u32
513 #define vshlq_n_u32(a, n) simde_vshlq_n_u32((a), (n))
514 #endif
515
516 SIMDE_FUNCTION_ATTRIBUTES
517 simde_uint64x2_t
simde_vshlq_n_u64(const simde_uint64x2_t a,const int n)518 simde_vshlq_n_u64 (const simde_uint64x2_t a, const int n)
519 SIMDE_REQUIRE_CONSTANT_RANGE(n, 0, 63) {
520 #if defined(SIMDE_X86_SSE2_NATIVE)
521 return _mm_slli_epi64((a), (n));
522 #elif defined(SIMDE_WASM_SIMD128_NATIVE)
523 return wasm_i64x2_shl((a), (n));
524 #else
525 simde_uint64x2_private
526 r_,
527 a_ = simde_uint64x2_to_private(a);
528
529 #if defined(SIMDE_VECTOR_SUBSCRIPT_SCALAR)
530 r_.values = a_.values << n;
531 #else
532 SIMDE_VECTORIZE
533 for (size_t i = 0 ; i < (sizeof(r_.values) / sizeof(r_.values[0])) ; i++) {
534 r_.values[i] = HEDLEY_STATIC_CAST(uint64_t, a_.values[i] << n);
535 }
536 #endif
537
538 return simde_uint64x2_from_private(r_);
539 #endif
540 }
541 #if defined(SIMDE_ARM_NEON_A32V7_NATIVE)
542 #define simde_vshlq_n_u64(a, n) vshlq_n_u64((a), (n))
543 #elif defined(SIMDE_POWER_ALTIVEC_P8_NATIVE)
544 #define simde_vshlq_n_u64(a, n) vec_sl((a), vec_splats(HEDLEY_STATIC_CAST(unsigned long long, (n))));
545 #endif
546 #if defined(SIMDE_ARM_NEON_A32V7_ENABLE_NATIVE_ALIASES)
547 #undef vshlq_n_u64
548 #define vshlq_n_u64(a, n) simde_vshlq_n_u64((a), (n))
549 #endif
550
551 SIMDE_END_DECLS_
552 HEDLEY_DIAGNOSTIC_POP
553
554 #endif /* !defined(SIMDE_ARM_NEON_SHL_N_H) */
555