1 /* SPDX-License-Identifier: MIT
2  *
3  * Permission is hereby granted, free of charge, to any person
4  * obtaining a copy of this software and associated documentation
5  * files (the "Software"), to deal in the Software without
6  * restriction, including without limitation the rights to use, copy,
7  * modify, merge, publish, distribute, sublicense, and/or sell copies
8  * of the Software, and to permit persons to whom the Software is
9  * furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be
12  * included in all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
16  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
18  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
19  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21  * SOFTWARE.
22  *
23  * Copyright:
24  *   2020      Evan Nemerson <evan@nemerson.com>
25  *   2020      Ashleigh Newman-Jones <ashnewman-jones@hotmail.co.uk>
26  */
27 
28 #if !defined(SIMDE_X86_AVX512_MADDUBS_H)
29 #define SIMDE_X86_AVX512_MADDUBS_H
30 
31 #include "types.h"
32 #include "mov.h"
33 #include "../avx2.h"
34 
35 HEDLEY_DIAGNOSTIC_PUSH
36 SIMDE_DISABLE_UNWANTED_DIAGNOSTICS
37 SIMDE_BEGIN_DECLS_
38 
39 
40 SIMDE_FUNCTION_ATTRIBUTES
41 simde__m128i
simde_mm_mask_maddubs_epi16(simde__m128i src,simde__mmask8 k,simde__m128i a,simde__m128i b)42 simde_mm_mask_maddubs_epi16 (simde__m128i src, simde__mmask8 k, simde__m128i a, simde__m128i b) {
43   #if defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
44     return _mm_mask_maddubs_epi16(src, k, a, b);
45   #else
46     return simde_mm_mask_mov_epi16(src, k, simde_mm_maddubs_epi16(a, b));
47   #endif
48 }
49 #if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) && defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES)
50   #undef _mm_mask_maddubs_epi16
51   #define _mm_mask_maddubs_epi16(a, b) simde_mm_mask_maddubs_epi16(a, b)
52 #endif
53 
54 SIMDE_FUNCTION_ATTRIBUTES
55 simde__m128i
simde_mm_maskz_maddubs_epi16(simde__mmask8 k,simde__m128i a,simde__m128i b)56 simde_mm_maskz_maddubs_epi16 (simde__mmask8 k, simde__m128i a, simde__m128i b) {
57   #if defined(SIMDE_X86_AVX512BW_NATIVE ) && defined(SIMDE_X86_AVX512VL_NATIVE)
58     return _mm_maskz_maddubs_epi16(k, a, b);
59   #else
60     return simde_mm_maskz_mov_epi16(k, simde_mm_maddubs_epi16(a, b));
61   #endif
62 }
63 #if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) && defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES)
64   #undef _mm_maskz_maddubs_epi16
65   #define _mm_maskz_maddubs_epi16(a, b) simde_mm_maskz_maddubs_epi16(a, b)
66 #endif
67 
68 SIMDE_FUNCTION_ATTRIBUTES
69 simde__m256i
simde_mm256_mask_maddubs_epi16(simde__m256i src,simde__mmask16 k,simde__m256i a,simde__m256i b)70 simde_mm256_mask_maddubs_epi16 (simde__m256i src, simde__mmask16 k, simde__m256i a, simde__m256i b) {
71   #if defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
72     return _mm256_mask_maddubs_epi16(src, k, a, b);
73   #else
74     return simde_mm256_mask_mov_epi16(src, k, simde_mm256_maddubs_epi16(a, b));
75   #endif
76 }
77 #if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) && defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES)
78   #undef _mm256_mask_maddubs_epi16
79   #define _mm256_mask_maddubs_epi16(a, b) simde_mm256_mask_maddubs_epi16(a, b)
80 #endif
81 
82 SIMDE_FUNCTION_ATTRIBUTES
83 simde__m256i
simde_mm256_maskz_maddubs_epi16(simde__mmask16 k,simde__m256i a,simde__m256i b)84 simde_mm256_maskz_maddubs_epi16 (simde__mmask16 k, simde__m256i a, simde__m256i b) {
85   #if defined(SIMDE_X86_AVX512BW_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
86     return _mm256_maskz_maddubs_epi16(k, a, b);
87   #else
88     return simde_mm256_maskz_mov_epi16(k, simde_mm256_maddubs_epi16(a, b));
89   #endif
90 }
91 #if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES) && defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES)
92   #undef _mm256_maskz_maddubs_epi16
93   #define _mm256_maskz_maddubs_epi16(a, b) simde_mm256_maskz_maddubs_epi16(a, b)
94 #endif
95 
96 SIMDE_FUNCTION_ATTRIBUTES
97 simde__m512i
simde_mm512_maddubs_epi16(simde__m512i a,simde__m512i b)98 simde_mm512_maddubs_epi16 (simde__m512i a, simde__m512i b) {
99   #if defined(SIMDE_X86_AVX512BW_NATIVE)
100     return _mm512_maddubs_epi16(a, b);
101   #else
102     simde__m512i_private r_,
103       a_ = simde__m512i_to_private(a),
104       b_ = simde__m512i_to_private(b);
105 
106     #if SIMDE_NATURAL_VECTOR_SIZE_LE(256)
107       for (size_t i = 0 ; i < (sizeof(r_.m256i) / sizeof(r_.m256i[0])) ; i++) {
108         r_.m256i[i] = simde_mm256_maddubs_epi16(a_.m256i[i], b_.m256i[i]);
109       }
110     #else
111       for (size_t i = 0 ; i < (sizeof(r_.i16) / sizeof(r_.i16[0])) ; i++) {
112         const int idx = HEDLEY_STATIC_CAST(int, i) << 1;
113         int32_t ts =
114           (HEDLEY_STATIC_CAST(int16_t, a_.u8[  idx  ]) * HEDLEY_STATIC_CAST(int16_t, b_.i8[  idx  ])) +
115           (HEDLEY_STATIC_CAST(int16_t, a_.u8[idx + 1]) * HEDLEY_STATIC_CAST(int16_t, b_.i8[idx + 1]));
116         r_.i16[i] = (ts > INT16_MIN) ? ((ts < INT16_MAX) ? HEDLEY_STATIC_CAST(int16_t, ts) : INT16_MAX) : INT16_MIN;
117       }
118     #endif
119 
120     return simde__m512i_from_private(r_);
121   #endif
122 }
123 #if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES)
124   #undef _mm512_maddubs_epi16
125   #define _mm512_maddubs_epi16(a, b) simde_mm512_maddubs_epi16(a, b)
126 #endif
127 
128 SIMDE_FUNCTION_ATTRIBUTES
129 simde__m512i
simde_mm512_mask_maddubs_epi16(simde__m512i src,simde__mmask32 k,simde__m512i a,simde__m512i b)130 simde_mm512_mask_maddubs_epi16 (simde__m512i src, simde__mmask32 k, simde__m512i a, simde__m512i b) {
131   #if defined(SIMDE_X86_AVX512BW_NATIVE)
132     return _mm512_mask_maddubs_epi16(src, k, a, b);
133   #else
134     return simde_mm512_mask_mov_epi16(src, k, simde_mm512_maddubs_epi16(a, b));
135   #endif
136 }
137 #if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES)
138   #undef _mm512_mask_maddubs_epi16
139   #define _mm512_mask_maddubs_epi16(a, b) simde_mm512_mask_maddubs_epi16(a, b)
140 #endif
141 
142 SIMDE_FUNCTION_ATTRIBUTES
143 simde__m512i
simde_mm512_maskz_maddubs_epi16(simde__mmask32 k,simde__m512i a,simde__m512i b)144 simde_mm512_maskz_maddubs_epi16 (simde__mmask32 k, simde__m512i a, simde__m512i b) {
145   #if defined(SIMDE_X86_AVX512BW_NATIVE)
146     return _mm512_maskz_maddubs_epi16(k, a, b);
147   #else
148     return simde_mm512_maskz_mov_epi16(k, simde_mm512_maddubs_epi16(a, b));
149   #endif
150 }
151 #if defined(SIMDE_X86_AVX512BW_ENABLE_NATIVE_ALIASES)
152   #undef _mm512_maskz_maddubs_epi16
153   #define _mm512_maskz_maddubs_epi16(a, b) simde_mm512_maskz_maddubs_epi16(a, b)
154 #endif
155 
156 SIMDE_END_DECLS_
157 HEDLEY_DIAGNOSTIC_POP
158 
159 #endif /* !defined(SIMDE_X86_AVX512_MADDUBS_H) */
160