1 /* 2 * XBoxMediaPlayer 3 * Copyright (c) 2002 d7o3g4q and RUNTiME 4 * Portions Copyright (c) by the authors of ffmpeg and xvid 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License as published by 8 * the Free Software Foundation; either version 2 of the License, or 9 * (at your option) any later version. 10 * 11 * This program is distributed in the hope that it will be useful, 12 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * GNU General Public License for more details. 15 * 16 * You should have received a copy of the GNU General Public License 17 * along with this program; if not, write to the Free Software 18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 19 */ 20 21 // IoSupport.h: interface for the CIoSupport class. 22 // 23 ////////////////////////////////////////////////////////////////////// 24 25 #if !defined(AFX_IOSUPPORT_H__F084A488_BD6E_49D5_8CD3_0BE62149DB40__INCLUDED_) 26 #define AFX_IOSUPPORT_H__F084A488_BD6E_49D5_8CD3_0BE62149DB40__INCLUDED_ 27 28 #if _MSC_VER > 1000 29 #pragma once 30 #endif // _MSC_VER > 1000 31 32 #include <xtl.h> 33 34 #define TRAY_OPEN 16 35 #define TRAY_CLOSED_NO_MEDIA 64 36 #define TRAY_CLOSED_MEDIA_PRESENT 96 37 38 #define DRIVE_OPEN 0 // Open... 39 #define DRIVE_NOT_READY 1 // Opening.. Closing... 40 #define DRIVE_READY 2 41 #define DRIVE_CLOSED_NO_MEDIA 3 // CLOSED...but no media in drive 42 #define DRIVE_CLOSED_MEDIA_PRESENT 4 // Will be send once when the drive just have closed 43 44 #define MODE2_DATA_START 24 // Mode2 raw sector has 24 bytes before the data payload 45 #define MODE2_DATA_SIZE 2324 // And has 2324 usable bytes 46 #define RAW_SECTOR_SIZE 2352 // Raw sector size 47 48 //Important ATA IDENTIFY Structure offsets.. 49 //As per ATA Spec 50 #define HDD_SERIAL_OFFSET 0x014 51 #define HDD_MODEL_OFFSET 0x036 52 #define HDD_SECURITY_STATUS_OFFSET 0x100 53 54 //IDE Port Addresses 55 #define IDE_PRIMARY_PORT 0x01F0 56 #define IDE_SECONDARY_PORT 0x0170 57 58 //Important ATA Register Values 59 //As per ATA Spec 60 #define IDE_DEVICE_MASTER 0x00A0 61 #define IDE_DEVICE_SLAVE 0x00B0 62 63 //Important ATA/ATAPI Commands 64 //As per ATA Spec 65 #define IDE_ATAPI_IDENTIFY 0xA1 66 #define IDE_ATA_IDENTIFY 0xEC 67 68 #define IDE_ATA_SECURITY_SETPASSWORD 0xF1 69 #define IDE_ATA_SECURITY_UNLOCK 0xF2 70 #define IDE_ATA_SECURITY_FREEZE 0xF5 71 #define IDE_ATA_SECURITY_DISABLE 0xF6 72 73 //Important ATA IDENTIFY Data Structure values 74 //As per ATA Spec 75 #define IDE_SECURITY_SUPPORTED 0x0001 76 #define IDE_SECURITY_ENABLED 0x0002 77 #define IDE_SECURITY_PASSWORD_SET 0x0004 78 #define IDE_SECURITY_FROZEN 0x0008 79 #define IDE_SECURITY_COUNT_EXPIRED 0x0010 80 #define IDE_SECURITY_LEVEL_MAX 0x0100 81 82 //Important ATA Command return register values 83 //As per ATA Spec 84 #define IDE_ERROR_SUCCESS 0x0000 85 #define IDE_ERROR_ABORT 0x0004 86 87 88 //Our SendATACommand needs this to figure our if we should 89 //read or write data to IDE registers.. 90 #define IDE_COMMAND_READ 0x00 91 #define IDE_COMMAND_WRITE 0x01 92 93 struct ATAPI_PACKET 94 { 95 BYTE bOperationCode ; 96 BYTE bReserved1 ; 97 BYTE bAddress1 ; 98 BYTE bAddress2 ; 99 BYTE bAddress3 ; 100 BYTE bAddress4 ; 101 BYTE bReserved2 ; 102 BYTE bTranferLength1 ; 103 BYTE bTranferLength2 ; 104 BYTE bReserved3 ; 105 BYTE bReserved4 ; 106 BYTE bReserved5 ; 107 }; 108 109 /* 110 The host waits until BSY and DRQ are 0 and subsequently initializes the ATAPI task file. 111 Then it writes the ATAPI PACKET opcode (A0h) into the command register. 112 113 The device sets BSY and prepares to accept the command packet proper. 114 When it is ready it sets COD and cancels IO. Then it sets DRQ and cancels BSY. 115 116 As soon as it sees DRQ, the host writes the 12 command bytes into the data register. 117 After having received the 12th byte the device cancels DRQ, sets BSY and reads the 118 features and the byte count from the task file. 119 120 Let us now assume that we are dealing with a command packet which entails a data transfer 121 to the host. The device executes the command and prepares for the data transfer. 122 123 The device loads the byte count register, sets IO and cancels COD, sets DRQ and cancels BSY, 124 and finally sets INTRO. 125 126 As soon as the host sees DRQ, it reads the status register. As a reaction, the device 127 cancels INTRO. The host reads the data register as many times as specified in the byte 128 count register. When all data are read the device negates DRQ. 129 130 The device writes the final status into the status register, sets COD, IO, and DRDY and 131 cancels BSY and DRQ. Finally it sets INTRQ. 132 133 This is the signal for the host to read the final status and, if necessary, 134 the error register [3]. 135 */ 136 137 //http://216.239.33.100/search?q=cache:TGJT7HXOmfUJ:www.pjrc.com/tech/mp3/gallery/cs580/ata_atapi.html+%22atapi+packet%22+ata&hl=en&ie=UTF-8 138 //http://akrip.sourceforge.net/8020r26.pdf 139 140 //IDE ATA Input Registers Structure 141 struct IP_IDE_REG 142 { 143 BYTE bFeaturesReg; 144 BYTE bSectorCountReg; 145 BYTE bSectorNumberReg; 146 BYTE bCylLowReg; 147 BYTE bCylHighReg; 148 BYTE bDriveHeadReg; 149 BYTE bCommandReg; 150 }; 151 152 //IDE ATA Output Registers Structure 153 struct OP_IDE_REG 154 { 155 BYTE bErrorReg; 156 BYTE bSectorCountReg; 157 BYTE bSectorNumberReg; 158 BYTE bCylLowReg; 159 BYTE bCylHighReg; 160 BYTE bDriveHeadReg; 161 BYTE bStatusReg; 162 }; 163 164 //Our own object for issuing commands.. 165 //Includes in/ou register objects and 1 Sector of HDD Data 166 struct ATA_COMMAND_OBJ 167 { 168 IP_IDE_REG IPReg; 169 OP_IDE_REG OPReg; 170 BYTE DATA_BUFFER[512]; 171 ULONG DATA_BUFFSIZE; 172 }; 173 174 175 //Enum for Devices on SMBus 176 enum SMBUS_DEVICES 177 { 178 SMBDEV_PIC16L = 0x20, 179 SMBDEV_VIDEO_ENCODER = 0x8a, 180 SMBDEV_TEMP_MONITOR = 0x98, 181 SMBDEV_TEMP_MONITOR_READ = 0x99, 182 SMBDEV_EEPROM = 0xA8 183 184 }; 185 186 //Commands that can be sent to the PIC 187 enum PIC16L_CMD 188 { 189 PIC16L_CMD_POWER = 0x02, 190 PIC16L_CMD_LED_MODE = 0x07, 191 PIC16L_CMD_LED_REGISTER = 0x08, 192 PIC16L_CMD_EJECT = 0x0C, 193 PIC16L_CMD_INTERRUPT_REASON = 0x11, 194 PIC16L_CMD_RESET_ON_EJECT = 0x19, 195 PIC16L_CMD_SCRATCH_REGISTER = 0x1B 196 197 }; 198 199 200 201 #include <string> 202 using namespace std; 203 204 #include "wnaspi32.h" 205 206 #define PACKED 207 208 #pragma pack(1) 209 typedef struct 210 { 211 BYTE rsvd; 212 BYTE ADR; 213 BYTE trackNumber; 214 BYTE rsvd2; 215 BYTE addr[4]; 216 } 217 PACKED TOCTRACK_SCSI; 218 219 220 typedef struct 221 { 222 WORD tocLen; 223 BYTE firstTrack; 224 BYTE lastTrack; 225 TOCTRACK_SCSI tracks[100]; 226 } 227 PACKED TOC_SCSI, *PTOC_SCSI, FAR * LPTOC_SCSI; 228 229 #pragma pack() 230 231 class CIoSupport 232 { 233 public: 234 235 CIoSupport(); 236 CIoSupport(CIoSupport& other); 237 virtual ~CIoSupport(); 238 239 HRESULT Mount(const char* szDrive, char* szDevice); 240 HRESULT Unmount(const char* szDrive); 241 242 HRESULT GetDeviceFromSymlink(LPCSTR szDrive, LPSTR szDevice); 243 HRESULT Remount(const char* szDrive, char* szDevice); 244 HRESULT Remap(char* szMapping); 245 246 DWORD GetTrayState(); 247 HRESULT EjectTray(); 248 HRESULT CloseTray(); 249 250 string GetDrive(const string& szPartition); 251 VOID GetPartition(LPCSTR strFilename, LPSTR strPartition); 252 VOID RemountDrive(LPCSTR szDrive); 253 254 VOID UpdateDvdrom(); 255 256 HANDLE OpenCDROM(); 257 HANDLE OpenCDROM2(); 258 INT ReadSector(HANDLE hDevice, DWORD dwSector, LPSTR lpczBuffer); 259 INT ReadSomeSectors(HANDLE hDevice, DWORD dwSector, LPSTR lpczBuffer, int numsectors); 260 INT ReadSectorMode2(HANDLE hDevice, DWORD dwSector, LPSTR lpczBuffer); 261 INT ReadSectorCDDA(HANDLE hDevice, DWORD dwSector, LPSTR lpczBuffer); 262 VOID CloseCDROM(HANDLE hDevice); 263 DWORD GetSCSITOC(LPTOC_SCSI itoc, HANDLE hcdrom); 264 265 BOOL IsDebug(); 266 HRESULT Shutdown(); 267 268 DWORD IOCTLSendASPI32Command(HANDLE hIOCTL, LPSRB pSRB); 269 DWORD ReadXASector(HANDLE hIOCTL, unsigned int sectornum, unsigned int numsectors, unsigned char *secbuf); 270 DWORD ReadXASector2(unsigned int sectornum, unsigned int numsectors, unsigned char *secbuf); 271 272 private: 273 HGLOBAL m_gmXferBuffer; 274 PVOID m_rawXferBuffer; 275 DWORD m_dwTrayState; 276 DWORD m_dwTrayCount; 277 DWORD m_dwLastTrayState; 278 }; 279 280 #endif // !defined(AFX_IOSUPPORT_H__F084A488_BD6E_49D5_8CD3_0BE62149DB40__INCLUDED_) 281