| /dragonfly/sys/dev/drm/radeon/ |
| H A D | btc_dpm.c | 1189 u32 clock, u16 max_voltage, u16 *voltage) in btc_apply_voltage_dependency_rules() argument
1198 if (*voltage < table->entries[i].v) in btc_apply_voltage_dependency_rules()
1199 *voltage = (u16)((table->entries[i].v < max_voltage) ? in btc_apply_voltage_dependency_rules()
1205 *voltage = (*voltage > max_voltage) ? *voltage : max_voltage; in btc_apply_voltage_dependency_rules()
1293 static u16 btc_find_voltage(struct atom_voltage_table *table, u16 voltage) in btc_find_voltage() argument
1298 if (voltage <= table->entries[i].value) in btc_find_voltage()
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| H A D | r600.c | 771 struct radeon_voltage *voltage = &ps->clock_info[req_cm_idx].voltage; in r600_pm_misc() local
773 if ((voltage->type == VOLTAGE_SW) && voltage->voltage) { in r600_pm_misc()
775 if (voltage->voltage == 0xff01) in r600_pm_misc()
777 if (voltage->voltage != rdev->pm.current_vddc) { in r600_pm_misc()
778 radeon_atom_set_voltage(rdev, voltage->voltage, SET_VOLTAGE_TYPE_ASIC_VDDC); in r600_pm_misc()
779 rdev->pm.current_vddc = voltage->voltage; in r600_pm_misc()
780 DRM_DEBUG_DRIVER("Setting: v: %d\n", voltage->voltage); in r600_pm_misc()
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| H A D | si_dpm.h | 127 u16 voltage; member
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| H A D | radeon_pm.c | 349 clock_info->voltage.voltage); in radeon_pm_print_states()
1300 …rent_vddc = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.voltage; in radeon_pm_resume_old()
1301 …rrent_vddci = rdev->pm.power_state[rdev->pm.default_power_state_index].clock_info[0].voltage.vddci; in radeon_pm_resume_old()
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| H A D | radeon.h | 315 u16 voltage_id, u16 *voltage);
317 u16 *voltage,
327 u16 *voltage);
1283 u16 voltage; member
1297 struct radeon_voltage voltage; member
1427 u16 voltage; member
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| H A D | trinity_dpm.c | 1510 u32 evclk, u32 ecclk, u16 *voltage) in trinity_get_vce_clock_voltage() argument
1519 *voltage = 0; in trinity_get_vce_clock_voltage()
1526 *voltage = table->entries[i].v; in trinity_get_vce_clock_voltage()
1534 *voltage = table->entries[table->count - 1].v; in trinity_get_vce_clock_voltage()
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| H A D | rs780_dpm.c | 378 static void rs780_force_voltage(struct radeon_device *rdev, u16 voltage) in rs780_force_voltage() argument
391 STARTING_PWM_HIGHTIME(voltage), in rs780_force_voltage()
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| H A D | ci_dpm.c | 2342 SMU7_Discrete_VoltageLevel *voltage) in ci_populate_mvdd_value() argument
2350 voltage->Voltage = pi->mvdd_voltage_table.entries[i].value; in ci_populate_mvdd_value()
2467 u32 clock, u32 *voltage) in ci_get_dependency_volt_by_clk() argument
2476 *voltage = allowed_clock_voltage_table->entries[i].v; in ci_get_dependency_volt_by_clk()
2481 *voltage = allowed_clock_voltage_table->entries[i-1].v; in ci_get_dependency_volt_by_clk()
5068 ci_patch_with_vddc_leakage(rdev, &table->entries[i].voltage); in ci_patch_vddc_phase_shed_limit_table_with_vddc_leakage()
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| /dragonfly/sys/bus/mmc/ |
| H A D | mmcbr_if.m | 82 # supply voltage (VDD/VCC) to use for the device, the clock frequency, the
91 # Called by the mmcbus to switch the signaling voltage (VCCQ).
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| /dragonfly/sys/dev/drm/amd/powerplay/smumgr/ |
| H A D | fiji_smumgr.c | 366 uint32_t clock, uint32_t *voltage, uint32_t *mvdd) in fiji_get_dependency_volt_by_clk() argument
371 *voltage = *mvdd = 0; in fiji_get_dependency_volt_by_clk()
381 *voltage |= (dep_table->entries[i].vddc * in fiji_get_dependency_volt_by_clk()
384 *voltage |= (data->vbios_boot_state.vddci_bootup_value * in fiji_get_dependency_volt_by_clk()
387 *voltage |= (dep_table->entries[i].vddci * in fiji_get_dependency_volt_by_clk()
393 *voltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT; in fiji_get_dependency_volt_by_clk()
403 *voltage |= 1 << PHASES_SHIFT; in fiji_get_dependency_volt_by_clk()
409 *voltage |= (dep_table->entries[i - 1].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; in fiji_get_dependency_volt_by_clk()
412 *voltage |= (data->vbios_boot_state.vddci_bootup_value * in fiji_get_dependency_volt_by_clk()
418 *voltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT; in fiji_get_dependency_volt_by_clk()
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| H A D | polaris10_smumgr.c | 353 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) in polaris10_get_dependency_volt_by_clk() argument
359 *voltage = *mvdd = 0; in polaris10_get_dependency_volt_by_clk()
368 *voltage |= (dep_table->entries[i].vddc * in polaris10_get_dependency_volt_by_clk()
371 *voltage |= (data->vbios_boot_state.vddci_bootup_value * in polaris10_get_dependency_volt_by_clk()
374 *voltage |= (dep_table->entries[i].vddci * in polaris10_get_dependency_volt_by_clk()
380 *voltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT; in polaris10_get_dependency_volt_by_clk()
390 *voltage |= 1 << PHASES_SHIFT; in polaris10_get_dependency_volt_by_clk()
396 *voltage |= (dep_table->entries[i - 1].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; in polaris10_get_dependency_volt_by_clk()
399 *voltage |= (data->vbios_boot_state.vddci_bootup_value * in polaris10_get_dependency_volt_by_clk()
405 *voltage |= (vddci * VOLTAGE_SCALE) << VDDCI_SHIFT; in polaris10_get_dependency_volt_by_clk()
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| H A D | tonga_smumgr.c | 238 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) in tonga_get_dependency_volt_by_clk() argument
252 voltage->VddGfx = phm_get_voltage_index( in tonga_get_dependency_volt_by_clk()
255 voltage->Vddc = phm_get_voltage_index( in tonga_get_dependency_volt_by_clk()
260 voltage->Vddci = in tonga_get_dependency_volt_by_clk()
263 voltage->Vddci = in tonga_get_dependency_volt_by_clk()
271 voltage->Phases = 1; in tonga_get_dependency_volt_by_clk()
277 voltage->VddGfx = phm_get_voltage_index(pptable_info->vddgfx_lookup_table, in tonga_get_dependency_volt_by_clk()
279 voltage->Vddc = phm_get_voltage_index(pptable_info->vddc_lookup_table, in tonga_get_dependency_volt_by_clk()
283 voltage->Vddci = phm_get_voltage_id(&data->vddci_voltage_table, in tonga_get_dependency_volt_by_clk()
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| /dragonfly/sys/dev/drm/amd/amdgpu/ |
| H A D | amdgpu_atombios.c | 1189 u16 voltage_id, u16 *voltage) in amdgpu_atombios_get_max_vddc() argument
1208 *voltage = le16_to_cpu(args.v2.usVoltageLevel); in amdgpu_atombios_get_max_vddc()
1217 *voltage = le16_to_cpu(args.v3.usVoltageLevel); in amdgpu_atombios_get_max_vddc()
1228 u16 *voltage, in amdgpu_atombios_get_leakage_vddc_based_on_leakage_idx() argument
1231 return amdgpu_atombios_get_max_vddc(adev, VOLTAGE_TYPE_VDDC, leakage_idx, voltage); in amdgpu_atombios_get_leakage_vddc_based_on_leakage_idx()
1356 u16 *voltage) in amdgpu_atombios_get_voltage_evv() argument
1380 *voltage = le16_to_cpu(args.evv_out.usVoltageLevel); in amdgpu_atombios_get_voltage_evv()
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| H A D | amdgpu_dpm.h | 137 u16 voltage; member
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| H A D | si_dpm.h | 938 u16 voltage; member
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| /dragonfly/sys/dev/drm/amd/display/dc/calcs/ |
| H A D | dcn_calcs.c | 472 input.clks_cfg.voltage = v->voltage_level; in dcn_bw_calc_rq_dlg_ttu()
790 v->voltage[5] = dcn_bw_no_support; in dcn_validate_bandwidth()
791 v->voltage[4] = dcn_bw_v_max0p9; in dcn_validate_bandwidth()
792 v->voltage[3] = dcn_bw_v_max0p9; in dcn_validate_bandwidth()
793 v->voltage[2] = dcn_bw_v_nom0p8; in dcn_validate_bandwidth()
794 v->voltage[1] = dcn_bw_v_mid0p72; in dcn_validate_bandwidth()
795 v->voltage[0] = dcn_bw_v_min0p65; in dcn_validate_bandwidth()
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| H A D | dce_calcs.c | 109 enum bw_defines voltage; in calculate_bandwidth() local
1756 voltage = bw_def_na; in calculate_bandwidth()
1759 voltage = bw_def_notok; in calculate_bandwidth()
1762 voltage = bw_def_0_72; in calculate_bandwidth()
1765 voltage = bw_def_0_8; in calculate_bandwidth()
1769 voltage = bw_def_high_no_nbp_state_change; in calculate_bandwidth()
1772 voltage = bw_def_0_9; in calculate_bandwidth()
1776 voltage = bw_def_notok; in calculate_bandwidth()
1778 if (voltage == bw_def_0_72) { in calculate_bandwidth()
1781 else if (voltage == bw_def_0_8) { in calculate_bandwidth()
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| /dragonfly/sys/dev/drm/amd/powerplay/hwmgr/ |
| H A D | smu7_hwmgr.c | 1795 uint16_t *voltage, struct smu7_leakage_voltage *leakage_table) in smu7_patch_ppt_v1_with_vdd_leakage() argument
1803 if (leakage_table->leakage_id[index] == *voltage) { in smu7_patch_ppt_v1_with_vdd_leakage()
1804 *voltage = leakage_table->actual_voltage[index]; in smu7_patch_ppt_v1_with_vdd_leakage()
1809 if (*voltage > ATOM_VIRTUAL_VOLTAGE_ID0) in smu7_patch_ppt_v1_with_vdd_leakage()
2247 uint32_t *voltage, struct smu7_leakage_voltage *leakage_table) in smu7_patch_ppt_v0_with_vdd_leakage() argument
2255 if (leakage_table->leakage_id[index] == *voltage) { in smu7_patch_ppt_v0_with_vdd_leakage()
2256 *voltage = leakage_table->actual_voltage[index]; in smu7_patch_ppt_v0_with_vdd_leakage()
2261 if (*voltage > ATOM_VIRTUAL_VOLTAGE_ID0) in smu7_patch_ppt_v0_with_vdd_leakage()
4800 uint32_t voltage) in smu7_check_clk_voltage_valid() argument
4804 if (voltage < data->odn_dpm_table.min_vddc || voltage > data->odn_dpm_table.max_vddc) { in smu7_check_clk_voltage_valid()
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| H A D | vega10_hwmgr.c | 585 uint16_t *voltage, struct vega10_leakage_voltage *leakage_table) in vega10_patch_with_vdd_leakage() argument
593 if (leakage_table->leakage_id[index] == *voltage) { in vega10_patch_with_vdd_leakage()
594 *voltage = leakage_table->actual_voltage[index]; in vega10_patch_with_vdd_leakage()
599 if (*voltage > ATOM_VIRTUAL_VOLTAGE_ID0) in vega10_patch_with_vdd_leakage()
4715 uint32_t voltage) in vega10_check_clk_voltage_valid() argument
4721 if (voltage < odn_table->min_vddc || voltage > odn_table->max_vddc) { in vega10_check_clk_voltage_valid()
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| H A D | smu8_hwmgr.c | 249 struct pp_hwmgr *hwmgr, uint16_t voltage) in smu8_convert_8Bit_index_to_voltage() argument
251 return 6200 - (voltage * 25); in smu8_convert_8Bit_index_to_voltage()
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| /dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/ |
| H A D | ar9300_eeprom.c | 2137 int voltage[AR9300_MAX_CHAINS]; in ar9300_calibration_apply() local
2201 voltage[ichain] = lvoltage[ichain]; in ar9300_calibration_apply()
2230 voltage[ichain] = lvoltage[ichain] + factor + plus; in ar9300_calibration_apply()
2235 voltage[ichain] = lvoltage[ichain]; in ar9300_calibration_apply()
2241 voltage[ichain] = hvoltage[ichain]; in ar9300_calibration_apply()
2246 voltage[ichain] = 0; in ar9300_calibration_apply()
2261 ah, frequency, correction, voltage, temperature); in ar9300_calibration_apply()
2271 int *correction, int *voltage, int *temperature) in ar9300_power_control_override() argument
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| H A D | ar9300eep.h | 632 …ontrol_override(struct ath_hal *ah, int frequency, int *correction, int *voltage, int *temperature…
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| /dragonfly/sys/dev/drm/amd/display/dc/inc/ |
| H A D | dcn_calcs.h | 103 float voltage[number_of_states_plus_one + 1]; member
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| /dragonfly/sys/dev/drm/amd/display/dc/core/ |
| H A D | dc_link_dp.c | 318 enum dc_voltage_swing voltage) in get_max_pre_emphasis_for_voltage_swing() argument
323 if (voltage <= VOLTAGE_SWING_MAX_LEVEL) in get_max_pre_emphasis_for_voltage_swing()
324 pre_emphasis = voltage_swing_to_pre_emphasis[voltage]; in get_max_pre_emphasis_for_voltage_swing()
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| /dragonfly/usr.sbin/mfiutil/ |
| H A D | mfi_show.c | 207 printf(" Current Voltage: %d mV\n", stat.voltage); in show_battery()
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