/dports/emulators/py-unicorn/unicorn-1.0.2/qemu/target-arm/ |
H A D | cpu64.c | 57 ARM_CP_CONST | ARM_CP_64BIT, PL1_RW, NULL, 0, }, 61 ARM_CP_CONST | ARM_CP_64BIT, PL1_RW, NULL, 0, }, 65 ARM_CP_CONST | ARM_CP_64BIT, PL1_RW, NULL, 0 }, 69 ARM_CP_CONST | ARM_CP_64BIT, PL1_RW, NULL, 0 },
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H A D | helper.c | 1103 ARM_CP_64BIT | ARM_CP_NO_MIGRATE | ARM_CP_IO, PL0_R, NULL, 0, 0, 1532 ARM_CP_NOP|ARM_CP_64BIT, PL1_W }, 1534 ARM_CP_NOP|ARM_CP_64BIT, PL1_W, }, 1536 ARM_CP_NOP|ARM_CP_64BIT, PL0_W, }, 1538 ARM_CP_NOP|ARM_CP_64BIT, PL0_W, }, 1540 ARM_CP_NOP|ARM_CP_64BIT, PL0_W, }, 1542 ARM_CP_NOP|ARM_CP_64BIT, PL1_W, }, 2067 ARM_CP_CONST|ARM_CP_64BIT, PL0_R, NULL, 0 }, 2069 ARM_CP_CONST|ARM_CP_64BIT, PL0_R, NULL, 0 }, 2806 int is64 = (r->type & ARM_CP_64BIT) ? 1 : 0; in add_cpreg_to_hashtable() [all …]
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/dports/emulators/unicorn/unicorn-1.0.2/qemu/target-arm/ |
H A D | cpu64.c | 57 ARM_CP_CONST | ARM_CP_64BIT, PL1_RW, NULL, 0, }, 61 ARM_CP_CONST | ARM_CP_64BIT, PL1_RW, NULL, 0, }, 65 ARM_CP_CONST | ARM_CP_64BIT, PL1_RW, NULL, 0 }, 69 ARM_CP_CONST | ARM_CP_64BIT, PL1_RW, NULL, 0 },
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H A D | helper.c | 1103 ARM_CP_64BIT | ARM_CP_NO_MIGRATE | ARM_CP_IO, PL0_R, NULL, 0, 0, 1532 ARM_CP_NOP|ARM_CP_64BIT, PL1_W }, 1534 ARM_CP_NOP|ARM_CP_64BIT, PL1_W, }, 1536 ARM_CP_NOP|ARM_CP_64BIT, PL0_W, }, 1538 ARM_CP_NOP|ARM_CP_64BIT, PL0_W, }, 1540 ARM_CP_NOP|ARM_CP_64BIT, PL0_W, }, 1542 ARM_CP_NOP|ARM_CP_64BIT, PL1_W, }, 2067 ARM_CP_CONST|ARM_CP_64BIT, PL0_R, NULL, 0 }, 2069 ARM_CP_CONST|ARM_CP_64BIT, PL0_R, NULL, 0 }, 2806 int is64 = (r->type & ARM_CP_64BIT) ? 1 : 0; in add_cpreg_to_hashtable() [all …]
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/target/arm/ |
H A D | cpu64.c | 79 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 85 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 91 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 97 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 },
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H A D | gdbstub.c | 143 if (ri->type & ARM_CP_64BIT) { in arm_register_sysreg_for_xml()
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/dports/emulators/qemu-utils/qemu-4.2.1/target/arm/ |
H A D | cpu64.c | 77 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 83 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 89 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 95 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 },
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H A D | gdbstub.c | 142 if (ri->type & ARM_CP_64BIT) { in arm_register_sysreg_for_xml()
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H A D | helper.c | 2807 .type = ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, 2815 .type = ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, 2830 .type = ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, 3696 .access = PL1_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 3698 .access = PL1_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 3700 .access = PL0_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 3702 .access = PL0_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 3704 .access = PL0_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 3706 .access = PL1_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 4912 .type = ARM_CP_64BIT | ARM_CP_ALIAS, [all …]
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/dports/emulators/qemu42/qemu-4.2.1/target/arm/ |
H A D | cpu64.c | 77 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 83 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 89 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 95 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 },
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H A D | gdbstub.c | 142 if (ri->type & ARM_CP_64BIT) { in arm_register_sysreg_for_xml()
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H A D | helper.c | 2807 .type = ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, 2815 .type = ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, 2830 .type = ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, 3696 .access = PL1_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 3698 .access = PL1_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 3700 .access = PL0_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 3702 .access = PL0_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 3704 .access = PL0_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 3706 .access = PL1_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 4912 .type = ARM_CP_64BIT | ARM_CP_ALIAS, [all …]
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/dports/emulators/qemu60/qemu-6.0.0/target/arm/ |
H A D | cpu64.c | 72 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 78 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 84 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 90 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 },
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H A D | gdbstub.c | 158 if (ri->type & ARM_CP_64BIT) { in arm_register_sysreg_for_xml()
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/dports/emulators/qemu5/qemu-5.2.0/target/arm/ |
H A D | cpu64.c | 67 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 73 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 79 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 85 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 },
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H A D | gdbstub.c | 158 if (ri->type & ARM_CP_64BIT) { in arm_register_sysreg_for_xml()
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H A D | helper.c | 3253 .type = ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, 3262 .type = ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, 3278 .type = ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, 4214 .access = PL1_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 4216 .access = PL1_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 4218 .access = PL0_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 4220 .access = PL0_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 4307 .type = ARM_CP_64BIT | ARM_CP_ALIAS, 4313 .type = ARM_CP_64BIT | ARM_CP_ALIAS, 5534 .type = ARM_CP_64BIT | ARM_CP_ALIAS, [all …]
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/arm/ |
H A D | cpu64.c | 77 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 83 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 89 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 95 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 },
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H A D | gdbstub.c | 144 if (ri->type & ARM_CP_64BIT) { in arm_register_sysreg_for_xml()
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H A D | helper.c | 3300 .type = ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, 3309 .type = ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, 3325 .type = ARM_CP_64BIT | ARM_CP_IO | ARM_CP_ALIAS, 4245 .access = PL1_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 4247 .access = PL1_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 4249 .access = PL0_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 4251 .access = PL0_W, .type = ARM_CP_NOP|ARM_CP_64BIT }, 4338 .type = ARM_CP_64BIT | ARM_CP_ALIAS, 4344 .type = ARM_CP_64BIT | ARM_CP_ALIAS, 5570 .type = ARM_CP_64BIT | ARM_CP_ALIAS, [all …]
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/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/arm/ |
H A D | cpu64.c | 77 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 83 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 89 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 95 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 },
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H A D | gdbstub.c | 145 if (ri->type & ARM_CP_64BIT) { in arm_register_sysreg_for_xml()
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/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/arm/ |
H A D | cpu64.c | 72 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 78 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 84 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 90 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 },
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H A D | gdbstub.c | 162 if (ri->type & ARM_CP_64BIT) { in arm_register_sysreg_for_xml()
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/dports/emulators/qemu/qemu-6.2.0/target/arm/ |
H A D | cpu64.c | 72 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 78 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 84 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 }, 90 .access = PL1_RW, .type = ARM_CP_CONST | ARM_CP_64BIT, .resetvalue = 0 },
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