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Searched refs:DivRemOpc (Results 1 – 25 of 46) sorted by relevance

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/dports/security/clamav-lts/clamav-0.103.5/libclamav/c++/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp2939 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
2942 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
2943 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Tmp2, Tmp3).getValue(1); in ExpandNode()
2966 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
2969 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) in ExpandNode()
2970 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
/dports/devel/llvm90/llvm-9.0.1.src/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3212 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3215 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3217 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Tmp2, Tmp3).getValue(1); in ExpandNode()
3231 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3233 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3235 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
/dports/devel/llvm10/llvm-10.0.1.src/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3280 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3283 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3285 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Tmp2, Tmp3).getValue(1); in ExpandNode()
3299 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3301 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3303 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3280 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3283 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3285 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Tmp2, Tmp3).getValue(1); in ExpandNode()
3299 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3301 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3303 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3280 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3283 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3285 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Tmp2, Tmp3).getValue(1); in ExpandNode()
3299 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3301 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3303 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
/dports/devel/llvm80/llvm-8.0.1.src/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3157 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3160 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3162 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Tmp2, Tmp3).getValue(1); in ExpandNode()
3176 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3178 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3180 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
H A DDAGCombiner.cpp3104 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in useDivRem() local
3111 if (!TLI.isTypeLegal(VT) && !TLI.isOperationCustom(DivRemOpc, VT)) in useDivRem()
3116 if (!TLI.isOperationLegalOrCustom(DivRemOpc, VT) && in useDivRem()
3145 if ((UserOpc == Opcode || UserOpc == OtherOpcode || UserOpc == DivRemOpc) && in useDivRem()
3151 combined = DAG.getNode(DivRemOpc, SDLoc(Node), VTs, Op0, Op1); in useDivRem()
3152 } else if (UserOpc == DivRemOpc) { in useDivRem()
/dports/devel/llvm70/llvm-7.0.1.src/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3343 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3346 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3348 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Tmp2, Tmp3).getValue(1); in ExpandNode()
3362 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3364 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3366 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
H A DDAGCombiner.cpp3009 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in useDivRem() local
3016 if (!TLI.isTypeLegal(VT) && !TLI.isOperationCustom(DivRemOpc, VT)) in useDivRem()
3021 if (!TLI.isOperationLegalOrCustom(DivRemOpc, VT) && in useDivRem()
3050 if ((UserOpc == Opcode || UserOpc == OtherOpcode || UserOpc == DivRemOpc) && in useDivRem()
3056 combined = DAG.getNode(DivRemOpc, SDLoc(Node), VTs, Op0, Op1); in useDivRem()
3057 } else if (UserOpc == DivRemOpc) { in useDivRem()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3422 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3424 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3426 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
H A DTargetLowering.cpp8090 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in expandREM() local
8093 if (isOperationLegalOrCustom(DivRemOpc, VT)) { in expandREM()
8095 Result = DAG.getNode(DivRemOpc, dl, VTs, Dividend, Divisor).getValue(1); in expandREM()
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3404 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3406 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3408 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
H A DTargetLowering.cpp7972 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in expandREM() local
7975 if (isOperationLegalOrCustom(DivRemOpc, VT)) { in expandREM()
7977 Result = DAG.getNode(DivRemOpc, dl, VTs, Dividend, Divisor).getValue(1); in expandREM()
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3247 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3249 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3251 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
/dports/graphics/llvm-mesa/llvm-13.0.1.src/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3247 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3249 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3251 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
/dports/devel/llvm11/llvm-11.0.1.src/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3358 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3360 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3362 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
H A DTargetLowering.cpp7893 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in expandREM() local
7896 if (isOperationLegalOrCustom(DivRemOpc, VT)) { in expandREM()
7898 Result = DAG.getNode(DivRemOpc, dl, VTs, Dividend, Divisor).getValue(1); in expandREM()
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3247 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3249 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3251 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3271 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3273 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3275 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3247 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3249 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3251 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3247 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3249 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3251 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3511 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3513 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3515 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
H A DTargetLowering.cpp8334 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in expandREM() local
8337 if (isOperationLegalOrCustom(DivRemOpc, VT)) { in expandREM()
8339 Result = DAG.getNode(DivRemOpc, dl, VTs, Dividend, Divisor).getValue(1); in expandREM()
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/lib/CodeGen/SelectionDAG/
H A DLegalizeDAG.cpp3511 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in ExpandNode() local
3513 if (TLI.isOperationLegalOrCustom(DivRemOpc, VT)) { in ExpandNode()
3515 Tmp1 = DAG.getNode(DivRemOpc, dl, VTs, Node->getOperand(0), in ExpandNode()
H A DTargetLowering.cpp8334 unsigned DivRemOpc = isSigned ? ISD::SDIVREM : ISD::UDIVREM; in expandREM() local
8337 if (isOperationLegalOrCustom(DivRemOpc, VT)) { in expandREM()
8339 Result = DAG.getNode(DivRemOpc, dl, VTs, Dividend, Divisor).getValue(1); in expandREM()

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