| /dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/include/ |
| H A D | phb4-regs.h | 121 #define PHB_CTRLR_TVT_ADDR_SEL PPC_BITMASK(17,19) macro
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| /dports/emulators/qemu/qemu-6.2.0/include/hw/pci-host/ |
| H A D | pnv_phb4_regs.h | 234 #define PHB_CTRLR_TVT_ADDR_SEL PPC_BITMASK(17, 19) macro
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| /dports/emulators/qemu60/qemu-6.0.0/include/hw/pci-host/ |
| H A D | pnv_phb4_regs.h | 234 #define PHB_CTRLR_TVT_ADDR_SEL PPC_BITMASK(17, 19) macro
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| /dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/include/ |
| H A D | phb4-regs.h | 121 #define PHB_CTRLR_TVT_ADDR_SEL PPC_BITMASK(17,19) macro
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/include/ |
| H A D | phb4-regs.h | 137 #define PHB_CTRLR_TVT_ADDR_SEL PPC_BITMASK(17,19) macro
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/include/hw/pci-host/ |
| H A D | pnv_phb4_regs.h | 246 #define PHB_CTRLR_TVT_ADDR_SEL PPC_BITMASK(17,19) macro
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| /dports/emulators/qemu5/qemu-5.2.0/include/hw/pci-host/ |
| H A D | pnv_phb4_regs.h | 234 #define PHB_CTRLR_TVT_ADDR_SEL PPC_BITMASK(17, 19) macro
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/include/ |
| H A D | phb4-regs.h | 121 #define PHB_CTRLR_TVT_ADDR_SEL PPC_BITMASK(17,19) macro
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/include/hw/pci-host/ |
| H A D | pnv_phb4_regs.h | 234 #define PHB_CTRLR_TVT_ADDR_SEL PPC_BITMASK(17, 19) macro
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| /dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/include/hw/pci-host/ |
| H A D | pnv_phb4_regs.h | 234 #define PHB_CTRLR_TVT_ADDR_SEL PPC_BITMASK(17, 19) macro
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/include/ |
| H A D | phb4-regs.h | 121 #define PHB_CTRLR_TVT_ADDR_SEL PPC_BITMASK(17,19) macro
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| /dports/emulators/qemu/qemu-6.2.0/roms/skiboot/include/ |
| H A D | phb4-regs.h | 113 #define PHB_CTRLR_TVT_ADDR_SEL PPC_BITMASK(17,19) macro
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| /dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/include/hw/pci-host/ |
| H A D | pnv_phb4_regs.h | 234 #define PHB_CTRLR_TVT_ADDR_SEL PPC_BITMASK(17, 19) macro
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| /dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/include/ |
| H A D | phb4-regs.h | 121 #define PHB_CTRLR_TVT_ADDR_SEL PPC_BITMASK(17,19) macro
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| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/skiboot/hw/ |
| H A D | phb4.c | 4410 val |= SETFIELD(PHB_CTRLR_TVT_ADDR_SEL, 0ull, TVT_DD1_2_PER_PE); in phb4_init_hw()
4412 val |= SETFIELD(PHB_CTRLR_TVT_ADDR_SEL, 0ull, TVT_2_PER_PE); in phb4_init_hw()
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| /dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/hw/ |
| H A D | phb4.c | 5196 val |= SETFIELD(PHB_CTRLR_TVT_ADDR_SEL, 0ull, TVT_2_PER_PE); in phb4_init_hw()
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| /dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/hw/ |
| H A D | phb4.c | 5196 val |= SETFIELD(PHB_CTRLR_TVT_ADDR_SEL, 0ull, TVT_2_PER_PE); in phb4_init_hw()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/hw/ |
| H A D | phb4.c | 5196 val |= SETFIELD(PHB_CTRLR_TVT_ADDR_SEL, 0ull, TVT_2_PER_PE); in phb4_init_hw()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/hw/ |
| H A D | phb4.c | 5196 val |= SETFIELD(PHB_CTRLR_TVT_ADDR_SEL, 0ull, TVT_2_PER_PE); in phb4_init_hw()
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| /dports/emulators/qemu/qemu-6.2.0/roms/skiboot/hw/ |
| H A D | phb4.c | 5544 val |= SETFIELD(PHB_CTRLR_TVT_ADDR_SEL, 0ull, TVT_2_PER_PE); in phb4_init_hw()
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| /dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/hw/ |
| H A D | phb4.c | 5196 val |= SETFIELD(PHB_CTRLR_TVT_ADDR_SEL, 0ull, TVT_2_PER_PE); in phb4_init_hw()
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