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Searched refs:PLL_DCU (Results 1 – 16 of 16) sorted by relevance

/dports/devel/asl/asl-current/include/avr/
H A Dtr24.inc236 PLL_DCU sfr 0x15b ; Transceiver Delay Cell Calibration Control Register
237 PLL_DCU_START avrbit PLL_DCU,7 ; Start Delay Cell Calibration
238 PLL_DCUW5 avrbit PLL_DCU,5 ; Delay Range Setting
239 PLL_DCUW4 avrbit PLL_DCU,4
240 PLL_DCUW3 avrbit PLL_DCU,3
241 PLL_DCUW2 avrbit PLL_DCU,2
242 PLL_DCUW1 avrbit PLL_DCU,1
243 PLL_DCUW0 avrbit PLL_DCU,0
/dports/lang/fpc-source/fpc-3.2.2/rtl/embedded/avr/
H A Datmega128rfa1.pp198 PLL_DCU : byte absolute $00+$15B; // Transceiver Delay Cell Calibration Control Register
655 // PLL_DCU
/dports/lang/fpc/fpc-3.2.2/rtl/embedded/avr/
H A Datmega128rfa1.pp198 PLL_DCU : byte absolute $00+$15B; // Transceiver Delay Cell Calibration Control Register
655 // PLL_DCU
/dports/lang/fpc-utils/fpc-3.2.2/rtl/embedded/avr/
H A Datmega128rfa1.pp198 PLL_DCU : byte absolute $00+$15B; // Transceiver Delay Cell Calibration Control Register
655 // PLL_DCU
/dports/editors/fpc-ide/fpc-3.2.2/rtl/embedded/avr/
H A Datmega128rfa1.pp198 PLL_DCU : byte absolute $00+$15B; // Transceiver Delay Cell Calibration Control Register
655 // PLL_DCU
/dports/devel/avr-libc/avr-libc-2.0.0/include/avr/
H A Diom128rfa1.h4448 #define PLL_DCU _SFR_MEM8(0x15B) macro
H A Diom1284rfr2.h5270 #define PLL_DCU _SFR_MEM8(0x15B) macro
H A Diom644rfr2.h5252 #define PLL_DCU _SFR_MEM8(0x15B) macro
H A Diom2564rfr2.h5278 #define PLL_DCU _SFR_MEM8(0x15B) macro
H A Diom64rfr2.h5282 #define PLL_DCU _SFR_MEM8(0x15B) macro
H A Diom256rfr2.h5308 #define PLL_DCU _SFR_MEM8(0x15B) macro
H A Diom128rfr2.h5300 #define PLL_DCU _SFR_MEM8(0x15B) macro
/dports/devel/avr-libc/avr-libc-2.0.0/crt1/iosym/
H A Datmega128rfa1.S7020 ;; DIE #134: variable PLL_DCU
H A Datmega128rfr2.S8292 ;; DIE #158: variable PLL_DCU
H A Datmega256rfr2.S8292 ;; DIE #158: variable PLL_DCU
H A Datmega64rfr2.S8292 ;; DIE #158: variable PLL_DCU