/dports/devel/asl/asl-current/include/avr/ |
H A D | tr24.inc | 38 TRX_STATE sfr 0x142 ; Transceiver State Control Register 39 TRAC_STATUS2 avrbit TRX_STATE,7 ; Transaction Status 40 TRAC_STATUS1 avrbit TRX_STATE,6 41 TRAC_STATUS0 avrbit TRX_STATE,5 42 TRX_CMD4 avrbit TRX_STATE,4 ; State Control Command 43 TRX_CMD3 avrbit TRX_STATE,3 44 TRX_CMD2 avrbit TRX_STATE,2 45 TRX_CMD1 avrbit TRX_STATE,1 46 TRX_CMD0 avrbit TRX_STATE,0
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/dports/databases/percona56-server/percona-server-5.6.51-91.0/mysql-test/suite/innodb/t/ |
H A D | percona_log_slow_innodb.test | 84 WHERE TRX_STATE="LOCK WAIT";
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/dports/databases/percona56-client/percona-server-5.6.51-91.0/mysql-test/suite/innodb/t/ |
H A D | percona_log_slow_innodb.test | 84 WHERE TRX_STATE="LOCK WAIT";
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/dports/databases/percona-pam-for-mysql/percona-server-5.6.51-91.0/mysql-test/suite/innodb/t/ |
H A D | percona_log_slow_innodb.test | 84 WHERE TRX_STATE="LOCK WAIT";
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/dports/databases/percona57-pam-for-mysql/percona-server-5.7.36-39/mysql-test/suite/innodb/t/ |
H A D | percona_log_slow_innodb.test | 86 WHERE TRX_STATE="LOCK WAIT";
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/dports/databases/percona57-server/percona-server-5.7.36-39/mysql-test/suite/innodb/t/ |
H A D | percona_log_slow_innodb.test | 86 WHERE TRX_STATE="LOCK WAIT";
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/dports/databases/percona57-client/percona-server-5.7.36-39/mysql-test/suite/innodb/t/ |
H A D | percona_log_slow_innodb.test | 86 WHERE TRX_STATE="LOCK WAIT";
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/dports/lang/fpc-source/fpc-3.2.2/rtl/embedded/avr/ |
H A D | atmega128rfa1.pp | 177 TRX_STATE : byte absolute $00+$142; // Transceiver State Control Register 575 // TRX_STATE
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/dports/lang/fpc/fpc-3.2.2/rtl/embedded/avr/ |
H A D | atmega128rfa1.pp | 177 TRX_STATE : byte absolute $00+$142; // Transceiver State Control Register 575 // TRX_STATE
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/dports/lang/fpc-utils/fpc-3.2.2/rtl/embedded/avr/ |
H A D | atmega128rfa1.pp | 177 TRX_STATE : byte absolute $00+$142; // Transceiver State Control Register 575 // TRX_STATE
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/dports/editors/fpc-ide/fpc-3.2.2/rtl/embedded/avr/ |
H A D | atmega128rfa1.pp | 177 TRX_STATE : byte absolute $00+$142; // Transceiver State Control Register 575 // TRX_STATE
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/dports/devel/avr-libc/avr-libc-2.0.0/include/avr/ |
H A D | iom128rfa1.h | 3835 #define TRX_STATE _SFR_MEM8(0x142) macro
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H A D | iom1284rfr2.h | 4596 #define TRX_STATE _SFR_MEM8(0x142) macro
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H A D | iom644rfr2.h | 4578 #define TRX_STATE _SFR_MEM8(0x142) macro
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H A D | iom2564rfr2.h | 4604 #define TRX_STATE _SFR_MEM8(0x142) macro
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H A D | iom64rfr2.h | 4588 #define TRX_STATE _SFR_MEM8(0x142) macro
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H A D | iom256rfr2.h | 4614 #define TRX_STATE _SFR_MEM8(0x142) macro
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H A D | iom128rfr2.h | 4606 #define TRX_STATE _SFR_MEM8(0x142) macro
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/dports/devel/avr-libc/avr-libc-2.0.0/crt1/iosym/ |
H A D | atmega128rfa1.S | 5907 ;; DIE #113: variable TRX_STATE
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H A D | atmega128rfr2.S | 6914 ;; DIE #132: variable TRX_STATE
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H A D | atmega256rfr2.S | 6914 ;; DIE #132: variable TRX_STATE
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H A D | atmega64rfr2.S | 6914 ;; DIE #132: variable TRX_STATE
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