Home
last modified time | relevance | path

Searched refs:v_mul_hi_u32 (Results 1 – 25 of 512) sorted by relevance

12345678910>>...21

/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Durem.i64.ll34 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4
37 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
38 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
42 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v8
43 ; CHECK-NEXT: v_mul_hi_u32 v8, v5, v8
63 ; CHECK-NEXT: v_mul_hi_u32 v10, v6, v4
67 ; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8
73 ; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6
92 ; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4
93 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
[all …]
H A Dsrem.i64.ll42 ; CHECK-NEXT: v_mul_hi_u32 v14, v9, v4
49 ; CHECK-NEXT: v_mul_hi_u32 v15, v4, v13
50 ; CHECK-NEXT: v_mul_hi_u32 v13, v8, v13
57 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v11
58 ; CHECK-NEXT: v_mul_hi_u32 v11, v8, v11
73 ; CHECK-NEXT: v_mul_hi_u32 v9, v9, v4
87 ; CHECK-NEXT: v_mul_hi_u32 v13, v4, v9
88 ; CHECK-NEXT: v_mul_hi_u32 v9, v12, v9
104 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
112 ; CHECK-NEXT: v_mul_hi_u32 v8, v1, v8
[all …]
H A Dudiv.i64.ll34 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4
37 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
38 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
42 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v8
43 ; CHECK-NEXT: v_mul_hi_u32 v8, v5, v8
63 ; CHECK-NEXT: v_mul_hi_u32 v10, v6, v4
67 ; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8
73 ; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6
92 ; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4
93 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
[all …]
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Durem.i64.ll36 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4
39 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
40 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
44 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v8
45 ; CHECK-NEXT: v_mul_hi_u32 v8, v5, v8
65 ; CHECK-NEXT: v_mul_hi_u32 v10, v6, v4
69 ; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8
75 ; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6
94 ; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4
95 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
[all …]
H A Dudiv.i64.ll36 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4
39 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
40 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
44 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v8
45 ; CHECK-NEXT: v_mul_hi_u32 v8, v5, v8
65 ; CHECK-NEXT: v_mul_hi_u32 v10, v6, v4
69 ; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8
75 ; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6
94 ; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4
95 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
[all …]
H A Dsrem.i64.ll44 ; CHECK-NEXT: v_mul_hi_u32 v14, v9, v4
51 ; CHECK-NEXT: v_mul_hi_u32 v15, v4, v13
52 ; CHECK-NEXT: v_mul_hi_u32 v13, v8, v13
59 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v11
60 ; CHECK-NEXT: v_mul_hi_u32 v11, v8, v11
75 ; CHECK-NEXT: v_mul_hi_u32 v9, v9, v4
89 ; CHECK-NEXT: v_mul_hi_u32 v13, v4, v9
90 ; CHECK-NEXT: v_mul_hi_u32 v9, v12, v9
106 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
114 ; CHECK-NEXT: v_mul_hi_u32 v8, v1, v8
[all …]
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/AMDGPU/GlobalISel/
H A Durem.i64.ll36 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4
39 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
40 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
44 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v8
45 ; CHECK-NEXT: v_mul_hi_u32 v8, v5, v8
65 ; CHECK-NEXT: v_mul_hi_u32 v10, v6, v4
69 ; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8
75 ; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6
94 ; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4
95 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
[all …]
H A Dudiv.i64.ll36 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4
39 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
40 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
44 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v8
45 ; CHECK-NEXT: v_mul_hi_u32 v8, v5, v8
65 ; CHECK-NEXT: v_mul_hi_u32 v10, v6, v4
69 ; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8
75 ; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6
94 ; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4
95 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
[all …]
H A Dsrem.i64.ll44 ; CHECK-NEXT: v_mul_hi_u32 v14, v9, v4
51 ; CHECK-NEXT: v_mul_hi_u32 v15, v4, v13
52 ; CHECK-NEXT: v_mul_hi_u32 v13, v8, v13
59 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v11
60 ; CHECK-NEXT: v_mul_hi_u32 v11, v8, v11
75 ; CHECK-NEXT: v_mul_hi_u32 v9, v9, v4
89 ; CHECK-NEXT: v_mul_hi_u32 v13, v4, v9
90 ; CHECK-NEXT: v_mul_hi_u32 v9, v12, v9
106 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
114 ; CHECK-NEXT: v_mul_hi_u32 v8, v1, v8
[all …]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Durem.i64.ll34 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4
37 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
38 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
42 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v8
43 ; CHECK-NEXT: v_mul_hi_u32 v8, v5, v8
63 ; CHECK-NEXT: v_mul_hi_u32 v10, v6, v4
67 ; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8
73 ; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6
92 ; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4
93 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
[all …]
H A Dudiv.i64.ll34 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4
37 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
38 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
42 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v8
43 ; CHECK-NEXT: v_mul_hi_u32 v8, v5, v8
63 ; CHECK-NEXT: v_mul_hi_u32 v10, v6, v4
67 ; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8
73 ; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6
92 ; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4
93 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
[all …]
H A Dsrem.i64.ll42 ; CHECK-NEXT: v_mul_hi_u32 v14, v9, v4
49 ; CHECK-NEXT: v_mul_hi_u32 v15, v4, v13
50 ; CHECK-NEXT: v_mul_hi_u32 v13, v8, v13
57 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v11
58 ; CHECK-NEXT: v_mul_hi_u32 v11, v8, v11
73 ; CHECK-NEXT: v_mul_hi_u32 v9, v9, v4
87 ; CHECK-NEXT: v_mul_hi_u32 v13, v4, v9
88 ; CHECK-NEXT: v_mul_hi_u32 v9, v12, v9
104 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
112 ; CHECK-NEXT: v_mul_hi_u32 v8, v1, v8
[all …]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Durem.i64.ll34 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4
37 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
38 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
42 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v8
43 ; CHECK-NEXT: v_mul_hi_u32 v8, v5, v8
63 ; CHECK-NEXT: v_mul_hi_u32 v10, v6, v4
67 ; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8
73 ; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6
92 ; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4
93 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
[all …]
H A Dsrem.i64.ll42 ; CHECK-NEXT: v_mul_hi_u32 v14, v9, v4
49 ; CHECK-NEXT: v_mul_hi_u32 v15, v4, v13
50 ; CHECK-NEXT: v_mul_hi_u32 v13, v8, v13
57 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v11
58 ; CHECK-NEXT: v_mul_hi_u32 v11, v8, v11
73 ; CHECK-NEXT: v_mul_hi_u32 v9, v9, v4
87 ; CHECK-NEXT: v_mul_hi_u32 v13, v4, v9
88 ; CHECK-NEXT: v_mul_hi_u32 v9, v12, v9
104 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
112 ; CHECK-NEXT: v_mul_hi_u32 v8, v1, v8
[all …]
H A Dudiv.i64.ll34 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4
37 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
38 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
42 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v8
43 ; CHECK-NEXT: v_mul_hi_u32 v8, v5, v8
63 ; CHECK-NEXT: v_mul_hi_u32 v10, v6, v4
67 ; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8
73 ; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6
92 ; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4
93 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
[all …]
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dudiv.i64.ll36 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v0
39 ; CHECK-NEXT: v_mul_hi_u32 v12, v0, v9
40 ; CHECK-NEXT: v_mul_hi_u32 v9, v1, v9
44 ; CHECK-NEXT: v_mul_hi_u32 v14, v0, v8
45 ; CHECK-NEXT: v_mul_hi_u32 v8, v1, v8
65 ; CHECK-NEXT: v_mul_hi_u32 v10, v6, v0
69 ; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8
75 ; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6
94 ; CHECK-NEXT: v_mul_hi_u32 v7, v4, v0
95 ; CHECK-NEXT: v_mul_hi_u32 v0, v5, v0
[all …]
H A Dsrem.i64.ll43 ; CHECK-NEXT: v_mul_hi_u32 v12, v7, v2
50 ; CHECK-NEXT: v_mul_hi_u32 v13, v2, v11
51 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v11
59 ; CHECK-NEXT: v_mul_hi_u32 v12, v2, v9
65 ; CHECK-NEXT: v_mul_hi_u32 v9, v6, v9
75 ; CHECK-NEXT: v_mul_hi_u32 v7, v7, v2
105 ; CHECK-NEXT: v_mul_hi_u32 v9, v4, v2
106 ; CHECK-NEXT: v_mul_hi_u32 v2, v5, v2
113 ; CHECK-NEXT: v_mul_hi_u32 v8, v4, v6
119 ; CHECK-NEXT: v_mul_hi_u32 v6, v5, v6
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dudiv.i64.ll34 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4
37 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
38 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
42 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v8
43 ; CHECK-NEXT: v_mul_hi_u32 v8, v5, v8
63 ; CHECK-NEXT: v_mul_hi_u32 v10, v6, v4
67 ; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8
73 ; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6
92 ; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4
93 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
[all …]
H A Dsrem.i64.ll43 ; CHECK-NEXT: v_mul_hi_u32 v12, v7, v4
49 ; CHECK-NEXT: v_mul_hi_u32 v13, v4, v11
57 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
58 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
73 ; CHECK-NEXT: v_mul_hi_u32 v7, v7, v4
76 ; CHECK-NEXT: v_mul_hi_u32 v9, v4, v12
103 ; CHECK-NEXT: v_mul_hi_u32 v9, v0, v4
104 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
111 ; CHECK-NEXT: v_mul_hi_u32 v8, v0, v5
112 ; CHECK-NEXT: v_mul_hi_u32 v5, v1, v5
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/CodeGen/AMDGPU/GlobalISel/
H A Dsrem.i64.ll43 ; CHECK-NEXT: v_mul_hi_u32 v12, v7, v4
49 ; CHECK-NEXT: v_mul_hi_u32 v13, v4, v11
57 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
58 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
73 ; CHECK-NEXT: v_mul_hi_u32 v7, v7, v4
76 ; CHECK-NEXT: v_mul_hi_u32 v9, v4, v12
103 ; CHECK-NEXT: v_mul_hi_u32 v9, v0, v4
104 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
111 ; CHECK-NEXT: v_mul_hi_u32 v8, v0, v5
112 ; CHECK-NEXT: v_mul_hi_u32 v5, v1, v5
[all …]
H A Dudiv.i64.ll34 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4
37 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
38 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
42 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v8
43 ; CHECK-NEXT: v_mul_hi_u32 v8, v5, v8
63 ; CHECK-NEXT: v_mul_hi_u32 v10, v6, v4
67 ; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8
73 ; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6
92 ; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4
93 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dsrem.i64.ll43 ; CHECK-NEXT: v_mul_hi_u32 v12, v7, v4
49 ; CHECK-NEXT: v_mul_hi_u32 v13, v4, v11
57 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
58 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
73 ; CHECK-NEXT: v_mul_hi_u32 v7, v7, v4
76 ; CHECK-NEXT: v_mul_hi_u32 v9, v4, v12
103 ; CHECK-NEXT: v_mul_hi_u32 v9, v0, v4
104 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
111 ; CHECK-NEXT: v_mul_hi_u32 v8, v0, v5
112 ; CHECK-NEXT: v_mul_hi_u32 v5, v1, v5
[all …]
H A Dudiv.i64.ll34 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4
37 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
38 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
42 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v8
43 ; CHECK-NEXT: v_mul_hi_u32 v8, v5, v8
63 ; CHECK-NEXT: v_mul_hi_u32 v10, v6, v4
67 ; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8
73 ; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6
92 ; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4
93 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/CodeGen/AMDGPU/GlobalISel/
H A Dudiv.i64.ll34 ; CHECK-NEXT: v_mul_hi_u32 v11, v6, v4
37 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
38 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
42 ; CHECK-NEXT: v_mul_hi_u32 v14, v4, v8
43 ; CHECK-NEXT: v_mul_hi_u32 v8, v5, v8
63 ; CHECK-NEXT: v_mul_hi_u32 v10, v6, v4
67 ; CHECK-NEXT: v_mul_hi_u32 v8, v9, v8
73 ; CHECK-NEXT: v_mul_hi_u32 v6, v9, v6
92 ; CHECK-NEXT: v_mul_hi_u32 v7, v0, v4
93 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
[all …]
H A Dsrem.i64.ll43 ; CHECK-NEXT: v_mul_hi_u32 v12, v7, v4
49 ; CHECK-NEXT: v_mul_hi_u32 v13, v4, v11
57 ; CHECK-NEXT: v_mul_hi_u32 v12, v4, v9
58 ; CHECK-NEXT: v_mul_hi_u32 v9, v5, v9
73 ; CHECK-NEXT: v_mul_hi_u32 v7, v7, v4
76 ; CHECK-NEXT: v_mul_hi_u32 v9, v4, v12
103 ; CHECK-NEXT: v_mul_hi_u32 v9, v0, v4
104 ; CHECK-NEXT: v_mul_hi_u32 v4, v1, v4
111 ; CHECK-NEXT: v_mul_hi_u32 v8, v0, v5
112 ; CHECK-NEXT: v_mul_hi_u32 v5, v1, v5
[all …]

12345678910>>...21