| /dragonfly/sys/dev/netif/ath/ath_hal/ar5212/ |
| H A D | ar5212_power.c | 61 __func__, scr, OS_REG_READ(ah, AR_PCICFG)); in ar5212SetPowerModeAwake()
69 val = OS_REG_READ(ah, AR_PCICFG); in ar5212SetPowerModeAwake()
177 return (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_SPWR_DN) != 0;
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| H A D | ar5212_misc.c | 189 bits = OS_REG_READ(ah, AR_PCICFG); in ar5212SetLedState()
207 OS_REG_WRITE(ah, AR_PCICFG, bits); in ar5212SetLedState()
694 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_SEL, 1); in ar5212SetupClock()
702 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0x2); in ar5212SetupClock()
708 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0x3); in ar5212SetupClock()
711 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0x0); in ar5212SetupClock()
712 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_SEL, 0); in ar5212SetupClock()
742 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_RATE_IND, 0); in ar5212RestoreClock()
743 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_SEL, 0); in ar5212RestoreClock()
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| H A D | ar5212_attach.c | 392 OS_REG_SET_BIT(ah, AR_PCICFG, AR_PCICFG_RETRYFIXEN); in ar5212Attach()
467 val = OS_REG_READ(ah, AR_PCICFG); in ar5212Attach()
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| H A D | ar5212reg.h | 235 #define AR_PCICFG 0x4010 /* PCI configuration register */ macro
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| H A D | ar5212_reset.c | 246 saveLedState = OS_REG_READ(ah, AR_PCICFG) & in ar5212Reset()
438 OS_REG_WRITE(ah, AR_PCICFG, OS_REG_READ(ah, AR_PCICFG) | saveLedState); in ar5212Reset()
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| /dragonfly/sys/dev/netif/ath/ath_hal/ar5210/ |
| H A D | ar5210_attach.c | 256 pcicfg = OS_REG_READ(ah, AR_PCICFG); in ar5210Attach()
257 OS_REG_WRITE(ah, AR_PCICFG, pcicfg | AR_PCICFG_EEPROMSEL); in ar5210Attach()
276 OS_REG_WRITE(ah, AR_PCICFG, pcicfg); /* disable EEPROM access */ in ar5210Attach()
289 OS_REG_WRITE(ah, AR_PCICFG, pcicfg); /* disable EEPROM access */ in ar5210Attach()
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| H A D | ar5210_misc.c | 251 val = OS_REG_READ(ah, AR_PCICFG); in ar5210SetLedState()
266 OS_REG_WRITE(ah, AR_PCICFG, val); in ar5210SetLedState()
640 pcicfg = OS_REG_READ(ah, AR_PCICFG); in ar5210GetDiagState()
641 OS_REG_WRITE(ah, AR_PCICFG, pcicfg | AR_PCICFG_EEPROMSEL); in ar5210GetDiagState()
643 OS_REG_WRITE(ah, AR_PCICFG, pcicfg); in ar5210GetDiagState()
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| H A D | ar5210_reset.c | 117 ledstate = OS_REG_READ(ah, AR_PCICFG) & in ar5210Reset()
133 OS_REG_WRITE(ah, AR_PCICFG, in ar5210Reset()
138 OS_REG_WRITE(ah, AR_PCICFG, in ar5210Reset()
143 OS_REG_WRITE(ah, AR_PCICFG, in ar5210Reset()
148 OS_REG_WRITE(ah, AR_PCICFG, in ar5210Reset()
154 OS_REG_WRITE(ah, AR_PCICFG, OS_REG_READ(ah, AR_PCICFG) | ledstate); in ar5210Reset()
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| H A D | ar5210_power.c | 60 val = OS_REG_READ(ah, AR_PCICFG); in ar5210SetPowerModeAwake()
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| H A D | ar5210reg.h | 57 #define AR_PCICFG 0x4010 /* PCI configuration */ macro
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| /dragonfly/sys/dev/netif/ath/ath_hal/ar5211/ |
| H A D | ar5211_power.c | 49 val = OS_REG_READ(ah, AR_PCICFG); in ar5211SetPowerModeAwake()
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| H A D | ar5211_misc.c | 299 OS_REG_WRITE(ah, AR_PCICFG, in ar5211SetLedState()
300 (OS_REG_READ(ah, AR_PCICFG) &~ in ar5211SetLedState()
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| H A D | ar5211reg.h | 226 #define AR_PCICFG 0x4010 /* PCI configuration register */ macro
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| H A D | ar5211_reset.c | 244 ledstate = OS_REG_READ(ah, AR_PCICFG) & in ar5211Reset()
383 OS_REG_WRITE(ah, AR_PCICFG, OS_REG_READ(ah, AR_PCICFG) | ledstate); in ar5211Reset()
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| H A D | ar5211_attach.c | 301 val = (OS_REG_READ(ah, AR_PCICFG) & AR_PCICFG_EEPROM_SIZE_M) >> in ar5211Attach()
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| /dragonfly/tools/tools/ath/common/ |
| H A D | dumpregs_5210.c | 67 DEFBASICfmt(AR_PCICFG, "PCICFG", AR_PCICFG_BITS),
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| H A D | dumpregs_5211.c | 226 DEFBASICfmt(AR_PCICFG, "PCICFG", AR_PCICFG_BITS),
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| H A D | dumpregs_5212.c | 256 DEFBASIC(AR_PCICFG, "PCICFG"),
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| H A D | dumpregs_5416.c | 261 DEFBASIC(AR_PCICFG, "PCICFG"),
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| /dragonfly/sys/dev/netif/ath/ath_hal/ar5312/ |
| H A D | ar5312_reset.c | 361 OS_REG_WRITE(ah, AR5312_PCICFG, OS_REG_READ(ah, AR_PCICFG) | saveLedState); in ar5312Reset()
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