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Searched refs:CP_INT_CNTL (Results 1 – 11 of 11) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/inc/
H A Dsmu72_discrete.h499 uint32_t CP_INT_CNTL; member
H A Dsmu73_discrete.h495 uint32_t CP_INT_CNTL; member
H A Dsmu74_discrete.h489 uint32_t CP_INT_CNTL; member
H A Dsmu75_discrete.h501 uint32_t CP_INT_CNTL; member
/dragonfly/sys/dev/drm/radeon/
H A Dnid.h494 #define CP_INT_CNTL 0xC124 macro
H A Devergreend.h1246 #define CP_INT_CNTL 0xc124 macro
H A Dni.c1405 WREG32(CP_INT_CNTL, cp_int_cntl); in cayman_cp_int_cntl_setup()
H A Dr600d.h714 #define CP_INT_CNTL 0xc124 macro
H A Dr600.c3636 WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in r600_disable_interrupt_state()
3887 WREG32(CP_INT_CNTL, cp_int_cntl); in r600_irq_set()
H A Devergreen.c4452 WREG32(CP_INT_CNTL, CNTX_BUSY_INT_ENABLE | CNTX_EMPTY_INT_ENABLE); in evergreen_disable_interrupt_state()
4547 WREG32(CP_INT_CNTL, cp_int_cntl); in evergreen_irq_set()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dgfx_v8_0.c6887 WREG32_FIELD(CP_INT_CNTL, CP_ECC_ERROR_INT_ENABLE, enable_flag); in gfx_v8_0_set_cp_ecc_int_state()