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Searched refs:MAX_RATE_POWER (Results 1 – 13 of 13) sorted by relevance

/dragonfly/sys/dev/netif/ath/ath_hal/ar5212/
H A Dar5212_reset.c2012 { 0, 3, 6, 9, MAX_RATE_POWER }; in ar5212SetTransmitPower()
2025 if (powerLimit >= MAX_RATE_POWER || powerLimit == 0) in ar5212SetTransmitPower()
2142 uint16_t twiceMaxEdgePower = MAX_RATE_POWER; in ar5212SetRateTable()
2143 uint16_t twiceMaxEdgePowerCck = MAX_RATE_POWER; in ar5212SetRateTable()
2144 uint16_t twiceMaxRDPower = MAX_RATE_POWER; in ar5212SetRateTable()
2156 *pMaxPower = -MAX_RATE_POWER; in ar5212SetRateTable()
2157 *pMinPower = MAX_RATE_POWER; in ar5212SetRateTable()
2357 { 0, 3, 6, 9, MAX_RATE_POWER }; in ar5212GetChipPowerLimits()
2373 chan->ic_maxpower = MAX_RATE_POWER; in ar5212GetChipPowerLimits()
2382 if (powerLimit >= MAX_RATE_POWER || powerLimit == 0) in ar5212GetChipPowerLimits()
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H A Dar5212_attach.c251 AH_PRIVATE(ah)->ah_powerLimit = MAX_RATE_POWER; in ar5212InitState()
264 ahp->ah_macTPC = SM(MAX_RATE_POWER, AR_TPC_ACK) in ar5212InitState()
265 | SM(MAX_RATE_POWER, AR_TPC_CTS) in ar5212InitState()
266 | SM(MAX_RATE_POWER, AR_TPC_CHIRP); in ar5212InitState()
/dragonfly/tools/tools/ath/athrd/
H A Dathrd.c1012 { 0, 3, 6, 9, MAX_RATE_POWER }; in main()
1050 powerLimit = MAX_RATE_POWER; in main()
1368 twiceMaxEdgePower = MAX_RATE_POWER; in ar5212GetMaxEdgePower()
1485 *pMaxPower = -MAX_RATE_POWER; in setRateTable()
1486 *pMinPower = MAX_RATE_POWER; in setRateTable()
1494 twiceMaxEdgePower = MAX_RATE_POWER; in setRateTable()
1503 twiceMaxEdgePowerCck = MAX_RATE_POWER; in setRateTable()
/dragonfly/sys/dev/netif/ath/ath_hal/
H A Dah_eeprom.h161 #define MAX_RATE_POWER 63 macro
H A Dah_eeprom_v3.h158 #define MAX_RATE_POWER 63 macro
/dragonfly/sys/dev/netif/ath/ath_hal/ar5211/
H A Dar5211_attach.c237 AH_PRIVATE(ah)->ah_powerLimit = MAX_RATE_POWER; in ar5211Attach()
457 chan->ic_maxpower = MAX_RATE_POWER; in ar5211GetChipPowerLimits()
H A Dar5211_reset.c1303 AH_PRIVATE(ah)->ah_powerLimit = AH_MIN(limit, MAX_RATE_POWER); in ar5211SetTxPowerLimit()
1502 { 0, 3, 6, 9, MAX_RATE_POWER }; in ar5211SetRateTable()
/dragonfly/sys/dev/netif/ath/ath_hal/ar9002/
H A Dar9287_reset.c355 twiceMaxRegulatoryPower = AH_MIN(MAX_RATE_POWER, in ar9287SetTransmitPower()
H A Dar9285_reset.c100 twiceMaxRegulatoryPower = AH_MIN(MAX_RATE_POWER, AH_PRIVATE(ah)->ah_powerLimit); in ar9285SetTransmitPower()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5416/
H A Dar5416_reset.c908 AH_PRIVATE(ah)->ah_powerLimit = AH_MIN(limit, MAX_RATE_POWER); in ar5416SetTxPowerLimit()
1035 OS_REG_WRITE(ah, AR_PHY_POWER_TX_RATE_MAX, MAX_RATE_POWER | in ar5416WriteTxPowerRateRegisters()
1079 twiceMaxRegulatoryPower = AH_MIN(MAX_RATE_POWER, AH_PRIVATE(ah)->ah_powerLimit); in ar5416SetTransmitPower()
/dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_reset.c1292 AH_MIN(MAX_RATE_POWER, AH_PRIVATE(ah)->ah_powerLimit)) != HAL_OK) in ar9300_channel_change()
2716 ahpriv->ah_powerLimit = AH_MIN(limit, MAX_RATE_POWER); in ar9300_set_tx_power_limit()
2725 AH_MIN(MAX_RATE_POWER, ahpriv->ah_powerLimit)) != HAL_OK) in ar9300_set_tx_power_limit()
3150 AH_MIN(MAX_RATE_POWER, ahpriv->ah_powerLimit)); in ar9300_process_ini()
H A Dar9300_paprd.c525 AH_MIN(MAX_RATE_POWER, AH_PRIVATE(ah)->ah_powerLimit)) != HAL_OK) { in ar9300_enable_paprd()
H A Dar9300_attach.c2575 AH_PRIVATE(ah)->ah_powerLimit = MAX_RATE_POWER; in ar9300_new_state()