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Searched refs:OS_REG_RMW_FIELD (Results 1 – 25 of 47) sorted by relevance

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/dragonfly/sys/dev/netif/ath/ath_hal/ar9002/
H A Dar9285_cal.c81 OS_REG_RMW_FIELD(ah, AR9285_AN_TOP3, AR9285_AN_TOP3_PWDDAC, 1); in ar9285_hw_pa_cal()
83 OS_REG_RMW_FIELD(ah, AR9285_AN_RXTXBB1, AR9285_AN_RXTXBB1_PDV2I, 1); in ar9285_hw_pa_cal()
85 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G2, AR9285_AN_RF2G2_OFFCAL, 0); in ar9285_hw_pa_cal()
86 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G7, AR9285_AN_RF2G7_PWDDB, 0); in ar9285_hw_pa_cal()
87 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_ENPACAL, 0); in ar9285_hw_pa_cal()
88 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV1, 0); in ar9285_hw_pa_cal()
89 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPADRV2, 0); in ar9285_hw_pa_cal()
90 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G1, AR9285_AN_RF2G1_PDPAOUT, 0); in ar9285_hw_pa_cal()
94 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_CCOMP, 0xf); in ar9285_hw_pa_cal()
98 OS_REG_RMW_FIELD(ah, AR9285_AN_RF2G6, AR9285_AN_RF2G6_OFFS, 0); in ar9285_hw_pa_cal()
[all …]
H A Dar9287_reset.c506 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + regChainOffset, in ar9287SetBoardValues()
512 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset, in ar9287SetBoardValues()
515 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN + regChainOffset, in ar9287SetBoardValues()
521 OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, in ar9287SetBoardValues()
524 OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, in ar9287SetBoardValues()
527 OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, in ar9287SetBoardValues()
536 OS_REG_RMW_FIELD(ah, AR_PHY_RF_CTL3, in ar9287SetBoardValues()
539 OS_REG_RMW_FIELD(ah, AR_PHY_CCA, in ar9287SetBoardValues()
541 OS_REG_RMW_FIELD(ah, AR_PHY_EXT_CCA0, in ar9287SetBoardValues()
577 OS_REG_RMW_FIELD(ah, AR_PHY_RF_CTL2, in ar9287SetBoardValues()
[all …]
H A Dar9285_reset.c206 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ar9285SetBoardGain()
208 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ar9285SetBoardGain()
210 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ar9285SetBoardGain()
212 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ, in ar9285SetBoardGain()
216 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ar9285SetBoardGain()
219 OS_REG_RMW_FIELD(ah, AR_PHY_GAIN_2GHZ + 0x1000, in ar9285SetBoardGain()
228 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN, in ar9285SetBoardGain()
230 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN, in ar9285SetBoardGain()
233 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN + 0x1000, in ar9285SetBoardGain()
235 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN + 0x1000, in ar9285SetBoardGain()
[all …]
H A Dar9280_olc.c106 OS_REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL6_0, AR_PHY_TX_PWRCTRL_ERR_EST_MODE, 3); in ar9280olcGetPDADCs()
107 OS_REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL6_1, AR_PHY_TX_PWRCTRL_ERR_EST_MODE, 3); in ar9280olcGetPDADCs()
109 OS_REG_RMW_FIELD(ah, AR_PHY_TX_PWRCTRL7, AR_PHY_TX_PWRCTRL_INIT_TX_GAIN, initTxGain); in ar9280olcGetPDADCs()
165 OS_REG_RMW_FIELD(ah, in ar9280olcTemperatureCompensation()
H A Dar9287_olc.c93 OS_REG_RMW_FIELD(ah, AR_PHY_CH0_TX_PWRCTRL11, in ar9287olcTemperatureCompensation()
95 OS_REG_RMW_FIELD(ah, AR_PHY_CH1_TX_PWRCTRL11, in ar9287olcTemperatureCompensation()
/dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/
H A Dar9300_spectral.c124 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_FIRPWR, 0x7f); in ar9300_disable_weak_signal()
128 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_FIRSTEP, 0x3f); in ar9300_disable_weak_signal()
131 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, AR_PHY_FIND_SIG_RELPWR, 0x1f); in ar9300_disable_weak_signal()
144 OS_REG_RMW_FIELD( in ar9300_disable_weak_signal()
148 OS_REG_RMW_FIELD( in ar9300_disable_weak_signal()
169 OS_REG_RMW_FIELD(ah, AR_PHY_CCA_0, AR_PHY_CCA_THRESH62, thresh62); in ar9300_set_cca_threshold()
185 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING2, AR_PHY_TIMING2_DC_OFFSET, 0); in ar9300_disable_dc_offset()
190 OS_REG_RMW_FIELD(ah, AR_PHY_MODE, AR_PHY_MODE_DISABLE_CCK, 0); in ar9300_enable_cck_detect()
191 OS_REG_RMW_FIELD(ah, AR_PHY_MODE, AR_PHY_MODE_DYNAMIC, 1); in ar9300_enable_cck_detect()
519 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING2, AR_PHY_TIMING2_DC_OFFSET, in ar9300_stop_spectral_scan()
[all …]
H A Dar9300_reset.c1005 OS_REG_RMW_FIELD(ah, in ar9300_spur_mitigate_mrc_cck()
1008 OS_REG_RMW_FIELD(ah, in ar9300_spur_mitigate_mrc_cck()
1056 OS_REG_RMW_FIELD(ah, in ar9300_spur_mitigate_ofdm()
1058 OS_REG_RMW_FIELD(ah, in ar9300_spur_mitigate_ofdm()
1060 OS_REG_RMW_FIELD(ah, in ar9300_spur_mitigate_ofdm()
1064 OS_REG_RMW_FIELD(ah, in ar9300_spur_mitigate_ofdm()
1069 OS_REG_RMW_FIELD(ah, in ar9300_spur_mitigate_ofdm()
1071 OS_REG_RMW_FIELD(ah, in ar9300_spur_mitigate_ofdm()
1073 OS_REG_RMW_FIELD(ah, in ar9300_spur_mitigate_ofdm()
1075 OS_REG_RMW_FIELD(ah, in ar9300_spur_mitigate_ofdm()
[all …]
H A Dar9300_eeprom.c1897 OS_REG_RMW_FIELD(ah,
1905 OS_REG_RMW_FIELD(ah,
1983 OS_REG_RMW_FIELD(ah, in ar9300_attenuation_apply()
1988 OS_REG_RMW_FIELD(ah, in ar9300_attenuation_apply()
2370 OS_REG_RMW_FIELD(ah, in ar9300_power_control_override()
2375 OS_REG_RMW_FIELD(ah, in ar9300_power_control_override()
2380 OS_REG_RMW_FIELD(ah, in ar9300_power_control_override()
2386 OS_REG_RMW_FIELD(ah, in ar9300_power_control_override()
2391 OS_REG_RMW_FIELD(ah, in ar9300_power_control_override()
2417 OS_REG_RMW_FIELD(ah, in ar9300_power_control_override()
[all …]
H A Dar9300_mci.c78 OS_REG_RMW_FIELD(ah, AR_BTCOEX_CTRL, in ar9300_mci_osla_setup()
80 OS_REG_RMW_FIELD(ah, AR_BTCOEX_CTRL, in ar9300_mci_osla_setup()
88 OS_REG_RMW_FIELD(ah, AR_BTCOEX_CTRL, in ar9300_mci_osla_setup()
92 OS_REG_RMW_FIELD(ah, AR_BTCOEX_CTRL, in ar9300_mci_osla_setup()
107 OS_REG_RMW_FIELD(ah, AR_MCI_COMMAND2, in ar9300_mci_reset_req_wakeup()
110 OS_REG_RMW_FIELD(ah, AR_MCI_COMMAND2, in ar9300_mci_reset_req_wakeup()
540 OS_REG_RMW_FIELD(ah, AR_PHY_TEST_CTL_STATUS, in ar9300_mci_observation_set_up()
977 OS_REG_RMW_FIELD(ah, AR_BTCOEX_CTRL3, in ar9300_mci_reset()
1043 OS_REG_RMW_FIELD(ah, AR_BTCOEX_CTRL2, in ar9300_mci_reset()
1045 OS_REG_RMW_FIELD(ah, AR_BTCOEX_CTRL2, in ar9300_mci_reset()
[all …]
H A Dar9300_ani.c514 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar9300_ani_control()
516 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar9300_ani_control()
518 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, AR_PHY_SFCORR_M1_THRESH, in ar9300_ani_control()
520 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, AR_PHY_SFCORR_M2_THRESH, in ar9300_ani_control()
522 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, AR_PHY_SFCORR_M2COUNT_THR, in ar9300_ani_control()
524 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar9300_ani_control()
526 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, in ar9300_ani_control()
528 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_EXT, in ar9300_ani_control()
593 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG_LOW, in ar9300_ani_control()
682 OS_REG_RMW_FIELD(ah, AR_PHY_MRC_CCK_CTRL, in ar9300_ani_control()
[all …]
H A Dar9300_misc.c255 OS_REG_RMW_FIELD(ah, AR_CFG_LED, AR_CFG_LED_ASSOC_CTL, ledbits[state]); in ar9300_set_led_state()
267 OS_REG_RMW_FIELD(ah, AR_CFG_LED, AR_CFG_LED_POWER, val); in ar9300_set_power_led_state()
279 OS_REG_RMW_FIELD(ah, AR_CFG_LED, AR_CFG_LED_NETWORK, val); in ar9300_set_network_led_state()
596 OS_REG_RMW_FIELD(ah, in ar9300_set_ack_timeout()
2558 OS_REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 0); in ar9300_bt_coex_disable()
2594 OS_REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, 1); in ar9300_bt_coex_enable()
2596 OS_REG_RMW_FIELD(ah, AR_PCU_MISC, AR_PCU_BT_ANT_PREVENT_RX, 1); in ar9300_bt_coex_enable()
2653 OS_REG_RMW_FIELD(ah, in ar9300_init_bt_coex()
2657 OS_REG_RMW_FIELD(ah, in ar9300_init_bt_coex()
2690 OS_REG_RMW_FIELD(ah, in ar9300_init_bt_coex()
[all …]
H A Dar9300_interrupts.c745 OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, value);
748 OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_FIRST, value);
751 OS_REG_RMW_FIELD(ah, AR_TIMT, AR_TIMT_LAST, value);
754 OS_REG_RMW_FIELD(ah, AR_TIMT, AR_TIMT_FIRST, value);
/dragonfly/sys/dev/netif/ath/ath_hal/ar5416/
H A Dar5416_gpio.c219 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE, in ar5416GpioSetIntr()
224 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_MASK, in ar5416GpioSetIntr()
230 OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_ENABLE, in ar5416GpioSetIntr()
235 OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_MASK, in ar5416GpioSetIntr()
240 OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_CAUSE, in ar5416GpioSetIntr()
252 OS_REG_RMW_FIELD(ah, AR_GPIO_INTR_POL, in ar5416GpioSetIntr()
258 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_ENABLE, in ar5416GpioSetIntr()
263 OS_REG_RMW_FIELD(ah, AR_INTR_ASYNC_MASK, in ar5416GpioSetIntr()
269 OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_ENABLE, in ar5416GpioSetIntr()
274 OS_REG_RMW_FIELD(ah, AR_INTR_SYNC_MASK, in ar5416GpioSetIntr()
H A Dar5416_btcoex.c241 OS_REG_RMW_FIELD(ah, AR_QUIET1, AR_QUIET1_QUIET_ACK_CTS_ENABLE, in ar5416BTCoexDisable()
243 OS_REG_RMW_FIELD(ah, AR_MISC_MODE, AR_PCU_BT_ANT_PREVENT_RX, in ar5416BTCoexDisable()
287 OS_REG_RMW_FIELD(ah, AR_QUIET1, in ar5416BTCoexEnable()
290 OS_REG_RMW_FIELD(ah, AR_MISC_MODE, in ar5416BTCoexEnable()
293 OS_REG_RMW_FIELD(ah, AR_QUIET1, in ar5416BTCoexEnable()
296 OS_REG_RMW_FIELD(ah, AR_MISC_MODE, in ar5416BTCoexEnable()
345 OS_REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, in ar5416InitBTCoex()
348 OS_REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, in ar5416InitBTCoex()
383 OS_REG_RMW_FIELD(ah, AR_GPIO_INPUT_MUX1, in ar5416InitBTCoex()
H A Dar5416_ani.c237 OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, in ar5416AniControl()
239 OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, in ar5416AniControl()
241 OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, in ar5416AniControl()
243 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, in ar5416AniControl()
263 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar5416AniControl()
265 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar5416AniControl()
267 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, in ar5416AniControl()
269 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, in ar5416AniControl()
271 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, in ar5416AniControl()
323 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, in ar5416AniControl()
[all …]
H A Dar5416_reset.c345 OS_REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL, in ar5416Reset()
424 OS_REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 250);
876 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3, in ar5416SetDeltaSlope()
878 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3, in ar5416SetDeltaSlope()
890 OS_REG_RMW_FIELD(ah, AR_PHY_HALFGI, in ar5416SetDeltaSlope()
892 OS_REG_RMW_FIELD(ah, AR_PHY_HALFGI, in ar5416SetDeltaSlope()
1562 OS_REG_RMW_FIELD(ah, in ar5416SetDefGainValues()
1565 OS_REG_RMW_FIELD(ah, in ar5416SetDefGainValues()
1569 OS_REG_RMW_FIELD(ah, in ar5416SetDefGainValues()
1572 OS_REG_RMW_FIELD(ah, in ar5416SetDefGainValues()
[all …]
H A Dar5416_cal_iq.c122 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4_CHAIN(i), in ar5416IQCalibration()
124 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4_CHAIN(i), in ar5416IQCalibration()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5210/
H A Dar5210_power.c36 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_ALLOW); in ar5210SetPowerModeAuto()
56 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_WAKE); in ar5210SetPowerModeAwake()
64 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, in ar5210SetPowerModeAwake()
90 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP); in ar5210SetPowerModeSleep()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5211/
H A Dar5211_power.c45 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_WAKE); in ar5211SetPowerModeAwake()
53 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, in ar5211SetPowerModeAwake()
79 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP); in ar5211SetPowerModeSleep()
92 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_NORM); in ar5211SetPowerModeNetworkSleep()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5212/
H A Dar5212_ani.c247 OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, in ar5212AniControl()
249 OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, in ar5212AniControl()
251 OS_REG_RMW_FIELD(ah, AR_PHY_AGC_CTL1, in ar5212AniControl()
253 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, in ar5212AniControl()
272 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar5212AniControl()
274 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR_LOW, in ar5212AniControl()
276 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, in ar5212AniControl()
278 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, in ar5212AniControl()
280 OS_REG_RMW_FIELD(ah, AR_PHY_SFCORR, in ar5212AniControl()
319 OS_REG_RMW_FIELD(ah, AR_PHY_FIND_SIG, in ar5212AniControl()
[all …]
H A Dar5212_reset.c321 OS_REG_RMW_FIELD(ah, AR_PHY_FRAME_CTL, in ar5212Reset()
358 OS_REG_RMW_FIELD(ah, AR_PHY_DAG_CTRLCCK, in ar5212Reset()
372 OS_REG_RMW_FIELD(ah, AR_D_FPCTL, ... ); in ar5212Reset()
473 OS_REG_RMW_FIELD(ah, AR_PHY_TX_CTL, in ar5212Reset()
1677 OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, in ar5212SetBoardValues()
1679 OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, in ar5212SetBoardValues()
1681 OS_REG_RMW_FIELD(ah, AR_PHY_DESIRED_SZ, in ar5212SetBoardValues()
1683 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN, in ar5212SetBoardValues()
1973 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3, in ar5212SetDeltaSlope()
1975 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING3, in ar5212SetDeltaSlope()
[all …]
H A Dar5212_misc.c509 OS_REG_RMW_FIELD(ah, AR_TIME_OUT, in ar5212SetAckTimeout()
556 OS_REG_RMW_FIELD(ah, AR_TIME_OUT, in ar5212SetCTSTimeout()
692 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, 1); in ar5212SetupClock()
694 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_SEL, 1); in ar5212SetupClock()
712 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_SEL, 0); in ar5212SetupClock()
729 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, in ar5212SetupClock()
743 OS_REG_RMW_FIELD(ah, AR_PCICFG, AR_PCICFG_SCLK_SEL, 0); in ar5212RestoreClock()
746 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, in ar5212RestoreClock()
1232 OS_REG_RMW_FIELD(ah, AR_PHY_RADAR_2, in ar5212EnableDfs()
1236 OS_REG_RMW_FIELD(ah, AR_PHY_RADAR_2, in ar5212EnableDfs()
[all …]
H A Dar5212_power.c99 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_SLP); in ar5212SetPowerModeSleep()
112 OS_REG_RMW_FIELD(ah, AR_SCR, AR_SCR_SLE, AR_SCR_SLE_NORM); in ar5212SetPowerModeNetworkSleep()
/dragonfly/sys/dev/netif/ath/ath_hal/ar5312/
H A Dar5312_misc.c114 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, 1); in ar5312SetupClock()
119 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, in ar5312SetupClock()
147 OS_REG_RMW_FIELD(ah, AR_USEC, AR_USEC_USEC32, in ar5312RestoreClock()
H A Dar5312_reset.c266 OS_REG_RMW_FIELD(ah, AR_PHY_DAG_CTRLCCK, in ar5312Reset()
280 OS_REG_RMW_FIELD(ah, AR_D_FPCTL, ... ); in ar5312Reset()
295 OS_REG_RMW_FIELD(ah, AR_PHY_RXGAIN, AR_PHY_RXGAIN_TXRX_RF_MAX, 0x0F); in ar5312Reset()
299 OS_REG_RMW_FIELD(ah, AR_PHY_CCK_RXCTRL4, AR_PHY_CCK_RXCTRL4_FREQ_EST_SHORT, 12); in ar5312Reset()
306 OS_REG_RMW_FIELD(ah, AR_PHY_SETTLING, AR_PHY_SETTLING_AGC, 32); in ar5312Reset()
391 OS_REG_RMW_FIELD(ah, AR_PHY_TX_CTL, in ar5312Reset()
467 OS_REG_RMW_FIELD(ah, AR_PHY_TIMING_CTRL4, in ar5312Reset()

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