Searched refs:PACKET3_PREAMBLE_END_CLEAR_STATE (Results 1 – 13 of 13) sorted by relevance
209 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
271 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
389 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
803 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v9_0_get_csb_buffer()2431 amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v9_0_cp_gfx_start()
1298 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v8_0_get_csb_buffer()4421 amdgpu_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in gfx_v8_0_cp_gfx_start()
1263 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
1777 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
1855 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
1658 # define PACKET3_PREAMBLE_END_CLEAR_STATE (3 << 28) macro
1594 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in cayman_cp_start()
3589 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in si_cp_start()5755 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE); in si_get_csb_buffer()
4047 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in cik_cp_gfx_start()6806 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE); in cik_get_csb_buffer()
3016 radeon_ring_write(ring, PACKET3_PREAMBLE_END_CLEAR_STATE); in evergreen_cp_start()