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Searched refs:VMID (Results 1 – 14 of 14) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dvid.h74 #define VMID(x) ((x) << 4) macro
H A Dcikd.h61 #define VMID(x) ((x) << 4) macro
H A Dgmc_v7_0.c761 u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID); in gmc_v7_0_vm_decode_fault()
1310 VMID); in gmc_v7_0_process_interrupt()
H A Dgmc_v8_0.c1005 u32 vmid = REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID); in gmc_v8_0_vm_decode_fault()
1494 VMID); in gmc_v8_0_process_interrupt()
H A Damdgpu_amdkfd_gfx_v8.c198 uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue); in lock_srbm()
H A Dsoc15.c223 grbm_gfx_cntl = REG_SET_FIELD(grbm_gfx_cntl, GRBM_GFX_CNTL, VMID, vmid); in soc15_grbm_select()
H A Dvi.c364 srbm_gfx_cntl = REG_SET_FIELD(srbm_gfx_cntl, SRBM_GFX_CNTL, VMID, vmid); in vi_srbm_select()
H A Dgfx_v9_0.c2557 tmp = REG_SET_FIELD(tmp, CP_CPC_IC_BASE_CNTL, VMID, 0); in gfx_v9_0_cp_compute_load_microcode()
2751 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); in gfx_v9_0_mqd_init()
H A Dgfx_v8_0.c4754 tmp = REG_SET_FIELD(tmp, CP_MQD_CONTROL, VMID, 0); in gfx_v8_0_mqd_init()
/dragonfly/sys/dev/drm/radeon/
H A Dcik_sdma.c962 radeon_ring_write(ring, VMID(vm_id)); in cik_dma_vm_flush()
982 radeon_ring_write(ring, VMID(0)); in cik_dma_vm_flush()
H A Dnid.h61 #define VMID(x) (((x) & 0x7) << 0) macro
H A Dcikd.h447 #define VMID(x) ((x) << 4) macro
H A Dcik.c1844 VMID(vmid & 0xf) | in cik_srbm_select()
5737 radeon_ring_write(ring, VMID(vm_id)); in cik_vm_flush()
5755 radeon_ring_write(ring, VMID(0)); in cik_vm_flush()
/dragonfly/sys/dev/drm/amd/powerplay/smumgr/
H A Dsmu8_smumgr.c201 tmp = PHM_SET_FIELD(tmp, CP_CPC_IC_BASE_CNTL, VMID, 0); in smu8_load_mec_firmware()