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Searched refs:VceBootLevel (Results 1 – 17 of 17) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/inc/
H A Dsmumgr.h48 VceBootLevel, enumerator
H A Dsmu7_fusion.h241 uint8_t VceBootLevel; member
H A Dsmu7_discrete.h338 uint8_t VceBootLevel; member
H A Dsmu72_discrete.h280 uint8_t VceBootLevel; member
H A Dsmu73_discrete.h264 uint8_t VceBootLevel; member
H A Dsmu74_discrete.h298 uint8_t VceBootLevel; member
H A Dsmu75_discrete.h304 uint8_t VceBootLevel; member
/dragonfly/sys/dev/drm/amd/powerplay/smumgr/
H A Dvegam_smumgr.c373 smu_data->smc_state_table.VceBootLevel = in vegam_update_vce_smc_table()
376 smu_data->smc_state_table.VceBootLevel = 0; in vegam_update_vce_smc_table()
379 offsetof(SMU75_Discrete_DpmTable, VceBootLevel); in vegam_update_vce_smc_table()
385 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in vegam_update_vce_smc_table()
392 (uint32_t)1 << smu_data->smc_state_table.VceBootLevel); in vegam_update_vce_smc_table()
1219 table->VceBootLevel = 0; in vegam_populate_smc_vce_level()
2194 case VceBootLevel: in vegam_get_offsetof()
2195 return offsetof(SMU75_Discrete_DpmTable, VceBootLevel); in vegam_get_offsetof()
H A Dfiji_smumgr.c1443 table->VceBootLevel = 0; in fiji_populate_smc_vce_level()
2338 case VceBootLevel: in fiji_get_offsetof()
2339 return offsetof(SMU73_Discrete_DpmTable, VceBootLevel); in fiji_get_offsetof()
2416 smu_data->smc_state_table.VceBootLevel = in fiji_update_vce_smc_table()
2419 smu_data->smc_state_table.VceBootLevel = 0; in fiji_update_vce_smc_table()
2422 offsetof(SMU73_Discrete_DpmTable, VceBootLevel); in fiji_update_vce_smc_table()
2428 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in fiji_update_vce_smc_table()
2435 (uint32_t)1 << smu_data->smc_state_table.VceBootLevel); in fiji_update_vce_smc_table()
H A Dpolaris10_smumgr.c1298 table->VceBootLevel = 0; in polaris10_populate_smc_vce_level()
2163 smu_data->smc_state_table.VceBootLevel = in polaris10_update_vce_smc_table()
2166 smu_data->smc_state_table.VceBootLevel = 0; in polaris10_update_vce_smc_table()
2169 offsetof(SMU74_Discrete_DpmTable, VceBootLevel); in polaris10_update_vce_smc_table()
2175 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in polaris10_update_vce_smc_table()
2182 (uint32_t)1 << smu_data->smc_state_table.VceBootLevel); in polaris10_update_vce_smc_table()
2288 case VceBootLevel: in polaris10_get_offsetof()
2289 return offsetof(SMU74_Discrete_DpmTable, VceBootLevel); in polaris10_get_offsetof()
H A Dtonga_smumgr.c1371 table->VceBootLevel = 0; in tonga_populate_smc_vce_level()
2627 case VceBootLevel: in tonga_get_offsetof()
2628 return offsetof(SMU72_Discrete_DpmTable, VceBootLevel); in tonga_get_offsetof()
2706 smu_data->smc_state_table.VceBootLevel = in tonga_update_vce_smc_table()
2710 offsetof(SMU72_Discrete_DpmTable, VceBootLevel); in tonga_update_vce_smc_table()
2716 mm_boot_level_value |= smu_data->smc_state_table.VceBootLevel << 16; in tonga_update_vce_smc_table()
2724 (uint32_t)1 << smu_data->smc_state_table.VceBootLevel); in tonga_update_vce_smc_table()
H A Dci_smumgr.c1566 table->VceBootLevel = 0; in ci_populate_smc_vce_level()
2010 table->VceBootLevel = 0; in ci_init_smc_table()
2904 VceBootLevel, 0); /* temp hard code to level 0, vce can set min evclk*/ in ci_update_vce_smc_table()
/dragonfly/sys/dev/drm/radeon/
H A Dsmu7_fusion.h241 uint8_t VceBootLevel; member
H A Dsmu7_discrete.h337 uint8_t VceBootLevel; member
H A Dcikd.h48 # define VceBootLevel(x) ((x) << 16) macro
H A Dci_dpm.c3657 table->VceBootLevel = 0; in ci_init_smc_table()
4158 pi->smc_state_table.VceBootLevel = ci_get_vce_boot_level(rdev); in ci_update_vce_dpm()
4161 tmp |= VceBootLevel(pi->smc_state_table.VceBootLevel); in ci_update_vce_dpm()
H A Dkv_dpm.c1490 offsetof(SMU7_Fusion_DpmTable, VceBootLevel), in kv_update_vce_dpm()