/dragonfly/sys/dev/drm/radeon/ |
H A D | radeon_gart.c | 84 rdev->gart.ptr = ptr; in radeon_gart_table_ram_alloc() 85 memset((void *)rdev->gart.ptr, 0, rdev->gart.table_size); in radeon_gart_table_ram_alloc() 113 rdev->gart.ptr = NULL; in radeon_gart_table_ram_free() 166 r = radeon_bo_kmap(rdev->gart.robj, &rdev->gart.ptr); in radeon_gart_table_vram_pin() 207 rdev->gart.ptr = NULL; in radeon_gart_table_vram_unpin() 266 if (rdev->gart.ptr) { in radeon_gart_unbind() 308 if (rdev->gart.ptr) { in radeon_gart_bind() 314 if (rdev->gart.ptr) { in radeon_gart_bind() 333 if (rdev->gart.pages) { in radeon_gart_init() 348 rdev->gart.num_cpu_pages, rdev->gart.num_gpu_pages); in radeon_gart_init() [all …]
|
H A D | rs400.c | 78 if (rdev->gart.ptr) { in rs400_gart_init() 101 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; in rs400_gart_init() 159 tmp = (u32)rdev->gart.table_addr & 0xfffff000; in rs400_gart_enable() 160 tmp |= (upper_32_bits(rdev->gart.table_addr) & 0xff) << 4; in rs400_gart_enable() 187 (unsigned long long)rdev->gart.table_addr); in rs400_gart_enable() 188 rdev->gart.ready = true; in rs400_gart_enable() 231 u32 *gtt = rdev->gart.ptr; in rs400_gart_set_page()
|
H A D | radeon_asic.c | 209 .gart = { 277 .gart = { 373 .gart = { 441 .gart = { 509 .gart = { 577 .gart = { 645 .gart = { 713 .gart = { 781 .gart = { 849 .gart = { [all …]
|
H A D | r300.c | 113 void __iomem *ptr = rdev->gart.ptr; in rv370_pcie_gart_set_page() 125 if (rdev->gart.robj) { in rv370_pcie_gart_init() 136 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; in rv370_pcie_gart_init() 137 rdev->asic->gart.tlb_flush = &rv370_pcie_gart_tlb_flush; in rv370_pcie_gart_init() 138 rdev->asic->gart.get_page_entry = &rv370_pcie_gart_get_page_entry; in rv370_pcie_gart_init() 139 rdev->asic->gart.set_page = &rv370_pcie_gart_set_page; in rv370_pcie_gart_init() 149 if (rdev->gart.robj == NULL) { in rv370_pcie_gart_enable() 164 table_addr = rdev->gart.table_addr; in rv370_pcie_gart_enable() 179 rdev->gart.ready = true; in rv370_pcie_gart_enable()
|
H A D | rs600.c | 537 if (rdev->gart.robj) { in rs600_gart_init() 546 rdev->gart.table_size = rdev->gart.num_gpu_pages * 8; in rs600_gart_init() 555 if (rdev->gart.robj == NULL) { in rs600_gart_enable() 592 rdev->gart.table_addr); in rs600_gart_enable() 609 (unsigned long long)rdev->gart.table_addr); in rs600_gart_enable() 610 rdev->gart.ready = true; in rs600_gart_enable() 650 void __iomem *ptr = (void *)rdev->gart.ptr; in rs600_gart_set_page()
|
H A D | rv770.c | 895 if (rdev->gart.robj == NULL) { in rv770_pcie_gart_enable() 924 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in rv770_pcie_gart_enable() 935 (unsigned long long)rdev->gart.table_addr); in rv770_pcie_gart_enable() 936 rdev->gart.ready = true; in rv770_pcie_gart_enable()
|
H A D | r100.c | 639 if (rdev->gart.ptr) { in r100_pci_gart_init() 647 rdev->gart.table_size = rdev->gart.num_gpu_pages * 4; in r100_pci_gart_init() 648 rdev->asic->gart.tlb_flush = &r100_pci_gart_tlb_flush; in r100_pci_gart_init() 649 rdev->asic->gart.get_page_entry = &r100_pci_gart_get_page_entry; in r100_pci_gart_init() 650 rdev->asic->gart.set_page = &r100_pci_gart_set_page; in r100_pci_gart_init() 665 WREG32(RADEON_AIC_PT_BASE, rdev->gart.table_addr); in r100_pci_gart_enable() 671 (unsigned long long)rdev->gart.table_addr); in r100_pci_gart_enable() 672 rdev->gart.ready = true; in r100_pci_gart_enable() 695 u32 *gtt = rdev->gart.ptr; in r100_pci_gart_set_page()
|
H A D | radeon_ttm.c | 1157 if (p >= rdev->gart.num_cpu_pages) in radeon_ttm_gtt_read() 1160 page = rdev->gart.pages[p]; in radeon_ttm_gtt_read() 1166 kunmap(rdev->gart.pages[p]); in radeon_ttm_gtt_read()
|
H A D | ni.c | 1287 if (rdev->gart.robj == NULL) { in cayman_pcie_gart_enable() 1316 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in cayman_pcie_gart_enable() 1362 (unsigned long long)rdev->gart.table_addr); in cayman_pcie_gart_enable() 1363 rdev->gart.ready = true; in cayman_pcie_gart_enable()
|
H A D | r600.c | 1072 void __iomem *ptr = (void *)rdev->gart.ptr; in r600_pcie_gart_tlb_flush() 1107 if (rdev->gart.robj) { in r600_pcie_gart_init() 1115 rdev->gart.table_size = rdev->gart.num_gpu_pages * 8; in r600_pcie_gart_init() 1124 if (rdev->gart.robj == NULL) { in r600_pcie_gart_enable() 1161 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in r600_pcie_gart_enable() 1172 (unsigned long long)rdev->gart.table_addr); in r600_pcie_gart_enable() 1173 rdev->gart.ready = true; in r600_pcie_gart_enable()
|
H A D | radeon_vm.c | 368 uint64_t src = rdev->gart.table_addr + (addr >> 12) * 8; in radeon_vm_set_pages() 600 result = rdev->gart.pages_entry[addr >> RADEON_GPU_PAGE_SHIFT]; in radeon_vm_map_gart()
|
H A D | radeon.h | 1877 } gart; member 2378 struct radeon_gart gart; member 2730 #define radeon_gart_tlb_flush(rdev) (rdev)->asic->gart.tlb_flush((rdev)) 2731 #define radeon_gart_get_page_entry(a, f) (rdev)->asic->gart.get_page_entry((a), (f)) 2732 #define radeon_gart_set_page(rdev, i, e) (rdev)->asic->gart.set_page((rdev), (i), (e))
|
H A D | evergreen.c | 2384 if (rdev->gart.robj == NULL) { in evergreen_pcie_gart_enable() 2422 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in evergreen_pcie_gart_enable() 2432 (unsigned long long)rdev->gart.table_addr); in evergreen_pcie_gart_enable() 2433 rdev->gart.ready = true; in evergreen_pcie_gart_enable()
|
H A D | si.c | 4275 if (rdev->gart.robj == NULL) { in si_pcie_gart_enable() 4304 WREG32(VM_CONTEXT0_PAGE_TABLE_BASE_ADDR, rdev->gart.table_addr >> 12); in si_pcie_gart_enable() 4354 (unsigned long long)rdev->gart.table_addr); in si_pcie_gart_enable() 4355 rdev->gart.ready = true; in si_pcie_gart_enable()
|
/dragonfly/sys/dev/drm/amd/amdgpu/ |
H A D | amdgpu_gart.c | 156 r = amdgpu_bo_kmap(adev->gart.robj, &adev->gart.ptr); in amdgpu_gart_table_vram_pin() 160 adev->gart.table_addr = amdgpu_bo_gpu_offset(adev->gart.robj); in amdgpu_gart_table_vram_pin() 184 adev->gart.ptr = NULL; in amdgpu_gart_table_vram_unpin() 229 if (!adev->gart.ready) { in amdgpu_gart_unbind() 241 if (!adev->gart.ptr) in amdgpu_gart_unbind() 274 if (!adev->gart.ready) { in amdgpu_gart_map() 313 if (!adev->gart.ready) { in amdgpu_gart_bind() 325 if (!adev->gart.ptr) in amdgpu_gart_bind() 329 adev->gart.ptr); in amdgpu_gart_bind() 366 adev->gart.num_cpu_pages, adev->gart.num_gpu_pages); in amdgpu_gart_init() [all …]
|
H A D | gmc_v7_0.c | 607 if (adev->gart.robj == NULL) { in gmc_v7_0_gart_enable() 645 WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR, adev->gart.table_addr >> 12); in gmc_v7_0_gart_enable() 669 adev->gart.table_addr >> 12); in gmc_v7_0_gart_enable() 672 adev->gart.table_addr >> 12); in gmc_v7_0_gart_enable() 699 (unsigned long long)adev->gart.table_addr); in gmc_v7_0_gart_enable() 700 adev->gart.ready = true; in gmc_v7_0_gart_enable() 708 if (adev->gart.robj) { in gmc_v7_0_gart_init() 716 adev->gart.table_size = adev->gart.num_gpu_pages * 8; in gmc_v7_0_gart_init() 717 adev->gart.gart_pte_flags = 0; in gmc_v7_0_gart_init()
|
H A D | gmc_v9_0.c | 784 if (adev->gart.robj) { in gmc_v9_0_gart_init() 792 adev->gart.table_size = adev->gart.num_gpu_pages * 8; in gmc_v9_0_gart_init() 793 adev->gart.gart_pte_flags = AMDGPU_PTE_MTYPE(MTYPE_UC) | in gmc_v9_0_gart_init() 1031 if (adev->gart.robj == NULL) { in gmc_v9_0_gart_enable() 1078 (unsigned long long)adev->gart.table_addr); in gmc_v9_0_gart_enable() 1079 adev->gart.ready = true; in gmc_v9_0_gart_enable()
|
H A D | gmc_v8_0.c | 834 if (adev->gart.robj == NULL) { in gmc_v8_0_gart_enable() 888 WREG32(mmVM_CONTEXT0_PAGE_TABLE_BASE_ADDR, adev->gart.table_addr >> 12); in gmc_v8_0_gart_enable() 912 adev->gart.table_addr >> 12); in gmc_v8_0_gart_enable() 915 adev->gart.table_addr >> 12); in gmc_v8_0_gart_enable() 943 (unsigned long long)adev->gart.table_addr); in gmc_v8_0_gart_enable() 944 adev->gart.ready = true; in gmc_v8_0_gart_enable() 952 if (adev->gart.robj) { in gmc_v8_0_gart_init() 960 adev->gart.table_size = adev->gart.num_gpu_pages * 8; in gmc_v8_0_gart_init() 961 adev->gart.gart_pte_flags = AMDGPU_PTE_EXECUTABLE; in gmc_v8_0_gart_init()
|
H A D | gfxhub_v1_0.c | 42 BUG_ON(adev->gart.table_addr & (~0x0000FFFFFFFFF000ULL)); in gfxhub_v1_0_init_gart_pt_regs() 43 value = adev->gart.table_addr - adev->gmc.vram_start in gfxhub_v1_0_init_gart_pt_regs()
|
H A D | amdgpu_gtt_mgr.c | 133 lpfn = adev->gart.num_cpu_pages; in amdgpu_gtt_mgr_alloc()
|
H A D | amdgpu_job.c | 87 (*job)->vm_pd_addr = adev->gart.table_addr; in amdgpu_job_alloc_with_ib()
|
H A D | mmhub_v1_0.c | 52 BUG_ON(adev->gart.table_addr & (~0x0000FFFFFFFFF000ULL)); in mmhub_v1_0_init_gart_pt_regs() 53 value = adev->gart.table_addr - adev->gmc.vram_start + in mmhub_v1_0_init_gart_pt_regs()
|
H A D | amdgpu_ttm.c | 1468 flags |= adev->gart.gart_pte_flags; in amdgpu_ttm_tt_pte_flags() 2012 dst_addr = adev->gart.table_addr; in amdgpu_map_buffer() 2344 if (p >= adev->gart.num_cpu_pages) in amdgpu_ttm_gtt_read() 2347 page = adev->gart.pages[p]; in amdgpu_ttm_gtt_read() 2353 kunmap(adev->gart.pages[p]); in amdgpu_ttm_gtt_read()
|
H A D | amdgpu_device.c | 1682 memcpy(adev->reset_magic, adev->gart.ptr, AMDGPU_RESET_MAGIC_NUM); in amdgpu_device_fill_reset_magic() 1697 return !!memcmp(adev->gart.ptr, adev->reset_magic, in amdgpu_device_check_vram_lost()
|
H A D | amdgpu.h | 1447 struct amdgpu_gart gart; member
|