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Searched refs:mmCRTC5_CRTC_GSL_CONTROL (Results 1 – 10 of 10) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dce80/
H A Ddce80_hw_sequencer.c61 .crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
/dragonfly/sys/dev/drm/amd/display/dc/dce112/
H A Ddce112_hw_sequencer.c59 .crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
/dragonfly/sys/dev/drm/amd/display/dc/dce100/
H A Ddce100_hw_sequencer.c60 .crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC_GSL_CONTROL),
/dragonfly/sys/dev/drm/amd/display/dc/dce120/
H A Ddce120_hw_sequencer.c71 .crtc = (mmCRTC5_CRTC_GSL_CONTROL - mmCRTC0_CRTC_GSL_CONTROL),
/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_d.h895 #define mmCRTC5_CRTC_GSL_CONTROL 0x4A7B macro
H A Ddce_8_0_d.h857 #define mmCRTC5_CRTC_GSL_CONTROL 0x4a7b macro
H A Ddce_10_0_d.h986 #define mmCRTC5_CRTC_GSL_CONTROL 0x457b macro
H A Ddce_11_0_d.h797 #define mmCRTC5_CRTC_GSL_CONTROL 0x457b macro
H A Ddce_11_2_d.h846 #define mmCRTC5_CRTC_GSL_CONTROL 0x457b macro
H A Ddce_12_0_offset.h8152 #define mmCRTC5_CRTC_GSL_CONTROL … macro