Searched refs:performance_level_count (Results 1 – 11 of 11) sorted by relevance
833 for (i = 1; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()863 for (i = 1; i < ps->performance_level_count; i++) in ni_apply_state_adjust_rules()868 for (i = 0; i < ps->performance_level_count; i++) in ni_apply_state_adjust_rules()872 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()887 for (i = 0; i < ps->performance_level_count; i++) { in ni_apply_state_adjust_rules()1397 if (state->performance_level_count < 3) in ni_calculate_power_boost_limit()2400 if (state->performance_level_count >= 9) in ni_populate_smc_t()2403 if (state->performance_level_count < 2) { in ni_populate_smc_t()2468 if (state->performance_level_count == 0) in ni_populate_power_containment_values()2545 if (state->performance_level_count == 0) in ni_populate_sq_ramping_values()[all …]
2308 if (state->performance_level_count == 0) in si_populate_power_containment_values()2390 if (state->performance_level_count == 0) in si_populate_sq_ramping_values()3054 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()3146 for (i = 0; i < ps->performance_level_count; i++) in si_apply_state_adjust_rules()3150 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()3167 for (i = 0; i < ps->performance_level_count; i++) { in si_apply_state_adjust_rules()3404 u32 levels = ps->performance_level_count; in si_dpm_force_performance_level()5095 if (state->performance_level_count >= 9) in si_populate_smc_t()5098 if (state->performance_level_count < 2) { in si_populate_smc_t()5276 ((new_state->performance_level_count - 1) * in si_upload_sw_state()[all …]
173 u16 performance_level_count; member
46 u16 performance_level_count; member
864 for (i = 0; i < ps->performance_level_count; i++) { in ci_apply_state_adjust_rules()875 mclk = ps->performance_levels[ps->performance_level_count - 1].mclk; in ci_apply_state_adjust_rules()3790 if (state->performance_level_count < 1) in ci_trim_dpm_states()3793 if (state->performance_level_count == 1) in ci_trim_dpm_states()3895 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_find_dpm_states_clocks_in_dpm_table()3897 u32 mclk = state->performance_levels[state->performance_level_count-1].mclk; in ci_find_dpm_states_clocks_in_dpm_table()3933 u32 sclk = state->performance_levels[state->performance_level_count-1].sclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()3934 u32 mclk = state->performance_levels[state->performance_level_count-1].mclk; in ci_populate_and_upload_sclk_mclk_dpm_levels()4835 for (i = 0; i < state->performance_level_count; i++) { in ci_get_maximum_link_speed()5511 ps->performance_level_count = index + 1; in ci_parse_pplib_clock_info()[all …]
2405 if (state->performance_level_count == 0) in si_populate_power_containment_values()2486 if (state->performance_level_count == 0) in si_populate_sq_ramping_values()3605 for (i = 0; i < ps->performance_level_count; i++) in si_apply_state_adjust_rules()3864 u32 levels = ps->performance_level_count; in si_dpm_force_performance_level()5558 if (state->performance_level_count >= 9) in si_populate_smc_t()5561 if (state->performance_level_count < 2) { in si_populate_smc_t()5739 ((new_state->performance_level_count - 1) * in si_upload_sw_state()7141 ps->performance_level_count = index + 1; in si_parse_pplib_clock_info()7960 if (si_cps->performance_level_count != si_rps->performance_level_count) { in si_check_state_equal()7998 if (pl_index < ps->performance_level_count) { in si_dpm_read_sensor()[all …]
615 u16 performance_level_count; member
2969 [smu7_ps->performance_level_count - 1].memory_clock; in smu7_apply_state_adjust_rules()3033 [smu7_ps->performance_level_count-1].memory_clock; in smu7_dpm_get_mclk()3055 [smu7_ps->performance_level_count-1].engine_clock; in smu7_dpm_get_sclk()3169 [smu7_power_state->performance_level_count++]); in smu7_get_pp_table_entry_callback_func_v1()3177 (smu7_power_state->performance_level_count <= in smu7_get_pp_table_entry_callback_func_v1()3197 [smu7_power_state->performance_level_count++]); in smu7_get_pp_table_entry_callback_func_v1()3265 for (i = 0; i < ps->performance_level_count; i++) { in smu7_get_pp_table_entry_v1()3341 (ps->performance_level_count < in smu7_get_pp_table_entry_callback_func_v0()3347 [ps->performance_level_count++]); in smu7_get_pp_table_entry_callback_func_v0()4203 if (psa->performance_level_count != psb->performance_level_count) { in smu7_check_states_equal()[all …]
3026 [vega10_power_state->performance_level_count++]); in vega10_get_pp_table_entry_callback_func()3029 (vega10_power_state->performance_level_count < in vega10_get_pp_table_entry_callback_func()3035 (vega10_power_state->performance_level_count <= in vega10_get_pp_table_entry_callback_func()3050 [vega10_power_state->performance_level_count++]); in vega10_get_pp_table_entry_callback_func()3126 if (vega10_ps->performance_level_count != 2) in vega10_apply_state_adjust_rules()3653 [vega10_ps->performance_level_count-1].mem_clock; in vega10_dpm_get_mclk()4405 if (psa->performance_level_count != psb->performance_level_count) { in vega10_check_states_equal()4410 for (i = 0; i < psa->performance_level_count; i++) { in vega10_check_states_equal()4530 [vega10_ps->performance_level_count - 1].gfx_clock = in vega10_set_sclk_od()4541 [vega10_ps->performance_level_count - 1].gfx_clock = in vega10_set_sclk_od()[all …]
82 uint16_t performance_level_count; member
109 uint16_t performance_level_count; member