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Searched refs:reg_num (Results 1 – 22 of 22) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/irq/dce120/
H A Dirq_service_dce120.c112 #define hpd_int_entry(reg_num)\ argument
114 IRQ_REG_ENTRY(HPD, reg_num,\
121 #define hpd_rx_int_entry(reg_num)\ argument
123 IRQ_REG_ENTRY(HPD, reg_num,\
129 #define pflip_int_entry(reg_num)\ argument
131 IRQ_REG_ENTRY(DCP, reg_num, \
138 #define vupdate_int_entry(reg_num)\ argument
140 IRQ_REG_ENTRY(CRTC, reg_num,\
146 #define vblank_int_entry(reg_num)\ argument
148 IRQ_REG_ENTRY(CRTC, reg_num,\
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/dragonfly/sys/dev/drm/amd/display/dc/irq/dce80/
H A Dirq_service_dce80.c88 #define hpd_int_entry(reg_num)\ argument
89 [DC_IRQ_SOURCE_INVALID + reg_num] = {\
103 #define hpd_rx_int_entry(reg_num)\ argument
104 [DC_IRQ_SOURCE_HPD6 + reg_num] = {\
117 #define pflip_int_entry(reg_num)\ argument
118 [DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
132 #define vupdate_int_entry(reg_num)\ argument
148 #define vblank_int_entry(reg_num)\ argument
170 #define i2c_int_entry(reg_num) \ argument
173 #define dp_sink_int_entry(reg_num) \ argument
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/dragonfly/sys/dev/drm/amd/display/dc/irq/dcn10/
H A Dirq_service_dcn10.c182 #define hpd_int_entry(reg_num)\ argument
184 IRQ_REG_ENTRY(HPD, reg_num,\
191 #define hpd_rx_int_entry(reg_num)\ argument
193 IRQ_REG_ENTRY(HPD, reg_num,\
199 #define pflip_int_entry(reg_num)\ argument
201 IRQ_REG_ENTRY(HUBPREQ, reg_num,\
207 #define vupdate_int_entry(reg_num)\ argument
209 IRQ_REG_ENTRY(OTG, reg_num,\
215 #define vblank_int_entry(reg_num)\ argument
217 IRQ_REG_ENTRY(OTG, reg_num,\
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/dragonfly/sys/dev/drm/amd/display/dc/irq/dce110/
H A Dirq_service_dce110.c84 #define hpd_int_entry(reg_num)\ argument
85 [DC_IRQ_SOURCE_HPD1 + reg_num] = {\
99 #define hpd_rx_int_entry(reg_num)\ argument
100 [DC_IRQ_SOURCE_HPD1RX + reg_num] = {\
112 #define pflip_int_entry(reg_num)\ argument
113 [DC_IRQ_SOURCE_PFLIP1 + reg_num] = {\
127 #define vupdate_int_entry(reg_num)\ argument
143 #define vblank_int_entry(reg_num)\ argument
165 #define i2c_int_entry(reg_num) \ argument
168 #define dp_sink_int_entry(reg_num) \ argument
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/dragonfly/contrib/binutils-2.34/gas/config/
H A Dtc-i386-intel.c263 int reg_num; in i386_intel_simplify_register() local
272 reg_num = e->X_add_number; in i386_intel_simplify_register()
274 reg_num = e->X_md - 1; in i386_intel_simplify_register()
276 if (reg_num < 0 || reg_num >= (int) i386_regtab_size) in i386_intel_simplify_register()
290 && i386_regtab[reg_num].reg_num == RegFlat) in i386_intel_simplify_register()
301 || i386_regtab[reg_num].reg_num == RegIZ)) in i386_intel_simplify_register()
304 intel_state.base = i386_regtab + reg_num; in i386_intel_simplify_register()
311 intel_state.index = i386_regtab + reg_num; in i386_intel_simplify_register()
316 intel_state.base = i386_regtab + reg_num; in i386_intel_simplify_register()
912 && intel_state.base->reg_num >= 6 in i386_intel_operand()
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H A Dtc-i386.c2295 unsigned int nr = r->reg_num; in register_number()
4602 && i.op[x].regs->reg_num > 3) in md_assemble()
6631 && i.op[op].regs->reg_num < 4 in check_byte_reg()
7087 && i.op[0].regs->reg_num == 1 in process_operands()
7089 && i.op[0].regs->reg_num < 4) in process_operands()
7549 switch (i.base_reg->reg_num) in build_modrm_byte()
7597 i.rm.regmem = i.base_reg->reg_num; in build_modrm_byte()
8905 || i.base_reg->reg_num == 5)) in output_insn()
10368 && i.base_reg->reg_num < 6 in i386_index_check()
10369 && i.index_reg->reg_num >= 6 in i386_index_check()
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/dragonfly/contrib/binutils-2.27/gas/config/
H A Dtc-i386-intel.c260 int reg_num; in i386_intel_simplify_register() local
269 reg_num = e->X_add_number; in i386_intel_simplify_register()
271 reg_num = e->X_md - 1; in i386_intel_simplify_register()
281 && i386_regtab[reg_num].reg_num == RegFlat) in i386_intel_simplify_register()
289 && (i386_regtab[reg_num].reg_type.bitfield.regxmm in i386_intel_simplify_register()
292 intel_state.index = i386_regtab + reg_num; in i386_intel_simplify_register()
294 intel_state.base = i386_regtab + reg_num; in i386_intel_simplify_register()
301 intel_state.index = i386_regtab + reg_num; in i386_intel_simplify_register()
306 intel_state.base = i386_regtab + reg_num; in i386_intel_simplify_register()
972 && intel_state.base->reg_num >= 6 in i386_intel_operand()
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H A Dtc-i386.c1929 unsigned int nr = r->reg_num; in register_number()
5540 && i.op[op].regs->reg_num < 4 in check_byte_reg()
6498 i.base_reg->reg_num == RegEip) in build_modrm_byte()
6515 switch (i.base_reg->reg_num) in build_modrm_byte()
7986 if (mask->reg_num == 0) in check_VecOperations()
8499 || addr_reg->reg_num == RegEiz in i386_index_check()
8602 || (i.base_reg->reg_num in i386_index_check()
8643 && i.base_reg->reg_num < 6 in i386_index_check()
8644 && i.index_reg->reg_num >= 6 in i386_index_check()
8793 switch (r->reg_num) in i386_att_operand()
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/dragonfly/sys/dev/drm/amd/display/dc/
H A Ddm_services.h178 #define get_reg_field_value_soc15(reg_value, block, reg_num, reg_name, reg_field)\ argument
181 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\
182 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)
184 #define set_reg_field_value_soc15(reg_value, value, block, reg_num, reg_name, reg_field)\ argument
188 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\
189 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)
/dragonfly/contrib/wpa_supplicant/src/drivers/
H A Ddriver_roboswitch.c91 mii->reg_num = reg; in wpa_driver_roboswitch_mdio_read()
108 mii->reg_num = reg; in wpa_driver_roboswitch_mdio_write()
/dragonfly/sys/dev/drm/amd/display/dc/core/
H A Ddc_link.c1474 settings->reg_num = integrated_info->dp0_ext_hdmi_6g_reg_num; in get_ext_hdmi_settings()
1486 settings->reg_num = integrated_info->dp1_ext_hdmi_6g_reg_num; in get_ext_hdmi_settings()
1498 settings->reg_num = integrated_info->dp2_ext_hdmi_6g_reg_num; in get_ext_hdmi_settings()
1510 settings->reg_num = integrated_info->dp3_ext_hdmi_6g_reg_num; in get_ext_hdmi_settings()
1528 if (settings->reg_num > 9) in get_ext_hdmi_settings()
1533 for (i = 0; i < settings->reg_num; i++) { in get_ext_hdmi_settings()
1592 for (i = 0; i < settings->reg_num; i++) { in write_i2c_retimer_setting()
/dragonfly/sys/dev/drm/amd/display/dc/gpio/dcn10/
H A Dhw_factory_dcn10.c43 #define reg_num 0 macro
/dragonfly/sys/dev/drm/amd/display/dc/gpio/dce120/
H A Dhw_factory_dce120.c43 #define reg_num 0 macro
/dragonfly/sys/dev/drm/amd/display/include/
H A Dgrph_object_ctrl_defs.h275 unsigned char reg_num; member
/dragonfly/contrib/gdb-7/opcodes/
H A Di386-opc.h717 unsigned char reg_num; member
/dragonfly/contrib/cvs-1.12/lib/
H A Dregexec.c1518 Idx reg_num = dfa->nodes[cur_node].opr.idx + 1; in update_regs() local
1521 if (reg_num < nmatch) in update_regs()
1523 pmatch[reg_num].rm_so = cur_idx; in update_regs()
1524 pmatch[reg_num].rm_eo = -1; in update_regs()
1529 Idx reg_num = dfa->nodes[cur_node].opr.idx + 1; in update_regs() local
1530 if (reg_num < nmatch) in update_regs()
1533 if (pmatch[reg_num].rm_so < cur_idx) in update_regs()
1535 pmatch[reg_num].rm_eo = cur_idx; in update_regs()
1543 && prev_idx_match[reg_num].rm_so != -1) in update_regs()
1553 pmatch[reg_num].rm_eo = cur_idx; in update_regs()
/dragonfly/contrib/diffutils/lib/
H A Dregexec.c1507 Idx reg_num = dfa->nodes[cur_node].opr.idx + 1; in update_regs() local
1510 if (reg_num < nmatch) in update_regs()
1512 pmatch[reg_num].rm_so = cur_idx; in update_regs()
1513 pmatch[reg_num].rm_eo = -1; in update_regs()
1518 Idx reg_num = dfa->nodes[cur_node].opr.idx + 1; in update_regs() local
1519 if (reg_num < nmatch) in update_regs()
1522 if (pmatch[reg_num].rm_so < cur_idx) in update_regs()
1524 pmatch[reg_num].rm_eo = cur_idx; in update_regs()
1532 && prev_idx_match[reg_num].rm_so != -1) in update_regs()
1542 pmatch[reg_num].rm_eo = cur_idx; in update_regs()
/dragonfly/contrib/grep/lib/
H A Dregexec.c1491 Idx reg_num = dfa->nodes[cur_node].opr.idx + 1; in update_regs() local
1494 if (reg_num < nmatch) in update_regs()
1496 pmatch[reg_num].rm_so = cur_idx; in update_regs()
1497 pmatch[reg_num].rm_eo = -1; in update_regs()
1502 Idx reg_num = dfa->nodes[cur_node].opr.idx + 1; in update_regs() local
1503 if (reg_num < nmatch) in update_regs()
1506 if (pmatch[reg_num].rm_so < cur_idx) in update_regs()
1508 pmatch[reg_num].rm_eo = cur_idx; in update_regs()
1516 && prev_idx_match[reg_num].rm_so != -1) in update_regs()
1526 pmatch[reg_num].rm_eo = cur_idx; in update_regs()
/dragonfly/contrib/binutils-2.27/opcodes/
H A Di386-opc.h894 unsigned char reg_num; member
/dragonfly/contrib/binutils-2.34/opcodes/
H A Di386-opc.h907 unsigned char reg_num; member
/dragonfly/sys/dev/drm/radeon/
H A Devergreen.c4138 u32 dws, data, i, j, k, reg_num; in sumo_rlc_init() local
4280 reg_num = cs_data[i].section[j].reg_count; in sumo_rlc_init()
4289 data = 0x08000000 | (reg_num * 4); in sumo_rlc_init()
4293 for (k = 0; k < reg_num; k++) { in sumo_rlc_init()
4297 reg_list_mc_addr += reg_num * 4; in sumo_rlc_init()
4298 reg_list_blk_index += reg_num; in sumo_rlc_init()
/dragonfly/contrib/gdb-7/gdb/
H A Ddwarf2-frame.c318 dwarf2_restore_rule (struct gdbarch *gdbarch, ULONGEST reg_num, in dwarf2_restore_rule() argument
324 reg = dwarf2_frame_adjust_regnum (gdbarch, reg_num, eh_frame_p); in dwarf2_restore_rule()