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Searched refs:set_reg_field_value (Results 1 – 23 of 23) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dce110/
H A Ddce110_opp_csc_v.c119 set_reg_field_value( in program_color_matrix_v()
130 set_reg_field_value( in program_color_matrix_v()
136 set_reg_field_value( in program_color_matrix_v()
148 set_reg_field_value( in program_color_matrix_v()
154 set_reg_field_value( in program_color_matrix_v()
234 set_reg_field_value( in program_color_matrix_v()
348 set_reg_field_value( in program_color_matrix_v()
368 set_reg_field_value( in configure_graphics_mode_v()
497 set_reg_field_value( in set_Denormalization()
660 set_reg_field_value( in program_input_csc()
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H A Ddce110_opp_regamma_v.c42 set_reg_field_value( in power_on_lut()
48 set_reg_field_value( in power_on_lut()
55 set_reg_field_value( in power_on_lut()
61 set_reg_field_value( in power_on_lut()
91 set_reg_field_value( in set_bypass_input_gamma()
105 set_reg_field_value( in configure_regamma_mode()
137 set_reg_field_value( in regamma_config_regions_and_segments()
143 set_reg_field_value( in regamma_config_regions_and_segments()
154 set_reg_field_value( in regamma_config_regions_and_segments()
165 set_reg_field_value( in regamma_config_regions_and_segments()
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H A Ddce110_timing_generator.c134 set_reg_field_value( in dce110_timing_generator_enable_crtc()
159 set_reg_field_value( in dce110_timing_generator_program_blank_color()
164 set_reg_field_value( in dce110_timing_generator_program_blank_color()
169 set_reg_field_value( in dce110_timing_generator_program_blank_color()
616 set_reg_field_value( in dce110_timing_generator_program_blanking()
625 set_reg_field_value( in dce110_timing_generator_program_blanking()
637 set_reg_field_value( in dce110_timing_generator_program_blanking()
646 set_reg_field_value( in dce110_timing_generator_program_blanking()
659 set_reg_field_value( in dce110_timing_generator_program_blanking()
668 set_reg_field_value( in dce110_timing_generator_program_blanking()
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H A Ddce110_mem_input_v.c408 set_reg_field_value( in program_pixel_format()
413 set_reg_field_value( in program_pixel_format()
429 set_reg_field_value( in program_pixel_format()
460 set_reg_field_value( in program_pixel_format()
680 set_reg_field_value( in program_urgency_watermark()
686 set_reg_field_value( in program_urgency_watermark()
836 set_reg_field_value( in program_nbp_watermark()
845 set_reg_field_value( in program_nbp_watermark()
850 set_reg_field_value( in program_nbp_watermark()
855 set_reg_field_value( in program_nbp_watermark()
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H A Ddce110_transform_v.c89 set_reg_field_value( in program_viewport()
94 set_reg_field_value( in program_viewport()
103 set_reg_field_value( in program_viewport()
108 set_reg_field_value( in program_viewport()
119 set_reg_field_value( in program_viewport()
124 set_reg_field_value( in program_viewport()
133 set_reg_field_value( in program_viewport()
138 set_reg_field_value( in program_viewport()
190 set_reg_field_value( in setup_scaling_configuration()
195 set_reg_field_value( in setup_scaling_configuration()
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H A Ddce110_timing_generator_v.c105 set_reg_field_value( in dce110_timing_generator_v_blank_crtc()
111 set_reg_field_value( in dce110_timing_generator_v_blank_crtc()
125 set_reg_field_value( in dce110_timing_generator_v_unblank_crtc()
131 set_reg_field_value( in dce110_timing_generator_v_unblank_crtc()
261 set_reg_field_value( in dce110_timing_generator_v_program_blanking()
270 set_reg_field_value( in dce110_timing_generator_v_program_blanking()
283 set_reg_field_value( in dce110_timing_generator_v_program_blanking()
292 set_reg_field_value( in dce110_timing_generator_v_program_blanking()
305 set_reg_field_value( in dce110_timing_generator_v_program_blanking()
314 set_reg_field_value( in dce110_timing_generator_v_program_blanking()
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H A Ddce110_compressor.c181 set_reg_field_value(value, 1, FBC_CNTL, FBC_EN); in dce110_compressor_power_up_fbc()
185 set_reg_field_value( in dce110_compressor_power_up_fbc()
195 set_reg_field_value(value, 1, FBC_COMP_MODE, FBC_RLE_EN); in dce110_compressor_power_up_fbc()
197 set_reg_field_value(value, 1, FBC_COMP_MODE, FBC_IND_EN); in dce110_compressor_power_up_fbc()
235 set_reg_field_value( in dce110_compressor_enable_fbc()
253 set_reg_field_value(misc_value, 1, in dce110_compressor_enable_fbc()
255 set_reg_field_value(misc_value, 1, in dce110_compressor_enable_fbc()
257 set_reg_field_value(misc_value, 0x14, in dce110_compressor_enable_fbc()
361 set_reg_field_value( in dce110_compressor_program_compressed_surface_address_and_pitch()
380 set_reg_field_value( in dce110_compressor_set_fbc_invalidation_triggers()
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H A Ddce110_hw_sequencer.c123 set_reg_field_value( in dce110_init_pte()
129 set_reg_field_value( in dce110_init_pte()
135 set_reg_field_value( in dce110_init_pte()
158 set_reg_field_value( in dce110_init_pte()
164 set_reg_field_value( in dce110_init_pte()
170 set_reg_field_value( in dce110_init_pte()
/dragonfly/sys/dev/drm/amd/display/dc/i2caux/dce80/
H A Di2c_hw_engine_dce80.c106 set_reg_field_value( in disable_i2c_hw_engine()
134 set_reg_field_value( in release_engine()
166 set_reg_field_value( in release_engine()
210 set_reg_field_value( in setup_engine()
216 set_reg_field_value( in setup_engine()
222 set_reg_field_value( in setup_engine()
228 set_reg_field_value( in setup_engine()
234 set_reg_field_value( in setup_engine()
240 set_reg_field_value( in setup_engine()
352 set_reg_field_value( in reset_hw_engine()
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/dragonfly/sys/dev/drm/amd/display/dc/dce/
H A Ddce_audio.c355 set_reg_field_value(value, 1, in dce_aud_az_enable()
426 set_reg_field_value(value, in dce_aud_az_configure()
437 set_reg_field_value(value, in dce_aud_az_configure()
445 set_reg_field_value(value, in dce_aud_az_configure()
450 set_reg_field_value(value, in dce_aud_az_configure()
461 set_reg_field_value(value, in dce_aud_az_configure()
469 set_reg_field_value(value, in dce_aud_az_configure()
479 set_reg_field_value(value, in dce_aud_az_configure()
546 set_reg_field_value(value, in dce_aud_az_configure()
551 set_reg_field_value(value, in dce_aud_az_configure()
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H A Ddce_link_encoder.c496 set_reg_field_value(value, hpd_source, AUX_CONTROL, AUX_HPD_SEL); in aux_initialize()
497 set_reg_field_value(value, 0, AUX_CONTROL, AUX_LS_READ_EN); in aux_initialize()
504 set_reg_field_value(value, 1, in aux_initialize()
1354 set_reg_field_value(value, 1, DC_HPD_CONTROL, DC_HPD_EN); in dce110_link_encoder_enable_hpd()
1364 set_reg_field_value(value, 0, DC_HPD_CONTROL, DC_HPD_EN); in dce110_link_encoder_disable_hpd()
H A Ddce_aux.c100 set_reg_field_value( in acquire_engine()
108 set_reg_field_value( in acquire_engine()
123 set_reg_field_value( in acquire_engine()
/dragonfly/sys/dev/drm/amd/display/dc/dce112/
H A Ddce112_compressor.c119 set_reg_field_value( in lpt_memory_control_config()
126 set_reg_field_value( in lpt_memory_control_config()
150 set_reg_field_value( in lpt_memory_control_config()
328 set_reg_field_value( in dce112_compressor_power_up_fbc()
531 set_reg_field_value( in dce112_compressor_program_compressed_surface_address_and_pitch()
566 set_reg_field_value( in dce112_compressor_disable_lpt()
576 set_reg_field_value( in dce112_compressor_disable_lpt()
586 set_reg_field_value( in dce112_compressor_disable_lpt()
605 set_reg_field_value( in dce112_compressor_enable_lpt()
616 set_reg_field_value( in dce112_compressor_enable_lpt()
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H A Ddce112_hw_sequencer.c91 set_reg_field_value( in dce112_init_pte()
97 set_reg_field_value( in dce112_init_pte()
103 set_reg_field_value( in dce112_init_pte()
/dragonfly/sys/dev/drm/amd/display/dc/dce80/
H A Ddce80_timing_generator.c99 set_reg_field_value( in program_pix_dur()
128 set_reg_field_value( in dce80_timing_generator_enable_advanced_request()
134 set_reg_field_value( in dce80_timing_generator_enable_advanced_request()
142 set_reg_field_value( in dce80_timing_generator_enable_advanced_request()
147 set_reg_field_value( in dce80_timing_generator_enable_advanced_request()
153 set_reg_field_value( in dce80_timing_generator_enable_advanced_request()
158 set_reg_field_value( in dce80_timing_generator_enable_advanced_request()
165 set_reg_field_value( in dce80_timing_generator_enable_advanced_request()
171 set_reg_field_value( in dce80_timing_generator_enable_advanced_request()
/dragonfly/sys/dev/drm/amd/display/dc/dce120/
H A Ddce120_hw_sequencer.c129 set_reg_field_value(
135 set_reg_field_value(
141 set_reg_field_value(
H A Ddce120_timing_generator.c433 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_MODE_ENABLE); in dce120_timing_generator_disable_vga()
434 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_TIMING_SELECT); in dce120_timing_generator_disable_vga()
435 set_reg_field_value( in dce120_timing_generator_disable_vga()
437 set_reg_field_value(value, 0, D1VGA_CONTROL, D1VGA_OVERSCAN_COLOR_EN); in dce120_timing_generator_disable_vga()
700 set_reg_field_value( in dce120_timing_generator_enable_advanced_request()
712 set_reg_field_value( in dce120_timing_generator_enable_advanced_request()
996 set_reg_field_value( in dce120_timing_generator_set_test_pattern()
1006 set_reg_field_value( in dce120_timing_generator_set_test_pattern()
/dragonfly/sys/dev/drm/amd/display/dc/i2caux/dce110/
H A Daux_engine_dce110.c130 set_reg_field_value( in acquire_engine()
138 set_reg_field_value( in acquire_engine()
153 set_reg_field_value( in acquire_engine()
/dragonfly/sys/dev/drm/amd/display/dc/irq/dce80/
H A Dirq_service_dce80.c56 set_reg_field_value( in hpd_ack()
/dragonfly/sys/dev/drm/amd/display/dc/irq/dce120/
H A Dirq_service_dce120.c56 set_reg_field_value( in hpd_ack()
/dragonfly/sys/dev/drm/amd/display/dc/
H A Ddm_services.h136 #define set_reg_field_value(reg_value, value, reg_name, reg_field)\ macro
/dragonfly/sys/dev/drm/amd/display/dc/irq/dcn10/
H A Dirq_service_dcn10.c126 set_reg_field_value( in hpd_ack()
/dragonfly/sys/dev/drm/amd/display/dc/irq/dce110/
H A Dirq_service_dce110.c55 set_reg_field_value(value, current_status ? 0 : 1, in hpd_ack()