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Searched refs:vddc_phase_shed_control (Results 1 – 12 of 12) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H A Dsi_dpm.h170 bool vddc_phase_shed_control; member
H A Dci_dpm.h235 bool vddc_phase_shed_control; member
H A Dsi_dpm.c4022 if (si_pi->vddc_phase_shed_control) { in si_construct_voltage_tables()
4026 si_pi->vddc_phase_shed_control = false; in si_construct_voltage_tables()
4030 si_pi->vddc_phase_shed_control = false; in si_construct_voltage_tables()
4090 if (si_pi->vddc_phase_shed_control) { in si_populate_smc_voltage_tables()
4101 si_pi->vddc_phase_shed_control = false; in si_populate_smc_voltage_tables()
4440 if (si_pi->vddc_phase_shed_control) in si_populate_smc_initial_state()
4526 if (si_pi->vddc_phase_shed_control) { in si_populate_smc_acpi_state()
4553 if (si_pi->vddc_phase_shed_control) in si_populate_smc_acpi_state()
5066 if (si_pi->vddc_phase_shed_control) { in si_convert_power_level_to_smc()
7008 si_pi->vddc_phase_shed_control = in si_dpm_init()
H A Dci_dpm.c2943 if (pi->vddc_phase_shed_control) in ci_populate_single_memory_level()
3042 table->ACPILevel.MinVddcPhases = pi->vddc_phase_shed_control ? 0 : 1; in ci_populate_smc_acpi_level()
3184 state->VddcPhase = pi->vddc_phase_shed_control ? 0 : 1; in ci_populate_ulv_level()
3272 if (pi->vddc_phase_shed_control) in ci_populate_single_graphic_level()
5917 pi->vddc_phase_shed_control = true; in ci_dpm_init()
/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dsmu7_hwmgr.h286 uint8_t vddc_phase_shed_control; member
H A Dsmu7_hwmgr.c1603 data->vddc_phase_shed_control = ((tmp3 << 1) | (tmp3 >> 1)) & 0x3; in smu7_init_dpm_defaults()
1605 data->vddc_phase_shed_control = 1; in smu7_init_dpm_defaults()
1607 data->vddc_phase_shed_control = 0; in smu7_init_dpm_defaults()
/dragonfly/sys/dev/drm/amd/powerplay/smumgr/
H A Diceland_smumgr.c911 if (data->vddc_phase_shed_control) in iceland_populate_single_graphic_level()
1260 if (data->vddc_phase_shed_control) { in iceland_populate_single_memory_level()
1427 uint32_t vddc_phase_shed_control = 0; in iceland_populate_smc_acpi_level() local
1444 table->ACPILevel.MinVddcPhases = vddc_phase_shed_control ? 0 : 1; in iceland_populate_smc_acpi_level()
H A Dci_smumgr.c427 if (data->vddc_phase_shed_control) in ci_populate_single_graphic_level()
1212 if (data->vddc_phase_shed_control) { in ci_populate_single_memory_level()
1396 table->ACPILevel.MinVddcPhases = data->vddc_phase_shed_control ? 0 : 1; in ci_populate_smc_acpi_level()
H A Dpolaris10_smumgr.c748 state->VddcPhase = data->vddc_phase_shed_control ^ 0x3; in polaris10_populate_ulv_level()
750 state->VddcPhase = (data->vddc_phase_shed_control) ? 0 : 1; in polaris10_populate_ulv_level()
H A Dvegam_smumgr.c553 state->VddcPhase = data->vddc_phase_shed_control ^ 0x3; in vegam_populate_ulv_level()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Dsi_dpm.c4485 if (si_pi->vddc_phase_shed_control) { in si_construct_voltage_tables()
4489 si_pi->vddc_phase_shed_control = false; in si_construct_voltage_tables()
4493 si_pi->vddc_phase_shed_control = false; in si_construct_voltage_tables()
4553 if (si_pi->vddc_phase_shed_control) { in si_populate_smc_voltage_tables()
4564 si_pi->vddc_phase_shed_control = false; in si_populate_smc_voltage_tables()
4905 if (si_pi->vddc_phase_shed_control) in si_populate_smc_initial_state()
4989 if (si_pi->vddc_phase_shed_control) { in si_populate_smc_acpi_state()
5017 if (si_pi->vddc_phase_shed_control) in si_populate_smc_acpi_state()
5529 if (si_pi->vddc_phase_shed_control) { in si_convert_power_level_to_smc()
7413 si_pi->vddc_phase_shed_control = in si_dpm_init()
H A Dsi_dpm.h977 bool vddc_phase_shed_control; member