/dragonfly/sys/dev/drm/amd/amdgpu/ |
H A D | amdgpu_test.c | 88 void **vram_start, **vram_end; in amdgpu_do_test_moves() local 151 vram_start < vram_end; in amdgpu_do_test_moves() 152 gart_start++, vram_start++) { in amdgpu_do_test_moves() 153 if (*vram_start != gart_start) { in amdgpu_do_test_moves() 157 i, *vram_start, gart_start, in amdgpu_do_test_moves() 167 *vram_start = vram_start; in amdgpu_do_test_moves() 198 gart_start++, vram_start++) { in amdgpu_do_test_moves() 199 if (*gart_start != vram_start) { in amdgpu_do_test_moves() 203 i, *gart_start, vram_start, in amdgpu_do_test_moves() 206 (void*)vram_start - vram_map), in amdgpu_do_test_moves() [all …]
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H A D | gfxhub_v1_0.c | 43 value = adev->gart.table_addr - adev->gmc.vram_start in gfxhub_v1_0_init_gart_pt_regs() 81 adev->gmc.vram_start >> 18); in gfxhub_v1_0_init_system_aperture_regs() 86 value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start in gfxhub_v1_0_init_system_aperture_regs() 260 adev->gmc.vram_start >> 24); in gfxhub_v1_0_gart_enable()
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H A D | mmhub_v1_0.c | 53 value = adev->gart.table_addr - adev->gmc.vram_start + in mmhub_v1_0_init_gart_pt_regs() 92 adev->gmc.vram_start >> 18); in mmhub_v1_0_init_system_aperture_regs() 97 value = adev->vram_scratch.gpu_addr - adev->gmc.vram_start + in mmhub_v1_0_init_system_aperture_regs() 506 adev->gmc.vram_start >> 24); in mmhub_v1_0_gart_enable()
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H A D | amdgpu_gmc.h | 87 u64 vram_start; member
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H A D | amdgpu_fb.c | 267 unsigned long tmp = amdgpu_bo_gpu_offset(abo) - adev->gmc.vram_start; in amdgpufb_create() 278 tmp = amdgpu_bo_gpu_offset(abo) - adev->gmc.vram_start; in amdgpufb_create()
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H A D | gmc_v9_0.c | 514 adev->gmc.vram_start; in gmc_v9_0_get_vm_pde() 1061 WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8)); in gmc_v9_0_gart_enable() 1062 WREG32_SOC15(HDP, 0, mmHDP_NONSURFACE_BASE_HI, (adev->gmc.vram_start >> 40)); in gmc_v9_0_gart_enable()
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H A D | gmc_v8_0.c | 478 adev->gmc.vram_start >> 12); in gmc_v8_0_mc_program() 486 tmp |= ((adev->gmc.vram_start >> 24) & 0xFFFF); in gmc_v8_0_mc_program() 489 WREG32(mmHDP_NONSURFACE_BASE, (adev->gmc.vram_start >> 8)); in gmc_v8_0_mc_program()
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H A D | amdgpu_device.c | 668 mc->vram_start = base; in amdgpu_device_vram_location() 669 mc->vram_end = mc->vram_start + mc->mc_vram_size - 1; in amdgpu_device_vram_location() 673 mc->mc_vram_size >> 20, mc->vram_start, in amdgpu_device_vram_location() 696 size_bf = mc->vram_start; in amdgpu_device_gart_location()
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H A D | gmc_v7_0.c | 287 adev->gmc.vram_start >> 12); in gmc_v7_0_mc_program()
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/dragonfly/sys/dev/drm/radeon/ |
H A D | radeon_test.c | 87 void **vram_start, **vram_end; in radeon_do_test_moves() local 149 vram_start < vram_end; in radeon_do_test_moves() 150 gtt_start++, vram_start++) { in radeon_do_test_moves() 151 if (*vram_start != gtt_start) { in radeon_do_test_moves() 155 i, *vram_start, gtt_start, in radeon_do_test_moves() 165 *vram_start = vram_start; in radeon_do_test_moves() 201 gtt_start++, vram_start++) { in radeon_do_test_moves() 202 if (*gtt_start != vram_start) { in radeon_do_test_moves() 206 i, *gtt_start, vram_start, in radeon_do_test_moves() 209 (uintptr_t)vram_start - (uintptr_t)vram_map), in radeon_do_test_moves() [all …]
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H A D | rv515.c | 384 upper_32_bits(rdev->mc.vram_start)); in rv515_mc_resume() 386 upper_32_bits(rdev->mc.vram_start)); in rv515_mc_resume() 389 upper_32_bits(rdev->mc.vram_start)); in rv515_mc_resume() 391 upper_32_bits(rdev->mc.vram_start)); in rv515_mc_resume() 395 (u32)rdev->mc.vram_start); in rv515_mc_resume() 397 (u32)rdev->mc.vram_start); in rv515_mc_resume() 399 WREG32(R_000310_VGA_MEMORY_BASE_ADDRESS, (u32)rdev->mc.vram_start); in rv515_mc_resume() 478 S_000001_MC_FB_START(rdev->mc.vram_start >> 16) | in rv515_mc_program() 481 S_000134_HDP_FB_START(rdev->mc.vram_start >> 16)); in rv515_mc_program()
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H A D | rv770.c | 1028 if (rdev->mc.vram_start < rdev->mc.gtt_start) { in rv770_mc_program() 1031 rdev->mc.vram_start >> 12); in rv770_mc_program() 1043 rdev->mc.vram_start >> 12); in rv770_mc_program() 1049 tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF); in rv770_mc_program() 1051 WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8)); in rv770_mc_program() 1618 mc->vram_start = mc->gtt_start - mc->mc_vram_size; in r700_vram_gtt_location() 1625 mc->vram_start = mc->gtt_end + 1; in r700_vram_gtt_location() 1627 mc->vram_end = mc->vram_start + mc->mc_vram_size - 1; in r700_vram_gtt_location() 1629 mc->mc_vram_size >> 20, mc->vram_start, in r700_vram_gtt_location()
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H A D | r520.c | 147 S_000004_MC_FB_START(rdev->mc.vram_start >> 16) | in r520_mc_program() 150 S_000134_HDP_FB_START(rdev->mc.vram_start >> 16)); in r520_mc_program()
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H A D | radeon_device.c | 591 mc->vram_start = base; in radeon_vram_location() 597 mc->vram_end = mc->vram_start + mc->mc_vram_size - 1; in radeon_vram_location() 598 if (rdev->flags & RADEON_IS_AGP && mc->vram_end > mc->gtt_start && mc->vram_start <= mc->gtt_end) { in radeon_vram_location() 603 mc->vram_end = mc->vram_start + mc->mc_vram_size - 1; in radeon_vram_location() 607 mc->mc_vram_size >> 20, mc->vram_start, in radeon_vram_location() 628 size_bf = mc->vram_start & ~mc->gtt_base_align; in radeon_gtt_location() 634 mc->gtt_start = (mc->vram_start & ~mc->gtt_base_align) - mc->gtt_size; in radeon_gtt_location()
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H A D | radeon_fb.c | 284 unsigned long tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start; in radeonfb_create() 294 tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start; in radeonfb_create()
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H A D | rs600.c | 598 WREG32_MC(R_000112_MC_PT0_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start); in rs600_gart_enable() 968 S_000004_MC_FB_START(rdev->mc.vram_start >> 16) | in rs600_mc_program() 971 S_000134_HDP_FB_START(rdev->mc.vram_start >> 16)); in rs600_mc_program()
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H A D | evergreen.c | 2752 upper_32_bits(rdev->mc.vram_start)); in evergreen_mc_resume() 2754 upper_32_bits(rdev->mc.vram_start)); in evergreen_mc_resume() 2756 (u32)rdev->mc.vram_start); in evergreen_mc_resume() 2758 (u32)rdev->mc.vram_start); in evergreen_mc_resume() 2763 WREG32(EVERGREEN_VGA_MEMORY_BASE_ADDRESS, (u32)rdev->mc.vram_start); in evergreen_mc_resume() 2856 if (rdev->mc.vram_start < rdev->mc.gtt_start) { in evergreen_mc_program() 2859 rdev->mc.vram_start >> 12); in evergreen_mc_program() 2871 rdev->mc.vram_start >> 12); in evergreen_mc_program() 2882 tmp |= ((rdev->mc.vram_start >> 20) & 0xF) << 20; in evergreen_mc_program() 2886 tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF); in evergreen_mc_program() [all …]
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H A D | radeon_ttm.c | 165 man->gpu_offset = rdev->mc.vram_start; in radeon_init_mem_type() 274 old_start += rdev->mc.vram_start; in radeon_move_blit() 285 new_start += rdev->mc.vram_start; in radeon_move_blit()
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H A D | r600.c | 1317 if (rdev->mc.vram_start < rdev->mc.gtt_start) { in r600_mc_program() 1320 rdev->mc.vram_start >> 12); in r600_mc_program() 1331 WREG32(MC_VM_SYSTEM_APERTURE_LOW_ADDR, rdev->mc.vram_start >> 12); in r600_mc_program() 1336 tmp |= ((rdev->mc.vram_start >> 24) & 0xFFFF); in r600_mc_program() 1338 WREG32(HDP_NONSURFACE_BASE, (rdev->mc.vram_start >> 8)); in r600_mc_program() 1399 mc->vram_start = mc->gtt_start - mc->mc_vram_size; in r600_vram_gtt_location() 1406 mc->vram_start = mc->gtt_end + 1; in r600_vram_gtt_location() 1408 mc->vram_end = mc->vram_start + mc->mc_vram_size - 1; in r600_vram_gtt_location() 1410 mc->mc_vram_size >> 20, mc->vram_start, in r600_vram_gtt_location()
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H A D | rs690.c | 684 S_000100_MC_FB_START(rdev->mc.vram_start >> 16) | in rs690_mc_program() 687 S_000134_HDP_FB_START(rdev->mc.vram_start >> 16)); in rs690_mc_program()
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H A D | rs400.c | 394 S_000148_MC_FB_START(rdev->mc.vram_start >> 16) | in rs400_mc_program()
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H A D | r300.c | 167 WREG32_PCIE(RADEON_PCIE_TX_DISCARD_RD_ADDR_LO, rdev->mc.vram_start); in rv370_pcie_gart_enable() 1349 S_000148_MC_FB_START(rdev->mc.vram_start >> 16) | in r300_mc_program()
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H A D | radeon_legacy_crtc.c | 473 radeon_crtc->legacy_display_base_addr = rdev->mc.vram_start; in radeon_crtc_do_set_base()
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H A D | radeon_object.c | 344 domain_start = bo->rdev->mc.vram_start; in radeon_bo_pin_restricted()
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H A D | r100.c | 3826 WREG32(R_00023C_DISPLAY_BASE_ADDR, rdev->mc.vram_start); in r100_mc_resume() 3828 WREG32(R_00033C_CRTC2_DISPLAY_BASE_ADDR, rdev->mc.vram_start); in r100_mc_resume() 3881 S_000148_MC_FB_START(rdev->mc.vram_start >> 16) | in r100_mc_program()
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