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Searched refs:getBasePtr (Results 1 – 25 of 55) sorted by relevance

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/freebsd/contrib/llvm-project/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h1400 const SDValue &getBasePtr() const {
1476 const SDValue &getBasePtr() const {
2402 const SDValue &getBasePtr() const { return getOperand(1); }
2433 const SDValue &getBasePtr() const { return getOperand(2); }
2468 const SDValue &getBasePtr() const {
2537 const SDValue &getBasePtr() const { return getOperand(1); }
2566 const SDValue &getBasePtr() const { return getOperand(1); }
2603 const SDValue &getBasePtr() const { return getOperand(2); }
2639 const SDValue &getBasePtr() const { return getOperand(2); }
2709 const SDValue &getBasePtr() const { return getOperand(1); }
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/freebsd/contrib/llvm-project/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGAddressAnalysis.cpp204 SDValue Ptr = N->getBasePtr(); in matchLSNode()
256 Base = DAG.getTargetLoweringInfo().unwrapAddress(LSBase->getBasePtr()); in matchLSNode()
H A DLegalizeVectorTypes.cpp410 N->getBasePtr(), DAG.getUNDEF(N->getBasePtr().getValueType()), in ScalarizeVecRes_LOAD()
1892 SDValue Ptr = LD->getBasePtr(); in SplitVecRes_LOAD()
1938 SDValue Ptr = LD->getBasePtr(); in SplitVecRes_VP_LOAD()
2098 SDValue Ptr = MLD->getBasePtr(); in SplitVecRes_MLOAD()
2181 SDValue Ptr = N->getBasePtr(); in SplitVecRes_Gather()
3439 SDValue Ptr = N->getBasePtr(); in SplitVecOp_VP_STORE()
3592 SDValue Ptr = N->getBasePtr(); in SplitVecOp_MSTORE()
3669 SDValue Ptr = N->getBasePtr(); in SplitVecOp_Scatter()
3757 SDValue Ptr = N->getBasePtr(); in SplitVecOp_STORE()
7014 SDValue BasePtr = LD->getBasePtr(); in GenWidenVectorLoads()
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H A DDAGCombiner.cpp11893 SDValue Ptr = MST->getBasePtr(); in visitMSTORE()
18071 Ptr = LD->getBasePtr(); in getCombineLoadStoreParts()
18078 Ptr = ST->getBasePtr(); in getCombineLoadStoreParts()
18087 Ptr = LD->getBasePtr(); in getCombineLoadStoreParts()
18096 Ptr = ST->getBasePtr(); in getCombineLoadStoreParts()
19518 SDValue Ptr = St->getBasePtr(); in ShrinkLoadReplaceStoreWithStore()
20931 SDValue Ptr = ST->getBasePtr(); in replaceStoreOfFPConstant()
21006 SDValue Ptr = ST->getBasePtr(); in replaceStoreOfInsertLoad()
21439 SDValue Ptr = ST->getBasePtr(); in splitMergedValStore()
26999 LLD->getBasePtr(), RLD->getBasePtr(), in SimplifySelectOps()
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H A DLegalizeFloatTypes.cpp792 L->getChain(), L->getBasePtr(), L->getOffset(), in SoftenFloatRes_LOAD()
803 dl, L->getChain(), L->getBasePtr(), L->getOffset(), in SoftenFloatRes_LOAD()
1163 return DAG.getStore(ST->getChain(), dl, Val, ST->getBasePtr(), in SoftenFloatOp_STORE()
1743 SDValue Ptr = LD->getBasePtr(); in ExpandFloatRes_LOAD()
2103 SDValue Ptr = ST->getBasePtr(); in ExpandFloatOp_STORE()
2364 return DAG.getStore(ST->getChain(), DL, NewVal, ST->getBasePtr(), in PromoteFloatOp_STORE()
2681 L->getChain(), L->getBasePtr(), L->getOffset(), L->getPointerInfo(), IVT, in PromoteFloatRes_LOAD()
2757 { AM->getChain(), AM->getBasePtr(), CastVal }, in BitcastToInt_ATOMIC_SWAP()
3021 SDLoc(N), L->getChain(), L->getBasePtr(), L->getOffset(), in SoftPromoteHalfRes_LOAD()
3288 return DAG.getStore(ST->getChain(), dl, Promoted, ST->getBasePtr(), in SoftPromoteHalfOp_STORE()
H A DLegalizeTypesGeneric.cpp257 SDValue Ptr = LD->getBasePtr(); in ExpandRes_NormalLoad()
466 SDValue Ptr = St->getBasePtr(); in ExpandOp_NormalStore()
H A DStatepointLowering.cpp552 LPadPointers.insert(Builder.getValue(Relocate->getBasePtr())); in lowerStatepointMetaArgs()
1066 SI.Bases.push_back(Relocate->getBasePtr()); in LowerStatepoint()
H A DLegalizeIntegerTypes.cpp341 N->getChain(), N->getBasePtr(), in PromoteIntRes_Atomic0()
353 N->getChain(), N->getBasePtr(), in PromoteIntRes_Atomic1()
376 N->getChain(), N->getBasePtr(), N->getOperand(2), N->getOperand(3), in PromoteIntRes_AtomicCmpSwap()
405 N->getBasePtr(), Op2, Op3, N->getMemOperand()); in PromoteIntRes_AtomicCmpSwap()
860 SDValue Res = DAG.getExtLoad(ExtType, dl, NVT, N->getChain(), N->getBasePtr(), in PromoteIntRes_LOAD()
878 SDValue Res = DAG.getMaskedLoad(NVT, dl, N->getChain(), N->getBasePtr(), in PromoteIntRes_MLOAD()
900 SDValue Ops[] = {N->getChain(), ExtPassThru, N->getMask(), N->getBasePtr(), in PromoteIntRes_MGATHER()
2187 SDValue Ch = N->getChain(), Ptr = N->getBasePtr(); in PromoteIntOp_STORE()
2214 return DAG.getMaskedStore(N->getChain(), SDLoc(N), DataOp, N->getBasePtr(), in PromoteIntOp_MSTORE()
3875 SDValue Ptr = N->getBasePtr(); in ExpandIntRes_LOAD()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AVR/
H A DAVRISelDAGToDAG.cpp171 LD->getBasePtr(), LD->getChain()); in selectIndexedLoad()
324 SDValue BasePtr = ST->getBasePtr(); in select()
377 SDValue Ptr = LD->getBasePtr(); in select()
/freebsd/contrib/llvm-project/llvm/lib/Target/SystemZ/
H A DSystemZISelDAGToDAG.cpp1239 if (!selectBDVAddr12Only(Load->getBasePtr(), ElemV, Base, Disp, Index) || in tryGather()
1273 if (!selectBDVAddr12Only(Store->getBasePtr(), ElemV, Base, Disp, Index) || in tryScatter()
1317 if (LoadNode->getBasePtr() != StoreNode->getBasePtr() || in isFusableLoadOpStorePattern()
1434 if (!selectBDAddr20Only(StoreNode->getBasePtr(), Base, Disp)) in tryFoldLoadStoreIntoMemOperand()
1489 if (SystemZISD::isPCREL(Load->getBasePtr().getOpcode())) in storeLoadCanUseMVC()
1492 if (SystemZISD::isPCREL(Store->getBasePtr().getOpcode())) in storeLoadCanUseMVC()
1512 SDValue BasePtr = MemAccess->getBasePtr(); in storeLoadIsAligned()
H A DSystemZISelLowering.cpp2524 Load->getBasePtr(), Load->getPointerInfo(), in adjustSubwordCmp()
4530 Node->getChain(), Node->getBasePtr(), in lowerATOMIC_LOAD()
4545 Node->getBasePtr(), Node->getMemoryVT(), in lowerATOMIC_STORE()
4595 SDValue Addr = Node->getBasePtr(); in lowerATOMIC_LOAD_OP()
4656 Node->getChain(), Node->getBasePtr(), NegSrc2, in lowerATOMIC_LOAD_SUB()
6925 SN->getBasePtr(), SN->getMemoryVT(), in combineSTORE()
6972 DAG.getStore(SN->getChain(), DL, HiPart, SN->getBasePtr(), in combineSTORE()
6977 DAG.getObjectPtrOffset(DL, SN->getBasePtr(), in combineSTORE()
7059 SN->getBasePtr(), SN->getMemOperand()); in combineSTORE()
7082 LD->getBasePtr() // Ptr in combineVECTOR_SHUFFLE()
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/freebsd/contrib/llvm-project/llvm/lib/Target/MSP430/
H A DMSP430ISelDAGToDAG.cpp348 LD->getBasePtr(), LD->getChain())); in tryIndexedLoad()
364 SDValue Ops0[] = { N2, LD->getBasePtr(), LD->getChain() }; in tryIndexedBinOp()
/freebsd/contrib/llvm-project/llvm/lib/Target/VE/
H A DVEISelLowering.cpp1333 DAG.getLoad(MVT::f64, DL, LdNode->getChain(), LdNode->getBasePtr(), in lowerLoadF128()
1337 EVT AddrVT = LdNode->getBasePtr().getValueType(); in lowerLoadF128()
1338 SDValue HiPtr = DAG.getNode(ISD::ADD, DL, AddrVT, LdNode->getBasePtr(), in lowerLoadF128()
1374 SDValue BasePtr = LdNode->getBasePtr(); in lowerLoadI1()
1437 SDValue BasePtr = LdNode->getBasePtr(); in lowerLOAD()
1474 StNode->getBasePtr(), MachinePointerInfo(), Alignment, in lowerStoreF128()
1477 EVT AddrVT = StNode->getBasePtr().getValueType(); in lowerStoreF128()
1478 SDValue HiPtr = DAG.getNode(ISD::ADD, DL, AddrVT, StNode->getBasePtr(), in lowerStoreF128()
1499 SDValue BasePtr = StNode->getBasePtr(); in lowerStoreI1()
1550 SDValue BasePtr = StNode->getBasePtr(); in lowerSTORE()
H A DVECustomDAG.cpp232 return MemN->getBasePtr(); in getMemoryPtr()
/freebsd/contrib/llvm-project/llvm/lib/Target/AMDGPU/
H A DR600ISelLowering.cpp1039 SDValue BasePtr = Store->getBasePtr(); in lowerPrivateTruncStore()
1111 SDValue Ptr = StoreNode->getBasePtr(); in LowerSTORE()
1270 SDValue BasePtr = Load->getBasePtr(); in lowerPrivateExtLoad()
1332 SDValue Ptr = LoadNode->getBasePtr(); in LowerLOAD()
1673 SDValue Ptr = LoadNode->getBasePtr(); in constBufferLoad()
1932 SDValue Ptr = LoadNode->getBasePtr(); in PerformDAGCombine()
/freebsd/contrib/llvm-project/llvm/lib/Transforms/Scalar/
H A DEarlyCSE.cpp332 GCR->getBasePtr(), GCR->getDerivedPtr()); in getHashValueImpl()
413 GCR1->getBasePtr() == GCR2->getBasePtr() && in isEqualImpl()
/freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonISelDAGToDAG.cpp73 SDValue Base = LD->getBasePtr(); in INITIALIZE_PASS()
470 SDValue Base = ST->getBasePtr(); in SelectIndexedStore()
1011 SDValue LDBasePtr = cast<MemSDNode>(SYNode)->getBasePtr(); in isMemOPCandidate()
1012 SDValue STBasePtr = cast<MemSDNode>(UUse)->getBasePtr(); in isMemOPCandidate()
2307 SDValue BasePtr = cast<MemSDNode>(N)->getBasePtr(); in rebalanceAddressTrees()
H A DHexagonISelLowering.cpp3096 LN->getBasePtr(), LN->getOffset(), LN->getPointerInfo(), in LowerLoad()
3103 if (!validateConstPtrAlignment(LN->getBasePtr(), ClaimAlign, dl, DAG)) in LowerLoad()
3132 SDValue NS = DAG.getTruncStore(SN->getChain(), dl, TR, SN->getBasePtr(), in LowerStore()
3135 NS = DAG.getIndexedStore(NS, dl, SN->getBasePtr(), SN->getOffset(), in LowerStore()
3142 if (!validateConstPtrAlignment(SN->getBasePtr(), ClaimAlign, dl, DAG)) in LowerStore()
3199 SDValue Base = LN->getBasePtr(); in LowerUnalignedLoad()
3821 std::pair<SDValue,int> BO = getBaseAndOffset(L->getBasePtr()); in shouldReduceLoadWidth()
/freebsd/contrib/llvm-project/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp2970 DAG.getLoad(MVT::f64, dl, LdNode->getChain(), LdNode->getBasePtr(), in LowerF128Load()
2972 EVT addrVT = LdNode->getBasePtr().getValueType(); in LowerF128Load()
2974 LdNode->getBasePtr(), in LowerF128Load()
3038 StNode->getBasePtr(), StNode->getPointerInfo(), in LowerF128Store()
3040 EVT addrVT = StNode->getBasePtr().getValueType(); in LowerF128Store()
3042 StNode->getBasePtr(), in LowerF128Store()
3064 St->getChain(), dl, Val, St->getBasePtr(), St->getPointerInfo(), in LowerSTORE()
3663 Ld->getBasePtr(), Ld->getPointerInfo(), MVT::v2i32, in ReplaceNodeResults()
/freebsd/contrib/llvm-project/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp415 SDValue BasePtr = LD->getBasePtr(); in LowerLOAD()
488 SDValue BasePtr = ST->getBasePtr(); in LowerSTORE()
1706 return DAG.getMemmove(Chain, dl, ST->getBasePtr(), LD->getBasePtr(), in PerformDAGCombine()
/freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/
H A DRISCVISelLowering.cpp10027 Ops.push_back(Load->getBasePtr()); in lowerFixedLengthVectorLoadToRVV()
10097 SDValue BasePtr = MemSD->getBasePtr(); in lowerMaskedLoad()
10161 SDValue BasePtr = MemSD->getBasePtr(); in lowerMaskedStore()
11083 SDValue BasePtr = MemSD->getBasePtr(); in lowerMaskedGather()
14866 SDValue P1 = Ld1->getBasePtr(); in performCONCAT_VECTORSCombine()
14867 SDValue P2 = Ld2->getBasePtr(); in performCONCAT_VECTORSCombine()
16504 SDValue Ptr = Ld->getBasePtr(); in getTargetConstantFromLoad()
19613 Ptr = LD->getBasePtr(); in getPreIndexedAddressParts()
19616 Ptr = ST->getBasePtr(); in getPreIndexedAddressParts()
19636 Ptr = LD->getBasePtr(); in getPostIndexedAddressParts()
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/freebsd/contrib/llvm-project/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp6635 SDValue Ptr = LD->getBasePtr(); in LowerAsSplatVectorLoad()
24408 SDValue Ptr0 = Store->getBasePtr(); in splitVectorStore()
31522 SDValue BasePtr = N->getBasePtr(); in LowerMSCATTER()
48283 SDValue Base = Ld->getBasePtr(); in getIndexFromUnindexedLoad()
49978 SDValue Ptr1 = Ld->getBasePtr(); in combineLoad()
50018 SDValue Ptr = Ld->getBasePtr(); in combineLoad()
50145 Addr = MaskedOp->getBasePtr(); in getParamsForOneTrueMaskedElt()
50441 SDValue Ptr0 = St->getBasePtr(); in combineStore()
53329 SDValue Base = GorS->getBasePtr(); in combineGatherScatter()
56460 return Ld->getBasePtr() == St->getBasePtr(); in IsDesirableToPromoteOp()
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H A DX86ISelDAGToDAG.cpp1022 SDValue Ops[] = {MemNode->getChain(), MemNode->getBasePtr()}; in PreprocessISelDAG()
1054 SDValue Ptr = Ld->getBasePtr(); in PreprocessISelDAG()
1060 UserLd->getBasePtr() == Ptr && UserLd->getChain() == Chain && in PreprocessISelDAG()
3390 if (LoadNode->getBasePtr() != StoreNode->getBasePtr() || in isFusableLoadOpStorePattern()
3543 if (!selectAddr(LoadNode, LoadNode->getBasePtr(), Base, Scale, Index, Disp, in foldLoadStoreIntoMemOperand()
6262 if (!selectVectorAddr(Mgt, Mgt->getBasePtr(), IndexOp, Mgt->getScale(), in Select()
6335 if (!selectVectorAddr(Sc, Sc->getBasePtr(), IndexOp, Sc->getScale(), in Select()
/freebsd/contrib/llvm-project/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp3054 Ptr = LD->getBasePtr(); in getPreIndexedAddressParts()
3058 Ptr = ST->getBasePtr(); in getPreIndexedAddressParts()
7911 SDValue BasePtr = LD->getBasePtr(); in LowerLOAD()
7936 SDValue BasePtr = ST->getBasePtr(); in LowerSTORE()
8445 RLI.Ptr = LD->getBasePtr(); in canReuseLoadAddress()
9440 LD->getBasePtr(), // Ptr in LowerBUILD_VECTOR()
11348 SDValue BasePtr = LN->getBasePtr(); in LowerVectorLoad()
13647 SDValue Loc = LS->getBasePtr(); in isConsecutiveLS()
15032 Base = LD->getBasePtr(); in expandVSXLoadForLE()
15099 Base = ST->getBasePtr(); in expandVSXStoreForLE()
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/freebsd/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp5610 SDValue BasePtr = MGT->getBasePtr(); in LowerMGATHER()
5709 SDValue BasePtr = MSC->getBasePtr(); in LowerMSCATTER()
5947 StoreNode->getBasePtr()}, in LowerStore128()
20377 SDValue BasePtr = St.getBasePtr(); in splitStoreSplat()
20747 SDValue BasePtr = S->getBasePtr(); in splitStores()
21279 SDValue BasePtr = LD->getBasePtr(); in performLOADCombine()
21487 SDValue Ptr = ST->getBasePtr(); in performSTORECombine()
24294 Ptr = LD->getBasePtr(); in getPreIndexedAddressParts()
24297 Ptr = ST->getBasePtr(); in getPreIndexedAddressParts()
24314 Ptr = LD->getBasePtr(); in getPostIndexedAddressParts()
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