Home
last modified time | relevance | path

Searched refs:WRITE_DATA_DST_SEL (Results 1 – 15 of 15) sorted by relevance

/netbsd/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
H A Dsi_enums.h155 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dnvd.h91 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dsoc15d.h112 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dvid.h146 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dcikd.h264 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Damdgpu_gfx_v8_0.c904 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v8_0_ring_test_ib()
5183 WRITE_DATA_DST_SEL(0))); in gfx_v8_0_ring_emit_gds_switch()
5191 WRITE_DATA_DST_SEL(0))); in gfx_v8_0_ring_emit_gds_switch()
5199 WRITE_DATA_DST_SEL(0))); in gfx_v8_0_ring_emit_gds_switch()
5207 WRITE_DATA_DST_SEL(0))); in gfx_v8_0_ring_emit_gds_switch()
6375 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v8_0_ring_emit_fence_kiq()
6384 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v8_0_ring_emit_fence_kiq()
7196 WRITE_DATA_DST_SEL(8) | in gfx_v8_0_ring_emit_ce_meta()
7229 WRITE_DATA_DST_SEL(8) | in gfx_v8_0_ring_emit_de_meta()
H A Damdgpu_gfx_v7_0.c3297 WRITE_DATA_DST_SEL(0))); in gfx_v7_0_ring_emit_wreg()
4107 WRITE_DATA_DST_SEL(0))); in gfx_v7_0_ring_emit_gds_switch()
4115 WRITE_DATA_DST_SEL(0))); in gfx_v7_0_ring_emit_gds_switch()
4123 WRITE_DATA_DST_SEL(0))); in gfx_v7_0_ring_emit_gds_switch()
4131 WRITE_DATA_DST_SEL(0))); in gfx_v7_0_ring_emit_gds_switch()
H A Damdgpu_gfx_v9_0.c950 WRITE_DATA_DST_SEL(0) | in gfx_v9_0_write_data_to_reg()
1039 ib.ptr[1] = WRITE_DATA_DST_SEL(5) | WR_CONFIRM; in gfx_v9_0_ring_test_ib()
5176 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v9_0_ring_emit_fence_kiq()
5185 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v9_0_ring_emit_fence_kiq()
5209 WRITE_DATA_DST_SEL(8) | in gfx_v9_0_ring_emit_ce_meta()
5231 WRITE_DATA_DST_SEL(8) | in gfx_v9_0_ring_emit_de_meta()
H A Damdgpu_gfx_v10_0.c430 WRITE_DATA_DST_SEL(0) | (wc ? WR_CONFIRM : 0)); in gfx_v10_0_write_data_to_reg()
4552 WRITE_DATA_DST_SEL(5) | WR_CONFIRM)); in gfx_v10_0_ring_emit_fence_kiq()
4561 WRITE_DATA_DST_SEL(0) | WR_CONFIRM)); in gfx_v10_0_ring_emit_fence_kiq()
4688 WRITE_DATA_DST_SEL(8) | in gfx_v10_0_ring_emit_ce_meta()
4722 WRITE_DATA_DST_SEL(8) | in gfx_v10_0_ring_emit_de_meta()
H A Dsid.h1702 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Damdgpu_gfx_v6_0.c2373 WRITE_DATA_DST_SEL(0))); in gfx_v6_0_ring_emit_wreg()
/netbsd/sys/external/bsd/drm2/dist/drm/radeon/
H A Dsid.h1639 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dradeon_cik.c3769 radeon_ring_write(ring, WRITE_DATA_DST_SEL(1)); in cik_ring_ib_execute()
5712 WRITE_DATA_DST_SEL(0))); in cik_vm_flush()
5726 WRITE_DATA_DST_SEL(0))); in cik_vm_flush()
5733 WRITE_DATA_DST_SEL(0))); in cik_vm_flush()
5744 WRITE_DATA_DST_SEL(0))); in cik_vm_flush()
5755 WRITE_DATA_DST_SEL(0))); in cik_vm_flush()
H A Dcikd.h1730 #define WRITE_DATA_DST_SEL(x) ((x) << 8) macro
H A Dradeon_si.c5089 WRITE_DATA_DST_SEL(0))); in si_vm_flush()
5104 WRITE_DATA_DST_SEL(0))); in si_vm_flush()
5112 WRITE_DATA_DST_SEL(0))); in si_vm_flush()