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Searched refs:MIPS32 (Results 1 – 25 of 55) sorted by relevance

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/openbsd/gnu/llvm/compiler-rt/cmake/Modules/
H A DAllSupportedArchDefs.cmake7 set(MIPS32 mips mipsel) variable
27 ${ARM32} ${ARM64} ${MIPS32} ${MIPS64} ${S390X} ${SPARC} ${SPARCV9}
30 ${MIPS32} ${MIPS64} ${PPC64} ${S390X} ${SPARC} ${SPARCV9} ${HEXAGON}
61 ${MIPS32} ${MIPS64} ${S390X} ${SPARC} ${SPARCV9} ${HEXAGON}
66 ${MIPS32} ${MIPS64} ${PPC64} ${S390X} ${SPARC} ${SPARCV9} ${HEXAGON}
68 set(ALL_SAFESTACK_SUPPORTED_ARCH ${X86} ${X86_64} ${ARM64} ${MIPS32} ${MIPS64}
73 ${MIPS32} ${MIPS64} ${PPC64} ${HEXAGON} ${LOONGARCH64})
77 set(ALL_XRAY_SUPPORTED_ARCH ${X86_64} ${ARM32} ${ARM64} ${MIPS32} ${MIPS64}
/openbsd/usr.bin/file/magdir/
H A Delf60 >>>>36 lelong&0xf0000000 0x50000000 MIPS32
62 >>>>36 lelong&0xf0000000 0x70000000 MIPS32 rel2
71 >>>>48 lelong&0xf0000000 0x50000000 MIPS32
73 >>>>48 lelong&0xf0000000 0x70000000 MIPS32 rel2
192 >>>>36 belong&0xf0000000 0x50000000 MIPS32
194 >>>>36 belong&0xf0000000 0x70000000 MIPS32 rel2
203 >>>>48 belong&0xf0000000 0x50000000 MIPS32
205 >>>>48 belong&0xf0000000 0x70000000 MIPS32 rel2
/openbsd/gnu/llvm/llvm/lib/Target/Mips/
H A DRelocation.txt52 to MIPS32 to compute addresses for the static relocation model.
80 for the difference in the results of instruction execution. On MIPS32,
H A DMips.td89 "Subset of MIPS-III that is also in MIPS32 "
100 "Subset of MIPS-IV that is also in MIPS32 "
H A DMSA.txt52 On MIPS32, the copy_u.d intrinsic will emit this instruction instead of
H A DMips64r6InstrInfo.td306 // MIPS32 arithmetic instructions sign extend their result implicitly.
H A DMipsInstrInfo.td386 // The portions of MIPS-III that were also added to MIPS32
392 // The portions of MIPS-III that were also added to MIPS32 but were removed in
399 // The portions of MIPS-III that were also added to MIPS32
405 // The portions of MIPS-IV that were also added to MIPS32.
411 // The portions of MIPS-IV that were also added to MIPS32 but were removed in
/openbsd/gnu/gcc/gcc/config/mips/
H A D4k.md1 ;; DFA-based pipeline descriptions for MIPS32 4K processor family
6 ;; "MIPS32 4K Processor Core Family Software User's Manual,
H A D5k.md1 ;; DFA-based pipeline descriptions for MIPS32 5K processor family
H A D24k.md9 ;; "MIPS32 24K Processor Core Family Software User's Manual, Rev 3.04."
/openbsd/gnu/llvm/compiler-rt/cmake/
H A Dbuiltin-config-ix.cmake38 set(MIPS32 mips mipsel) variable
58 ${HEXAGON} ${MIPS32} ${MIPS64} ${PPC32} ${PPC64}
/openbsd/gnu/usr.bin/binutils/gas/doc/
H A Dc-mips.texi18 different @sc{mips} processors, and MIPS ISA levels I through V, MIPS32,
79 @sc{MIPS V}, @sc{MIPS32}, @sc{MIPS32 Release 2}, @sc{MIPS64},
/openbsd/gnu/llvm/llvm/include/llvm/DebugInfo/CodeView/
H A DCodeView.h86 MIPS32 = 0x12, enumerator
/openbsd/gnu/usr.bin/binutils/opcodes/
H A DChangeLog-00011325 for MIPS32 support, and clean up existing entries for
1326 aesthetics, consistency with the MIPS32 ISA, and
1341 Enable "ssnop" for MIPS32. Add "break" variant with 20 bit
1342 code for MIPS32. Update "clo" and "clz" to use 'U' operand
1344 "mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32. Update
1345 MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32
1352 MIPS32.
1457 Add msub and msubu instructions for MIPS32.
1458 Add madd/maddu aliases for mad/madu for MIPS32.
1459 Support wait, deret, eret, movn, pref for MIPS32.
/openbsd/gnu/usr.bin/binutils-2.17/opcodes/
H A DChangeLog-00011325 for MIPS32 support, and clean up existing entries for
1326 aesthetics, consistency with the MIPS32 ISA, and
1341 Enable "ssnop" for MIPS32. Add "break" variant with 20 bit
1342 code for MIPS32. Update "clo" and "clz" to use 'U' operand
1344 "mfc2," "mfc3," "mtc1," "mtc2," and "mtc3" for MIPS32. Update
1345 MIPS32 "sdbbp" to use 'B' operand specifier. Add MIPS32
1352 MIPS32.
1457 Add msub and msubu instructions for MIPS32.
1458 Add madd/maddu aliases for mad/madu for MIPS32.
1459 Support wait, deret, eret, movn, pref for MIPS32.
H A DChangeLog-2004346 * mips-opc.c (mips_builtin_opcodes): Remove the MIPS32
/openbsd/gnu/usr.bin/binutils-2.17/gas/doc/
H A Dc-mips.texi18 different @sc{mips} processors, and MIPS ISA levels I through V, MIPS32,
80 @sc{MIPS V}, @sc{MIPS32}, @sc{MIPS32 Release 2}, @sc{MIPS64},
/openbsd/gnu/llvm/llvm/lib/DebugInfo/CodeView/
H A DEnumTables.cpp155 CV_ENUM_CLASS_ENT(CPUType, MIPS32),
/openbsd/gnu/usr.bin/binutils/binutils/
H A DNEWS91 * Support for the MIPS32, by Anders Norlander.
H A DChangeLog-00011122 * readelf.c (get_machine_flags): Recognize MIPS32 ISA in
1234 * NEWS: Mention support for MIPS32.
/openbsd/gnu/usr.bin/binutils-2.17/binutils/
H A DNEWS152 * Support for the MIPS32, by Anders Norlander.
/openbsd/gnu/usr.bin/binutils/gas/
H A DNEWS39 * Added support for MIPS32 Release 2.
H A DChangeLog372 so that MIPS32, MIPS64 and later ISAs are included, along with
/openbsd/gnu/llvm/llvm/tools/llvm-pdbutil/
H A DMinimalSymbolDumper.cpp229 RETURN_CASE(CPUType, MIPS32, "mips-32"); in formatMachineType()
/openbsd/gnu/usr.bin/binutils-2.17/gas/
H A DNEWS109 * Added support for MIPS32 Release 2.

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