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Searched refs:RB_RPTR_WR_ENA (Results 1 – 12 of 12) sorted by relevance

/openbsd/sys/dev/pci/drm/radeon/
H A Dni.c1703 WREG32_P(cp_rb_cntl[i], RB_RPTR_WR_ENA, ~RB_RPTR_WR_ENA); in cayman_cp_resume()
1710 WREG32_P(cp_rb_cntl[i], 0, ~RB_RPTR_WR_ENA); in cayman_cp_resume()
H A Drv770d.h353 #define RB_RPTR_WR_ENA (1 << 31) macro
H A Dnid.h488 #define RB_RPTR_WR_ENA (1 << 31) macro
H A Dsid.h1251 #define RB_RPTR_WR_ENA (1 << 31) macro
H A Dcikd.h1307 #define RB_RPTR_WR_ENA (1 << 31) macro
H A Dsi.c3676 WREG32(CP_RB0_CNTL, tmp | RB_RPTR_WR_ENA); in si_cp_resume()
3707 WREG32(CP_RB1_CNTL, tmp | RB_RPTR_WR_ENA); in si_cp_resume()
3731 WREG32(CP_RB2_CNTL, tmp | RB_RPTR_WR_ENA); in si_cp_resume()
H A Devergreend.h480 #define RB_RPTR_WR_ENA (1 << 31) macro
H A Dr600d.h199 #define RB_RPTR_WR_ENA (1 << 31) macro
H A Dr600.c2742 WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA); in r600_cp_resume()
H A Devergreen.c3098 WREG32(CP_RB_CNTL, tmp | RB_RPTR_WR_ENA); in evergreen_cp_resume()
H A Dcik.c4077 WREG32(CP_RB0_CNTL, tmp | RB_RPTR_WR_ENA); in cik_cp_gfx_resume()
/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Dsid.h1279 #define RB_RPTR_WR_ENA (1 << 31) macro