Home
last modified time | relevance | path

Searched refs:TRAP_ENABLE (Results 1 – 18 of 18) sorted by relevance

/openbsd/sys/dev/pci/drm/amd/amdgpu/
H A Damdgpu_si_dma.c597 sdma_cntl &= ~TRAP_ENABLE; in si_dma_set_trap_irq_state()
602 sdma_cntl |= TRAP_ENABLE; in si_dma_set_trap_irq_state()
613 sdma_cntl &= ~TRAP_ENABLE; in si_dma_set_trap_irq_state()
618 sdma_cntl |= TRAP_ENABLE; in si_dma_set_trap_irq_state()
H A Dsdma_v2_4.c1007 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v2_4_set_trap_irq_state()
1012 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v2_4_set_trap_irq_state()
1023 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v2_4_set_trap_irq_state()
1028 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v2_4_set_trap_irq_state()
H A Dsdma_v3_0.c1341 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v3_0_set_trap_irq_state()
1346 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v3_0_set_trap_irq_state()
1357 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 0); in sdma_v3_0_set_trap_irq_state()
1362 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, 1); in sdma_v3_0_set_trap_irq_state()
H A Dsid.h1898 # define TRAP_ENABLE (1 << 0) macro
H A Dsdma_v6_0.c1460 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, in sdma_v6_0_set_trap_irq_state()
H A Dsdma_v5_2.c1415 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, in sdma_v5_2_set_trap_irq_state()
H A Dsdma_v5_0.c1555 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, in sdma_v5_0_set_trap_irq_state()
H A Dsdma_v4_4_2.c1520 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA_CNTL, TRAP_ENABLE, in sdma_v4_4_2_set_trap_irq_state()
H A Dsdma_v4_0.c2019 sdma_cntl = REG_SET_FIELD(sdma_cntl, SDMA0_CNTL, TRAP_ENABLE, in sdma_v4_0_set_trap_irq_state()
/openbsd/sys/dev/pci/drm/radeon/
H A Devergreen.c4470 tmp = RREG32(CAYMAN_DMA1_CNTL) & ~TRAP_ENABLE; in evergreen_disable_interrupt_state()
4474 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in evergreen_disable_interrupt_state()
4521 dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in evergreen_irq_set()
4547 dma_cntl |= TRAP_ENABLE; in evergreen_irq_set()
4551 dma_cntl1 = RREG32(CAYMAN_DMA1_CNTL) & ~TRAP_ENABLE; in evergreen_irq_set()
4554 dma_cntl1 |= TRAP_ENABLE; in evergreen_irq_set()
H A Dsi.c5957 tmp = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_disable_interrupt_state()
5959 tmp = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_disable_interrupt_state()
6073 dma_cntl = RREG32(DMA_CNTL + DMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_irq_set()
6074 dma_cntl1 = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in si_irq_set()
6094 dma_cntl |= TRAP_ENABLE; in si_irq_set()
6099 dma_cntl1 |= TRAP_ENABLE; in si_irq_set()
H A Dnid.h1324 # define TRAP_ENABLE (1 << 0) macro
H A Dsid.h1834 # define TRAP_ENABLE (1 << 0) macro
H A Dcik.c6863 tmp = RREG32(SDMA0_CNTL + SDMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in cik_disable_interrupt_state()
6865 tmp = RREG32(SDMA0_CNTL + SDMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in cik_disable_interrupt_state()
7048 dma_cntl = RREG32(SDMA0_CNTL + SDMA0_REGISTER_OFFSET) & ~TRAP_ENABLE; in cik_irq_set()
7049 dma_cntl1 = RREG32(SDMA0_CNTL + SDMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; in cik_irq_set()
7154 dma_cntl |= TRAP_ENABLE; in cik_irq_set()
7159 dma_cntl1 |= TRAP_ENABLE; in cik_irq_set()
H A Dcikd.h1961 # define TRAP_ENABLE (1 << 0) macro
H A Dr600.c3623 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in r600_disable_interrupt_state()
3805 dma_cntl = RREG32(DMA_CNTL) & ~TRAP_ENABLE; in r600_irq_set()
3827 dma_cntl |= TRAP_ENABLE; in r600_irq_set()
H A Devergreend.h1405 # define TRAP_ENABLE (1 << 0) macro
H A Dr600d.h632 # define TRAP_ENABLE (1 << 0) macro