/qemu/target/arm/tcg/ |
H A D | sve_ldst_internal.h | 93 #define DO_ST_PRIM_2(NAME, H, TE, TM, ST) \ argument 94 DO_ST_HOST(st1##NAME##_be, H, TE, TM, ST##_be_p) \ 95 DO_ST_HOST(st1##NAME##_le, H, TE, TM, ST##_le_p) \ 96 DO_ST_TLB(st1##NAME##_be, H, TE, TM, cpu_##ST##_be_data_ra) \ 97 DO_ST_TLB(st1##NAME##_le, H, TE, TM, cpu_##ST##_le_data_ra)
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H A D | sve_helper.c | 4915 #define DO_FCMGE(TYPE, X, Y, ST) TYPE##_compare(Y, X, ST) <= 0 argument 4916 #define DO_FCMGT(TYPE, X, Y, ST) TYPE##_compare(Y, X, ST) < 0 argument 4917 #define DO_FCMLE(TYPE, X, Y, ST) TYPE##_compare(X, Y, ST) <= 0 argument 4918 #define DO_FCMLT(TYPE, X, Y, ST) TYPE##_compare(X, Y, ST) < 0 argument 4919 #define DO_FCMEQ(TYPE, X, Y, ST) TYPE##_compare_quiet(X, Y, ST) == 0 argument 4920 #define DO_FCMNE(TYPE, X, Y, ST) TYPE##_compare_quiet(X, Y, ST) != 0 argument 4921 #define DO_FCMUO(TYPE, X, Y, ST) \ argument 4923 #define DO_FACGE(TYPE, X, Y, ST) \ argument 4924 TYPE##_compare(TYPE##_abs(Y), TYPE##_abs(X), ST) <= 0 4925 #define DO_FACGT(TYPE, X, Y, ST) \ argument [all …]
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H A D | translate-mve.c | 203 #define DO_VLDST_WIDE_NARROW(OP, SLD, ULD, ST, MSIZE) \ argument 207 { gen_helper_mve_##ST, gen_helper_mve_##SLD }, \
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H A D | cpu64.c | 1229 t = FIELD_DP64(t, ID_AA64MMFR2, ST, 1); /* FEAT_TTST */ in aarch64_max_tcg_initfn()
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/qemu/tests/tcg/i386/ |
H A D | x86.csv | 585 "FADD ST(i), ST(0)","FADDD ST(0), ST(i)","fadd ST(0), ST(i)","DC C0+i","V","V","","","rw,r","Y","" 586 "FADD ST(0), ST(i)","FADDD ST(i), ST(0)","fadd ST(i), ST(0)","D8 C0+i","V","V","","","rw,r","Y","" 604 "FCOM ST(0), ST(i)","FCOMD ST(i), ST(0)","fcom ST(i), ST(0)","D8 D0+i","V","V","","","r,r","Y","" 605 "FCOM ST(0), ST(i)","FCOMD ST(i), ST(0)","fcom ST(i), ST(0)","DC D0+i","V","V","","","r,r","Y","" 665 "FLD ST(0), ST(i)","FLD ST(i), ST(0)","fld ST(i), ST(0)","D9 C0+i","V","V","","","w,r","Y","" 679 "FMUL ST(i), ST(0)","FMUL ST(0), ST(i)","fmul ST(0), ST(i)","DC C8+i","V","V","","","rw,r","Y","" 680 "FMUL ST(0), ST(i)","FMUL ST(i), ST(0)","fmul ST(i), ST(0)","D8 C8+i","V","V","","","rw,r","Y","" 708 "FST ST(i), ST(0)","FST ST(0), ST(i)","fst ST(0), ST(i)","DD D0+i","V","V","","","w,r","Y","" 712 "FSTP ST(i), ST(0)","FSTP ST(0), ST(i)","fstp ST(0), ST(i)","DD D8+i","V","V","","","w,r","Y","" 713 "FSTP ST(i), ST(0)","FSTP ST(0), ST(i)","fstp ST(0), ST(i)","DF D0+i","V","V","","","w,r","Y","" [all …]
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/qemu/target/i386/tcg/ |
H A D | fpu_helper.c | 36 #define ST1 ST(1) 439 FT0 = ST(st_index); in helper_fmov_FT0_STN() 444 ST0 = ST(st_index); in helper_fmov_ST0_STN() 556 ST(st_index) = floatx80_add(ST(st_index), ST0, &env->fp_status); in helper_fadd_STN_ST0() 563 ST(st_index) = floatx80_mul(ST(st_index), ST0, &env->fp_status); in helper_fmul_STN_ST0() 570 ST(st_index) = floatx80_sub(ST(st_index), ST0, &env->fp_status); in helper_fsub_STN_ST0() 577 ST(st_index) = floatx80_sub(ST0, ST(st_index), &env->fp_status); in helper_fsubr_STN_ST0() 585 p = &ST(st_index); in helper_fdiv_STN_ST0() 593 p = &ST(st_index); in helper_fdivr_STN_ST0() 2508 ST(i) = tmp; in do_frstor() [all …]
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/qemu/target/hexagon/imported/ |
H A D | iclass.def | 29 DEF_PP_ICLASS32(ST,01,LDST) /* 10 */
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H A D | encode_pp.def | 65 /* V2 PREDICATED LD/ST */ 121 /* V2 GP-RELATIVE LD/ST */ 420 DEF_CLASS32(ICLASS_ST" ---- -------- PP------ --------",ST)
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H A D | ldst.idef | 345 /* V2 GP-relative LD/ST */
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/qemu/docs/system/ |
H A D | authz.rst | 215 CN=laptop.berrange.com,O=Berrange Home,L=London,ST=London,C=GB 253 echo "CN=laptop.qemu.org,O=QEMU Project,L=London,ST=London,C=GB" >> tls.acl
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/qemu/target/mips/tcg/ |
H A D | msa.decode | 258 ST 011110 .......... ..... ..... 1001 .. @ldst
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H A D | msa_translate.c | 779 TRANS_DF_iv(ST, trans_msa_ldst, gen_helper_msa_st);
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H A D | micromips_translate.c.inc | 371 /* POOL32C ST-EVA encoding of minor opcode field (bits 11..9) */
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/qemu/target/xtensa/ |
H A D | xtensa-isa.c | 1426 #define CHECK_STATE(INTISA, ST, ERRVAL) \ argument 1428 if ((ST) < 0 || (ST) >= (INTISA)->num_states) { \
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/qemu/target/hexagon/ |
H A D | attribs_def.h.inc | 166 DEF_ATTRIB(NOTE_NVSLOT0, "Can execute only in slot 0 (ST)", "", "")
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/qemu/docs/system/arm/ |
H A D | emulation.rst | 183 - ST (System Timer Extension)
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/qemu/target/sh4/ |
H A D | translate.c | 1419 #define ST(reg,stnum,stpnum,prechk) \ in _decode_opc() macro 1436 ST(reg,stnum,stpnum,prechk) in _decode_opc() 1441 ST(sgr, 0x003a, 0x4032, CHECK_PRIVILEGED) in _decode_opc()
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/qemu/docs/tools/ |
H A D | qemu-nbd.rst | 238 O=Example Org,,L=London,,ST=London,,C=GB' \
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/qemu/target/arm/ |
H A D | cpu-features.h | 821 return FIELD_EX64(id->id_aa64mmfr2, ID_AA64MMFR2, ST) != 0; in isar_feature_aa64_st()
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H A D | cpu.h | 2208 FIELD(ID_AA64MMFR2, ST, 28, 4)
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/qemu/hw/net/ |
H A D | cadence_gem.c | 201 FIELD(PHYMNTNC, ST, 30, 2)
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/qemu/target/ppc/translate/ |
H A D | vmx-impl.c.inc | 1721 * AB.BC.CD.DE.EF.FG.GH.HI.IJ.JK.KL.LM.MN.NO.OP.PQ.QR.RS.ST.TU.UV.V 1723 * AB....CD....EF....GH....IJ....KL....MN....OP....QR....ST....UV.. 1725 * ..CD....EF....GH....IJ....KL....MN....OP....QR....ST....UV......
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/qemu/tcg/loongarch64/ |
H A D | tcg-target.c.inc | 1177 /* Otherwise use a pair of LD/ST. */
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/qemu/target/s390x/tcg/ |
H A D | insn-data.h.inc | 848 D(0x5000, ST, RX_a, Z, r1_o, a2, 0, 0, st32, 0, 0)
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/qemu/tcg/s390x/ |
H A D | tcg-target.c.inc | 1783 tcg_out_insn(s, RX, ST, data, h.base, h.index, h.disp);
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