| /dports/astro/py-pykep/pykep-2.6/doc/sphinx/examples/ |
| H A D | all.tle | 29525 1 31766U 99025CFR 20144.25492366 -.00000239 +00000-0 -12065-3 0 9999
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| /dports/astro/pykep/pykep-2.6/doc/sphinx/examples/ |
| H A D | all.tle | 29525 1 31766U 99025CFR 20144.25492366 -.00000239 +00000-0 -12065-3 0 9999
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| /dports/astro/weather/weather-2.4.2/ |
| H A D | airports.csv | 37724 …ort",49.173302,-0.45,256,"EU","FR","FR-NOR","Caen/Carpiquet","yes","LFRK","CFR",,"https://www.caen…
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| /dports/astro/xtide/harmonics-dwf-20210110/ |
| H A D | ChangeLog | 214 Hawaii-Aleutian Standard Time." The 2003 CFR do not clearly address
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f0xx/ |
| H A D | stm32f0xx.h | 996 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f10x/ |
| H A D | stm32f10x.h | 1055 __IO uint32_t CFR; member
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f37x/ |
| H A D | stm32f37x.h | 828 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f4xx/ |
| H A D | stm32f4xx.h | 1735 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_g4xx/ |
| H A D | stm32g431xx.h | 386 …__IO uint32_t CFR; /*!< DMA Channel Clear Flag Register Address offset: 0x00… member
865 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
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| H A D | stm32g441xx.h | 387 …__IO uint32_t CFR; /*!< DMA Channel Clear Flag Register Address offset: 0x00… member
866 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
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| H A D | stm32g471xx.h | 398 …__IO uint32_t CFR; /*!< DMA Channel Clear Flag Register Address offset: 0x00… member
899 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
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| H A D | stm32g473xx.h | 409 …__IO uint32_t CFR; /*!< DMA Channel Clear Flag Register Address offset: 0x00… member
962 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
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| H A D | stm32g474xx.h | 417 …__IO uint32_t CFR; /*!< DMA Channel Clear Flag Register Address offset: 0x00… member
970 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
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| H A D | stm32g483xx.h | 410 …__IO uint32_t CFR; /*!< DMA Channel Clear Flag Register Address offset: 0x00… member
963 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
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| H A D | stm32g484xx.h | 418 …__IO uint32_t CFR; /*!< DMA Channel Clear Flag Register Address offset: 0x00… member
971 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
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| H A D | stm32gbk1cb.h | 385 …__IO uint32_t CFR; /*!< DMA Channel Clear Flag Register Address offset: 0x00… member
855 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_h7xx/ |
| H A D | stm32h743xx.h | 602 __IO uint32_t CFR; /*!< DMA Channel Clear Flag Register */ member
1130 …__IO uint32_t CFR; /*!< JPEG Clear Flag Register (JPEG_CFR), Address offs… member
1625 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
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| H A D | stm32h753xx.h | 603 __IO uint32_t CFR; /*!< DMA Channel Clear Flag Register */ member
1131 …__IO uint32_t CFR; /*!< JPEG Clear Flag Register (JPEG_CFR), Address offs… member
1626 __IO uint32_t CFR; /*!< WWDG Configuration register, Address offset: 0x04 */ member
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F0xx_StdPeriph_Driver/src/ |
| H A D | stm32f0xx_wwdg.c | 154 tmpreg = WWDG->CFR & CFR_WDGTB_MASK; in WWDG_SetPrescaler()
158 WWDG->CFR = tmpreg; in WWDG_SetPrescaler()
175 tmpreg = WWDG->CFR & CFR_W_MASK; in WWDG_SetWindowValue()
181 WWDG->CFR = tmpreg; in WWDG_SetWindowValue()
192 WWDG->CFR |= WWDG_CFR_EWI; in WWDG_EnableIT()
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F10x_StdPeriph_Driver/src/ |
| H A D | stm32f10x_wwdg.c | 123 tmpreg = WWDG->CFR & CFR_WDGTB_Mask; in WWDG_SetPrescaler()
127 WWDG->CFR = tmpreg; in WWDG_SetPrescaler()
144 tmpreg = WWDG->CFR & CFR_W_Mask; in WWDG_SetWindowValue()
150 WWDG->CFR = tmpreg; in WWDG_SetWindowValue()
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F37x_StdPeriph_Driver/src/ |
| H A D | stm32f37x_wwdg.c | 164 tmpreg = WWDG->CFR & CFR_WDGTB_MASK; in WWDG_SetPrescaler()
168 WWDG->CFR = tmpreg; in WWDG_SetPrescaler()
185 tmpreg = WWDG->CFR & CFR_W_MASK; in WWDG_SetWindowValue()
191 WWDG->CFR = tmpreg; in WWDG_SetWindowValue()
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/src/ |
| H A D | stm32f4xx_wwdg.c | 160 tmpreg = WWDG->CFR & CFR_WDGTB_MASK; in WWDG_SetPrescaler()
164 WWDG->CFR = tmpreg; in WWDG_SetPrescaler()
181 tmpreg = WWDG->CFR & CFR_W_MASK; in WWDG_SetWindowValue()
187 WWDG->CFR = tmpreg; in WWDG_SetWindowValue()
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32G4xx_HAL_Driver/inc/ |
| H A D | stm32g4xx_ll_dmamux.h | 1596 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF0); in LL_DMAMUX_ClearFlag_SO0()
1608 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF1); in LL_DMAMUX_ClearFlag_SO1()
1620 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF2); in LL_DMAMUX_ClearFlag_SO2()
1632 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF3); in LL_DMAMUX_ClearFlag_SO3()
1644 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF4); in LL_DMAMUX_ClearFlag_SO4()
1656 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF5); in LL_DMAMUX_ClearFlag_SO5()
1668 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF6); in LL_DMAMUX_ClearFlag_SO6()
1680 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF7); in LL_DMAMUX_ClearFlag_SO7()
1692 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF8); in LL_DMAMUX_ClearFlag_SO8()
1704 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF9); in LL_DMAMUX_ClearFlag_SO9()
[all …]
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| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32G4xx_HAL_Driver/src/ |
| H A D | stm32g4xx_hal_dma.c | 223 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_Init()
307 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_DeInit()
517 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_Abort()
576 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_Abort_IT()
708 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMA_PollForTransfer()
1005 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in DMA_SetConfig()
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| H A D | stm32g4xx_hal_dma_ex.c | 247 hdma->DMAmuxChannelStatus->CFR = hdma->DMAmuxChannelStatusMask; in HAL_DMAEx_MUX_IRQHandler()
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