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Searched refs:__ARG1 (Results 1 – 25 of 34) sorted by path

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/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f0xx/
H A Dcore_cmInstr.h633 uint32_t __RES, __ARG1 = (ARG1); \
634 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
649 uint32_t __RES, __ARG1 = (ARG1); \
650 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f37x/
H A Dcore_cm4_simd.h450 uint32_t __RES, __ARG1 = (ARG1); \
451 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
457 uint32_t __RES, __ARG1 = (ARG1); \
458 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
574 …uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32…
581 …uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32…
612 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
613 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
619 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
621 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
[all …]
H A Dcore_cmInstr.h563 uint32_t __RES, __ARG1 = (ARG1); \
564 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
579 uint32_t __RES, __ARG1 = (ARG1); \
580 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_f4xx/
H A Dcore_cmInstr.h696 uint32_t __RES, __ARG1 = (ARG1); \
697 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
712 uint32_t __RES, __ARG1 = (ARG1); \
713 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
H A Dcore_cmSimd.h443 uint32_t __RES, __ARG1 = (ARG1); \
444 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
450 uint32_t __RES, __ARG1 = (ARG1); \
451 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
645 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
646 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
652 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
654 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
656 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_g4xx/
H A Dcore_cmInstr.h696 uint32_t __RES, __ARG1 = (ARG1); \
697 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
712 uint32_t __RES, __ARG1 = (ARG1); \
713 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
H A Dcore_cmSimd.h443 uint32_t __RES, __ARG1 = (ARG1); \
444 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
450 uint32_t __RES, __ARG1 = (ARG1); \
451 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
645 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
646 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
652 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
654 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
656 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/CMSIS/CM3_h7xx/
H A Dcmsis_gcc.h1156 int32_t __RES, __ARG1 = (ARG1); \
1157 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1172 uint32_t __RES, __ARG1 = (ARG1); \
1173 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1846 int32_t __RES, __ARG1 = (ARG1); \
1847 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1853 uint32_t __RES, __ARG1 = (ARG1); \
1854 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
2049 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
2056 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
[all …]
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f30x/
H A Dcore_cmInstr.h696 uint32_t __RES, __ARG1 = (ARG1); \
697 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
712 uint32_t __RES, __ARG1 = (ARG1); \
713 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
H A Dcore_cmSimd.h443 uint32_t __RES, __ARG1 = (ARG1); \
444 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
450 uint32_t __RES, __ARG1 = (ARG1); \
451 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
645 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
646 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
652 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
654 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
656 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f37x/
H A Dcore_cm4_simd.h450 uint32_t __RES, __ARG1 = (ARG1); \
451 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
457 uint32_t __RES, __ARG1 = (ARG1); \
458 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
574 …uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32…
581 …uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32…
612 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
613 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
619 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
621 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
[all …]
H A Dcore_cmInstr.h563 uint32_t __RES, __ARG1 = (ARG1); \
564 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
579 uint32_t __RES, __ARG1 = (ARG1); \
580 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
/dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/CMSIS/CM3_f4xx/
H A Dcore_cm4_simd.h502 uint32_t __RES, __ARG1 = (ARG1); \
503 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
509 uint32_t __RES, __ARG1 = (ARG1); \
510 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
626 …uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32…
633 …uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32…
664 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
665 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
671 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
673 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
[all …]
H A Dcore_cmInstr.h696 uint32_t __RES, __ARG1 = (ARG1); \
697 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
712 uint32_t __RES, __ARG1 = (ARG1); \
713 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
H A Dcore_cmSimd.h443 uint32_t __RES, __ARG1 = (ARG1); \
444 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
450 uint32_t __RES, __ARG1 = (ARG1); \
451 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
645 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
646 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
652 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
654 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
656 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
/dports/devel/arduino-core/Arduino-b439a77/hardware/arduino/sam/system/CMSIS/CMSIS/Include/
H A Dcore_cm4_simd.h502 uint32_t __RES, __ARG1 = (ARG1); \
503 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
509 uint32_t __RES, __ARG1 = (ARG1); \
510 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
626 …uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32…
633 …uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32…
664 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
665 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
671 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
673 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
[all …]
H A Dcore_cmInstr.h530 uint32_t __RES, __ARG1 = (ARG1); \
531 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
546 uint32_t __RES, __ARG1 = (ARG1); \
547 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
/dports/devel/py-cle/binaries-9.0.5405/tests_src/i2c_master_read-nucleol152re/mbed/TARGET_NUCLEO_L152RE/
H A Dcore_cm4_simd.h466 uint32_t __RES, __ARG1 = (ARG1); \
467 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
473 uint32_t __RES, __ARG1 = (ARG1); \
474 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
590 …uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32…
597 …uint32_t __ARG1 = (ARG1), __ARG2 = (ARG2), __ARG3_H = (uint32_t)((ARG3) >> 32), __ARG3_L = (uint32…
628 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
629 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
635 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
637 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
[all …]
H A Dcore_cmInstr.h747 uint32_t __RES, __ARG1 = (ARG1); \
748 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
763 uint32_t __RES, __ARG1 = (ARG1); \
764 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
H A Dcore_cmSimd.h443 uint32_t __RES, __ARG1 = (ARG1); \
444 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
450 uint32_t __RES, __ARG1 = (ARG1); \
451 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
645 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
646 __ASM ("pkhbt %0, %1, %2, lsl %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
652 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
654 __ASM ("pkhtb %0, %1, %2" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2) ); \
656 __ASM ("pkhtb %0, %1, %2, asr %3" : "=r" (__RES) : "r" (__ARG1), "r" (__ARG2), "I" (ARG3) ); \
/dports/devel/tinygo/tinygo-0.14.1/lib/CMSIS/CMSIS/Include/
H A Dcmsis_armcc_V6.h985 int32_t __RES, __ARG1 = (ARG1); \
986 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1002 uint32_t __RES, __ARG1 = (ARG1); \
1003 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1571 uint32_t __RES, __ARG1 = (ARG1); \
1572 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1578 uint32_t __RES, __ARG1 = (ARG1); \
1579 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1773 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
1780 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
[all …]
H A Dcmsis_gcc.h688 uint32_t __RES, __ARG1 = (ARG1); \
689 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
703 uint32_t __RES, __ARG1 = (ARG1); \
704 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1140 int32_t __RES, __ARG1 = (ARG1); \
1141 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1147 uint32_t __RES, __ARG1 = (ARG1); \
1148 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1342 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
1349 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
[all …]
/dports/devel/z88dk/z88dk/libsrc/target/cpm/cpm/
H A Dexecl.asm282 __ARG1: DEFS 2 label
/dports/lang/micropython/micropython-1.17/lib/cmsis/inc/
H A Dcmsis_armclang_ltm.h1648 int32_t __RES, __ARG1 = (ARG1); \
1649 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1655 uint32_t __RES, __ARG1 = (ARG1); \
1656 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
H A Dcmsis_gcc.h1172 int32_t __RES, __ARG1 = (ARG1); \
1173 __ASM ("ssat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1188 uint32_t __RES, __ARG1 = (ARG1); \
1189 __ASM ("usat %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1862 int32_t __RES, __ARG1 = (ARG1); \
1863 __ASM ("ssat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
1869 uint32_t __RES, __ARG1 = (ARG1); \
1870 __ASM ("usat16 %0, %1, %2" : "=r" (__RES) : "I" (ARG2), "r" (__ARG1) ); \
2065 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
2072 uint32_t __RES, __ARG1 = (ARG1), __ARG2 = (ARG2); \
[all …]

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