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Searched refs:mvdd (Results 1 – 25 of 25) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/smumgr/
H A Dvegam_smumgr.c608 *voltage = *mvdd = 0; in vegam_get_dependency_volt_by_clk()
633 *mvdd = data->vbios_boot_state.mvdd_bootup_value * in vegam_get_dependency_volt_by_clk()
635 else if (dep_table->entries[i].mvdd) in vegam_get_dependency_volt_by_clk()
636 *mvdd = (uint32_t) dep_table->entries[i].mvdd * in vegam_get_dependency_volt_by_clk()
663 else if (dep_table->entries[i].mvdd) in vegam_get_dependency_volt_by_clk()
664 *mvdd = (uint32_t) dep_table->entries[i - 1].mvdd * VOLTAGE_SCALE; in vegam_get_dependency_volt_by_clk()
814 uint32_t mvdd; in vegam_populate_single_graphic_level() local
825 &level->MinVoltage, &mvdd); in vegam_populate_single_graphic_level()
1118 uint32_t mvdd; in vegam_populate_smc_acpi_level() local
1129 &table->ACPILevel.MinVoltage, &mvdd); in vegam_populate_smc_acpi_level()
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H A Dfiji_smumgr.c366 uint32_t clock, uint32_t *voltage, uint32_t *mvdd) in fiji_get_dependency_volt_by_clk() argument
371 *voltage = *mvdd = 0; in fiji_get_dependency_volt_by_clk()
397 *mvdd = data->vbios_boot_state.mvdd_bootup_value * in fiji_get_dependency_volt_by_clk()
399 else if (dep_table->entries[i].mvdd) in fiji_get_dependency_volt_by_clk()
400 *mvdd = (uint32_t) dep_table->entries[i].mvdd * in fiji_get_dependency_volt_by_clk()
423 else if (dep_table->entries[i].mvdd) in fiji_get_dependency_volt_by_clk()
424 *mvdd = (uint32_t) dep_table->entries[i - 1].mvdd * VOLTAGE_SCALE; in fiji_get_dependency_volt_by_clk()
953 uint32_t threshold, mvdd; in fiji_populate_single_graphic_level() local
969 (uint32_t *)(&level->MinVoltage), &mvdd); in fiji_populate_single_graphic_level()
1318 uint32_t mvdd; in fiji_populate_smc_acpi_level() local
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H A Dpolaris10_smumgr.c359 *voltage = *mvdd = 0; in polaris10_get_dependency_volt_by_clk()
384 *mvdd = data->vbios_boot_state.mvdd_bootup_value * in polaris10_get_dependency_volt_by_clk()
386 else if (dep_table->entries[i].mvdd) in polaris10_get_dependency_volt_by_clk()
387 *mvdd = (uint32_t) dep_table->entries[i].mvdd * in polaris10_get_dependency_volt_by_clk()
410 else if (dep_table->entries[i].mvdd) in polaris10_get_dependency_volt_by_clk()
411 *mvdd = (uint32_t) dep_table->entries[i - 1].mvdd * VOLTAGE_SCALE; in polaris10_get_dependency_volt_by_clk()
910 uint32_t mvdd; in polaris10_populate_single_graphic_level() local
927 &level->MinVoltage, &mvdd); in polaris10_populate_single_graphic_level()
1206 uint32_t mvdd; in polaris10_populate_smc_acpi_level() local
1216 &table->ACPILevel.MinVoltage, &mvdd); in polaris10_populate_smc_acpi_level()
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H A Dtonga_smumgr.c238 uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) in tonga_get_dependency_volt_by_clk() argument
268 if (allowed_clock_voltage_table->entries[i].mvdd) in tonga_get_dependency_volt_by_clk()
269 *mvdd = (uint32_t) allowed_clock_voltage_table->entries[i].mvdd; in tonga_get_dependency_volt_by_clk()
286 if (allowed_clock_voltage_table->entries[i-1].mvdd) in tonga_get_dependency_volt_by_clk()
287 *mvdd = (uint32_t) allowed_clock_voltage_table->entries[i-1].mvdd; in tonga_get_dependency_volt_by_clk()
611 uint32_t mvdd; in tonga_populate_single_graphic_level() local
627 &graphic_level->MinVoltage, &mvdd); in tonga_populate_single_graphic_level()
965 uint32_t mvdd = 0; in tonga_populate_single_memory_level() local
976 &memory_level->MinVoltage, &mvdd); in tonga_populate_single_memory_level()
987 memory_level->MinMvdd = mvdd; in tonga_populate_single_memory_level()
/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H A Dhwmgr_ppt.h40 uint16_t mvdd; member
H A Dsmu_helper.c217 vol_table->entries[i].value = dep_table->entries[i].mvdd; in phm_get_svi2_mvdd_voltage_table()
648 dep_table->entries[i].mvdd = allowed_dep_table->entries[i].mvdd; in smu_get_voltage_dependency_table_ppt_v1()
H A Dprocess_pptables_v1_0.c401 mclk_table_record->mvdd = mclk_dep_record->usMvdd; in get_mclk_voltage_dependency_table()
H A Dvega10_hwmgr.c678 mclk_table->entries[entry_id].mvdd = in vega10_patch_voltage_dependency_tables_with_lookup_table()
1040 vol_table->entries[i].value = dep_table->entries[i].mvdd; in vega10_get_mvdd_voltage_table()
1759 (uint8_t)(convert_to_vid(dep_on_mclk->entries[i].mvdd)); in vega10_populate_single_memory_level()
/dragonfly/sys/dev/drm/radeon/
H A Drv770_smc.h111 RV770_SMC_VOLTAGE_VALUE mvdd; member
H A Dnislands_smc.h111 NISLANDS_SMC_VOLTAGE_VALUE mvdd; member
H A Drv730_dpm.c311 rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in rv730_populate_smc_acpi_state()
368 &table->initialState.levels[0].mvdd); in rv730_populate_smc_initial_state()
H A Dsislands_smc.h156 SISLANDS_SMC_VOLTAGE_VALUE mvdd; member
H A Drv770_dpm.c673 ret = rv770_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); in rv770_convert_power_level_to_smc()
1002 rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in rv770_populate_smc_acpi_state()
1079 &table->initialState.levels[0].mvdd); in rv770_populate_smc_initial_state()
2254 u16 vddc, vddci, mvdd; in rv7xx_parse_pplib_clock_info() local
2255 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in rv7xx_parse_pplib_clock_info()
H A Drv740_dpm.c392 rv770_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in rv740_populate_smc_acpi_state()
H A Dcypress_dpm.c757 ret = cypress_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); in cypress_convert_power_level_to_smc()
1294 &table->initialState.levels[0].mvdd); in cypress_populate_smc_initial_state()
1456 cypress_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in cypress_populate_smc_acpi_state()
H A Dni_dpm.c1749 ni_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd); in ni_populate_smc_initial_state()
1919 ni_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in ni_populate_smc_acpi_state()
2383 ni_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); in ni_convert_power_level_to_smc()
3966 u16 vddc, vddci, mvdd; in ni_parse_pplib_clock_info() local
3967 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in ni_parse_pplib_clock_info()
H A Dradeon_atombios.c2362 u16 *vddc, u16 *vddci, u16 *mvdd) in radeon_atombios_get_default_voltages() argument
2372 *mvdd = 0; in radeon_atombios_get_default_voltages()
2382 *mvdd = le16_to_cpu(firmware_info->info_22.usBootUpMVDDCVoltage); in radeon_atombios_get_default_voltages()
2394 u16 vddc, vddci, mvdd; in radeon_atombios_parse_pplib_non_clock_info() local
2396 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in radeon_atombios_parse_pplib_non_clock_info()
H A Dradeon_mode.h728 u16 *vddc, u16 *vddci, u16 *mvdd);
H A Dsi_dpm.c4448 si_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd); in si_populate_smc_initial_state()
4608 si_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd); in si_populate_smc_acpi_state()
5079 ret = si_populate_mvdd_value(rdev, pl->mclk, &level->mvdd); in si_convert_power_level_to_smc()
6786 u16 vddc, vddci, mvdd; in si_parse_pplib_clock_info() local
6787 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in si_parse_pplib_clock_info()
6792 si_pi->mvdd_bootup_value = mvdd; in si_parse_pplib_clock_info()
H A Drv6xx_dpm.c1865 u16 vddc, vddci, mvdd; in rv6xx_parse_pplib_clock_info() local
1866 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in rv6xx_parse_pplib_clock_info()
/dragonfly/sys/dev/drm/amd/amdgpu/
H A Damdgpu_atombios.h209 u16 *vddc, u16 *vddci, u16 *mvdd);
H A Dsi_dpm.h442 RV770_SMC_VOLTAGE_VALUE mvdd; member
762 NISLANDS_SMC_VOLTAGE_VALUE mvdd; member
H A Dsislands_smc.h156 SISLANDS_SMC_VOLTAGE_VALUE mvdd; member
H A Damdgpu_atombios.c1156 u16 *vddc, u16 *vddci, u16 *mvdd) in amdgpu_atombios_get_default_voltages() argument
1166 *mvdd = 0; in amdgpu_atombios_get_default_voltages()
1176 *mvdd = le16_to_cpu(firmware_info->info_22.usBootUpMVDDCVoltage); in amdgpu_atombios_get_default_voltages()
H A Dsi_dpm.c4913 si_populate_initial_mvdd_value(adev, &table->initialState.levels[0].mvdd); in si_populate_smc_initial_state()
5072 si_populate_mvdd_value(adev, 0, &table->ACPIState.levels[0].mvdd); in si_populate_smc_acpi_state()
5542 ret = si_populate_mvdd_value(adev, pl->mclk, &level->mvdd); in si_convert_power_level_to_smc()
7187 u16 vddc, vddci, mvdd; in si_parse_pplib_clock_info() local
7188 amdgpu_atombios_get_default_voltages(adev, &vddc, &vddci, &mvdd); in si_parse_pplib_clock_info()
7193 si_pi->mvdd_bootup_value = mvdd; in si_parse_pplib_clock_info()