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Searched refs:s (Results 51 – 75 of 2059) sorted by relevance

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/qemu/dump/
H A Ddump.c100 s->dump_info.arch_cleanup_fn(s); in dump_cleanup()
287 ret = f(s->guest_note, s->guest_note_size, s); in write_guest_note()
486 ret = fd_write_vmcore(s->elf_section_hdrs, s->shdr_num * sizeof_shdr, s); in write_elf_section_headers()
784 rc = s->dump_info.arch_sections_write_fn(s, s->elf_section_data); in dump_end()
1024 get_note_sizes(s, s->guest_note, in create_header32()
1135 get_note_sizes(s, s->guest_note, in create_header64()
1984 s->phdr_num += s->list.num; in dump_init()
1995 s->phdr_offset = s->shdr_offset + sizeof(Elf64_Shdr) * s->shdr_num; in dump_init()
1996 s->note_offset = s->phdr_offset + sizeof(Elf64_Phdr) * s->phdr_num; in dump_init()
2002 s->memory_offset = s->note_offset + s->note_size; in dump_init()
[all …]
/qemu/hw/tpm/
H A Dtpm_tis_common.c104 tpm_backend_deliver_request(s->be_driver, &s->cmd); in tpm_tis_tpm_send()
155 s->loc[s->active_locty].access &= mask; in tpm_tis_new_active_locality()
189 if (s->aborting_locty == s->next_locty) { in tpm_tis_abort()
191 tpm_tis_sts_set(&s->loc[s->aborting_locty], in tpm_tis_abort()
197 tpm_tis_new_active_locality(s, s->next_locty); in tpm_tis_abort()
276 ret = s->buffer[s->rw_offset++]; in tpm_tis_data_read()
388 - s->rw_offset) | s->loc[locty].sts; in tpm_tis_mmio_read()
390 avail = s->be_buffer_size - s->rw_offset; in tpm_tis_mmio_read()
466 return bswap16(crc_ccitt(0, s->buffer, s->rw_offset)); in tpm_tis_get_checksum()
741 if (s->rw_offset < s->be_buffer_size) { in tpm_tis_mmio_write()
[all …]
/qemu/hw/timer/
H A Dstellaris-gptm.c21 level = (s->state & s->mask) != 0; in gptm_update_irq()
42 count = s->load[0] | (s->load[1] << 16); in gptm_reload()
62 gptm_state *s; in gptm_tick() local
65 s = *p; in gptm_tick()
83 s->rtc++; in gptm_tick()
84 match = s->match[0] | (s->match[1] << 16); in gptm_tick()
120 return s->state & s->mask; in gptm_read()
124 return s->load[0] | ((s->config < 4) ? (s->load[1] << 16) : 0); in gptm_read()
128 return s->match[0] | ((s->config < 4) ? (s->match[1] << 16) : 0); in gptm_read()
281 memory_region_init_io(&s->iomem, obj, &gptm_ops, s, in stellaris_gptm_init()
[all …]
H A Dnrf51_timer.c47 s->counter = (s->counter + ticks) % BIT(bitwidths[s->bitmode]); in update_counter()
53 s->update_counter_ns += ticks_to_ns(s, ticks); in update_counter()
70 if (s->cc[i] <= s->counter) { in rearm_timer()
74 delta_ns = ticks_to_ns(s, s->cc[i] - s->counter); in rearm_timer()
108 if (s->cc[i] > s->counter) { in timer_expire()
109 cc_remaining[i] = s->cc[i] - s->counter; in timer_expire()
112 s->counter + s->cc[i]; in timer_expire()
212 s->timer_start_ns = now - ticks_to_ns(s, s->counter); in nrf51_timer_write()
226 s->counter = (s->counter + 1) % BIT(bitwidths[s->bitmode]); in nrf51_timer_write()
247 s->cc[idx] = s->counter; in nrf51_timer_write()
[all …]
H A Dsh_timer.c59 s->old_level = s->int_level; in sh_timer_update()
93 ptimer_set_limit(s->timer, s->tcor, 0); in sh_timer_write()
99 ptimer_set_count(s->timer, s->tcnt); in sh_timer_write()
184 ptimer_set_limit(s->timer, s->tcor, 0); in sh_timer_write()
224 s->int_level = s->enabled; in sh_timer_tick()
232 s = g_malloc0(sizeof(*s)); in sh_timer_init()
244 sh_timer_write(s, OFFSET_TCOR >> 2, s->tcor); in sh_timer_init()
245 sh_timer_write(s, OFFSET_TCNT >> 2, s->tcnt); in sh_timer_init()
246 sh_timer_write(s, OFFSET_TCPR >> 2, s->tcpr); in sh_timer_init()
247 sh_timer_write(s, OFFSET_TCR >> 2, s->tcpr); in sh_timer_init()
[all …]
H A Dimx_epit.c70 if ((s->sr & SR_OCIF) && (s->cr & CR_OCIEN) && (s->cr & CR_EN)) { in imx_epit_update_int()
94 s->cr = 0; in imx_epit_reset()
98 s->sr = 0; in imx_epit_reset()
100 s->cmp = 0; in imx_epit_reset()
168 bool is_active = (s->cr & CR_EN) && imx_epit_get_freq(s); in imx_epit_update_compare_timer()
296 s->lr = value; in imx_epit_write_lr()
303 ptimer_set_limit(s->timer_reload, s->lr, s->cr & CR_IOVW); in imx_epit_write_lr()
304 ptimer_set_limit(s->timer_cmp, s->lr, 0); in imx_epit_write_lr()
307 ptimer_set_count(s->timer_reload, s->lr); in imx_epit_write_lr()
318 s->cmp = value; in imx_epit_write_cmp()
[all …]
H A Dstm32f2xx_timer.c53 if (s->tim_dier & TIM_DIER_UIE && s->tim_cr1 & TIM_CR1_CEN) { in stm32f2xx_timer_interrupt()
56 stm32f2xx_timer_set_alarm(s, s->hit_time); in stm32f2xx_timer_interrupt()
65 s->tim_ccr2 / (100 * (s->tim_psc + 1))); in stm32f2xx_timer_interrupt()
71 return muldiv64(t, s->freq_hz, 1000000000ULL) / (s->tim_psc + 1); in stm32f2xx_ns_to_ticks()
86 ticks = s->tim_arr - (now_ticks - s->tick_offset); in stm32f2xx_timer_set_alarm()
102 s->tim_cr1 = 0; in stm32f2xx_timer_reset()
103 s->tim_cr2 = 0; in stm32f2xx_timer_reset()
106 s->tim_sr = 0; in stm32f2xx_timer_reset()
119 s->tim_or = 0; in stm32f2xx_timer_reset()
121 s->tick_offset = stm32f2xx_ns_to_ticks(s, now); in stm32f2xx_timer_reset()
[all …]
H A Dexynos4210_mct.c521 s->g_timer.curr_comp = exynos4210_gcomp_find(s); in exynos4210_gfrc_restart()
570 s->g_timer.reg.cnt += s->g_timer.count; in exynos4210_gfrc_event()
591 s->g_timer.curr_comp = exynos4210_gcomp_find(s); in exynos4210_gfrc_event()
745 ptimer_set_count(s->ptimer_tick, s->count); in exynos4210_ltick_cnt_start()
866 if ((s->cnt_run && s->last_tcnto) || (s->int_run && s->last_icnto)) { in exynos4210_ltick_recalc_count()
880 s->distance = (uint64_t)s->tcntb * s->icntb; in exynos4210_ltick_recalc_count()
882 s->distance = s->tcntb; in exynos4210_ltick_recalc_count()
920 s->progress += s->count; in exynos4210_ltick_timer_event()
959 time2[s->id] - time1[s->id]); in exynos4210_ltick_event()
960 time1[s->id] = time2[s->id]; in exynos4210_ltick_event()
[all …]
/qemu/hw/input/
H A Dps2.c193 ps2_raise_irq(s); in ps2_queue()
204 ps2_raise_irq(s); in ps2_queue_2()
216 ps2_raise_irq(s); in ps2_queue_3()
229 ps2_raise_irq(s); in ps2_queue_4()
248 ps2_raise_irq(s); in ps2_cqueue_1()
332 s->modifiers, s->scancode_set, s->translate); in ps2_keyboard_event()
546 q = &s->queue; in ps2_read_data()
662 translate_table[s->scancode_set] : s->scancode_set); in ps2_write_keyboard()
862 if (s->mouse_dx == 0 && s->mouse_dy == 0 in ps2_mouse_sync()
863 && s->mouse_dz == 0 && s->mouse_dw == 0) { in ps2_mouse_sync()
[all …]
H A Dlm832x.c90 qemu_set_irq(s->nirq, !s->status); in lm_kbd_irq_update()
220 s->kbd.start &= sizeof(s->kbd.fifo) - 1; in lm_kbd_read()
223 return s->kbd.fifo[s->kbd.start]; in lm_kbd_read()
228 return s->kbd.fifo[(s->kbd.start + byte) & (sizeof(s->kbd.fifo) - 1)]; in lm_kbd_read()
261 qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 0) & 1]); in lm_kbd_write()
263 qemu_set_irq(s->mux.out[0], s->mux.in[0][(s->config >> 2) & 1]); in lm_kbd_write()
353 s->pwm.file[s->pwm.faddr] = 0; in lm_kbd_write()
413 return lm_kbd_read(s, s->reg, s->i2c_cycle ++); in lm_i2c_rx()
423 lm_kbd_write(s, s->reg, s->i2c_cycle - 1, data); in lm_i2c_tx()
490 if (s->kbd.len >= sizeof(s->kbd.fifo)) { in lm832x_key_event()
[all …]
H A Dpckbd.c230 if (s->throttle_timer && timer_pending(s->throttle_timer)) { in kbd_safe_update_irq()
339 kbd_queue(s, s->mode, 0); in kbd_write_command()
376 kbd_queue(s, s->outport, 0); in kbd_write_command()
411 s->obdata = ps2_read_data(PS2_DEVICE(&s->ps2kbd)); in kbd_read_data()
413 s->obdata = ps2_read_data(PS2_DEVICE(&s->ps2mouse)); in kbd_read_data()
415 s->obdata = kbd_dequeue(s); in kbd_read_data()
504 return s->outport != kbd_outport_default(s); in kbd_outport_needed()
569 s->pending_tmp = s->pending; in kbd_pre_save()
595 s->outport = kbd_outport_default(s); in kbd_post_load()
597 s->pending = s->pending_tmp; in kbd_post_load()
[all …]
/qemu/hw/i2c/
H A Dbcm2835_i2c.c37 if (s->c & BCM2835_I2C_C_INTR && s->s & BCM2835_I2C_S_RXR) { in bcm2835_i2c_update_interrupt()
42 if (s->c & BCM2835_I2C_C_INTT && s->s & BCM2835_I2C_S_TXW) { in bcm2835_i2c_update_interrupt()
47 if (s->c & BCM2835_I2C_C_INTD && s->s & BCM2835_I2C_S_DONE) { in bcm2835_i2c_update_interrupt()
57 s->s |= BCM2835_I2C_S_ERR; in bcm2835_i2c_begin_transfer()
59 s->s |= BCM2835_I2C_S_TA; in bcm2835_i2c_begin_transfer()
64 s->s |= BCM2835_I2C_S_TXW; in bcm2835_i2c_begin_transfer()
81 s->s |= BCM2835_I2C_S_DONE; in bcm2835_i2c_finish_transfer()
98 readval = s->s; in bcm2835_i2c_read()
108 if (s->s & BCM2835_I2C_S_TA) { in bcm2835_i2c_read()
163 s->dlen = s->last_dlen; in bcm2835_i2c_write()
[all …]
/qemu/hw/net/can/
H A Dcan_sja1000.c158 s->code_mask + 0, s->code_mask + 4, 1); in can_sja_accept_filter()
165 s->code_mask + 0, s->code_mask + 4, 0); in can_sja_accept_filter()
180 (s->code_mask[2] & ~(s->code_mask[6]))) { in can_sja_accept_filter()
189 (s->code_mask[3] & ~(s->code_mask[7]))) { in can_sja_accept_filter()
198 s->code_mask + 0, s->code_mask + 4, 1); in can_sja_accept_filter()
205 s->code_mask + 2, s->code_mask + 6, 1); in can_sja_accept_filter()
214 s->code_mask + 0, s->code_mask + 4, 0); in can_sja_accept_filter()
233 s->code_mask + 2, s->code_mask + 6, 0); in can_sja_accept_filter()
406 if (s->interrupt_en & s->interrupt_pel) { in can_sja_update_pel_irq()
415 if ((s->control >> 1) & s->interrupt_bas) { in can_sja_update_bas_irq()
[all …]
/qemu/hw/net/
H A Dstellaris_enet.c106 if (s->next_packet >= ARRAY_SIZE(s->rx)) { in stellaris_enet_post_load()
110 if (s->np > ARRAY_SIZE(s->rx)) { in stellaris_enet_post_load()
115 if (s->rx[i].len > ARRAY_SIZE(s->rx[i].data)) { in stellaris_enet_post_load()
124 if (s->tx_fifo_len > ARRAY_SIZE(s->tx_fifo)) { in stellaris_enet_post_load()
159 qemu_set_irq(s->irq, (s->ris & s->im) != 0); in stellaris_enet_update()
167 return s->tx_fifo[0] | (s->tx_fifo[1] << 8); in stellaris_txpacket_datalen()
242 n = s->next_packet + s->np; in stellaris_enet_receive()
309 rx_fifo = s->rx[s->next_packet].data + s->rx_fifo_offset; in stellaris_enet_read()
314 if (s->rx_fifo_offset >= s->rx[s->next_packet].len) { in stellaris_enet_read()
403 s->tx_fifo[s->tx_fifo_len++] = value; in stellaris_enet_write()
[all …]
H A Dne2000.c129 memcpy(s->mem, &s->c.macaddr, 6); in ne2000_reset()
135 s->mem[2 * i] = s->mem[i]; in ne2000_reset()
136 s->mem[2 * i + 1] = s->mem[i]; in ne2000_reset()
143 isr = (s->isr & s->imr) & 0x7f; in ne2000_update_irq()
146 isr ? 1 : 0, s->isr, s->imr); in ne2000_update_irq()
155 if (s->stop <= s->start) { in ne2000_buffer_full()
222 next -= (s->stop - s->start); in ne2000_receive()
501 if (s->rsar == s->stop) in ne2000_dma_update()
502 s->rsar = s->start; in ne2000_dma_update()
564 ne2000_mem_writel(s, s->rsar, val); in ne2000_asic_ioport_writel()
[all …]
/qemu/hw/misc/
H A Domap_gpmc.c109 if ((s->irqen & s->irqst) != s->lastirq) { in omap_gpmc_int_update()
110 s->lastirq = s->irqen & s->irqst; in omap_gpmc_int_update()
111 qemu_set_irq(s->irq, s->lastirq); in omap_gpmc_int_update()
258 s->prefetch.fifo[fptr] = s->prefetch.fifo[fptr + bytes]; in fill_prefetch_fifo()
270 if (s->prefetch.startengine && (s->prefetch.count == 0)) { in fill_prefetch_fifo()
306 data = s->prefetch.fifo[63 - s->prefetch.fifopointer]; in omap_gpmc_prefetch_read()
449 s->irqst = 0; in omap_gpmc_reset()
450 s->irqen = 0; in omap_gpmc_reset()
769 s->prefetch.count = s->prefetch.transfercount; in omap_gpmc_write()
800 if (s->ecc_ptr == 0 || s->ecc_ptr > 9) { in omap_gpmc_write()
[all …]
H A Dmos6522.c56 if (s->ifr & s->ier) { in mos6522_update_irq()
376 if (s->ifr & s->ier) { in mos6522_read()
404 s->b = (s->b & ~s->dirb) | (val & s->dirb); in mos6522_write()
417 s->a = (s->a & ~s->dira) | (val & s->dira); in mos6522_write()
434 mos6522_timer1_update(s, &s->timers[0], in mos6522_write()
440 set_counter(s, &s->timers[0], s->timers[0].latch); in mos6522_write()
444 mos6522_timer1_update(s, &s->timers[0], in mos6522_write()
462 set_counter(s, &s->timers[1], s->timers[1].latch); in mos6522_write()
660 s->timers[0].frequency = s->frequency; in mos6522_reset_hold()
662 set_counter(s, &s->timers[0], 0xffff); in mos6522_reset_hold()
[all …]
/qemu/hw/arm/
H A Dbcm2835_peripherals.c81 sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->peri_mr); in raspi_peripherals_base_init()
258 memory_region_init_alias(&s->peri_mr_alias, OBJECT(s), in bcm_soc_peripherals_common_realize()
267 memory_region_init_alias(&s->ram_alias[n], OBJECT(s), in bcm_soc_peripherals_common_realize()
289 sysbus_pass_irq(SYS_BUS_DEVICE(s), SYS_BUS_DEVICE(&s->ic)); in bcm_soc_peripherals_common_realize()
498 create_unimp(s, &s->txp, "bcm2835-txp", TXP_OFFSET, 0x1000); in bcm_soc_peripherals_common_realize()
500 create_unimp(s, &s->i2s, "bcm2835-i2s", I2S_OFFSET, 0x100); in bcm_soc_peripherals_common_realize()
501 create_unimp(s, &s->smi, "bcm2835-smi", SMI_OFFSET, 0x100); in bcm_soc_peripherals_common_realize()
503 create_unimp(s, &s->otp, "bcm2835-otp", OTP_OFFSET, 0x80); in bcm_soc_peripherals_common_realize()
504 create_unimp(s, &s->dbus, "bcm2835-dbus", DBUS_OFFSET, 0x8000); in bcm_soc_peripherals_common_realize()
505 create_unimp(s, &s->ave0, "bcm2835-ave0", AVE0_OFFSET, 0x8000); in bcm_soc_peripherals_common_realize()
[all …]
/qemu/hw/usb/
H A Dtusb6010.c250 qemu_set_irq(s->irq, s->intr & ~s->mask & s->intr_ok); in tusb_intr_update()
252 qemu_set_irq(s->irq, (!(s->intr & ~s->mask)) & s->intr_ok); in tusb_intr_update()
258 if (s->usbip_intr & 0x0000ffff & ~s->usbip_mask) in tusb_usbip_intr_update()
264 if (s->usbip_intr & 0xffff0000 & ~s->usbip_mask) in tusb_usbip_intr_update()
276 if (s->dma_intr & ~s->dma_mask) in tusb_dma_intr_update()
700 if (s->power) { in tusb_power_tick()
743 s->usbip_intr = musb_core_intr_get(s->musb); in tusb_musb_core_intr()
787 s->power = 0; in tusb6010_reset()
806 s->pullup[0] = s->pullup[1] = 0; in tusb6010_reset()
809 s->rx_config[i] = s->tx_config[i] = 0; in tusb6010_reset()
[all …]
/qemu/hw/sd/
H A Dssi-sd.c179 } else if (s->cmd == 8 || s->cmd == 58) { in OBJECT_DECLARE_SIMPLE_TYPE()
196 s->arglen = (s->cmd == 13) ? 2 : 1; in OBJECT_DECLARE_SIMPLE_TYPE()
199 if (s->cmd == 28 || s->cmd == 29 || s->cmd == 38) { in OBJECT_DECLARE_SIMPLE_TYPE()
244 s->cmdarg[s->arglen++] = val; in OBJECT_DECLARE_SIMPLE_TYPE()
252 if (s->response_pos < s->arglen) { in OBJECT_DECLARE_SIMPLE_TYPE()
254 return s->response[s->response_pos++]; in OBJECT_DECLARE_SIMPLE_TYPE()
336 (s->arglen < 0 || s->arglen >= ARRAY_SIZE(s->cmdarg))) { in ssi_sd_post_load()
340 (s->response_pos < 0 || s->response_pos >= ARRAY_SIZE(s->response) || in ssi_sd_post_load()
341 (!s->stopping && s->arglen > ARRAY_SIZE(s->response)))) { in ssi_sd_post_load()
382 memset(s->cmdarg, 0, sizeof(s->cmdarg)); in ssi_sd_reset()
[all …]
/qemu/hw/display/
H A Dati_2d.c58 s->regs.dst_x : s->regs.dst_x + 1 - s->regs.dst_width); in ati_2d_blt()
60 s->regs.dst_y : s->regs.dst_y + 1 - s->regs.dst_height); in ati_2d_blt()
78 uint8_t *end = s->vga.vram_ptr + s->vga.vram_size; in ati_2d_blt()
86 s->regs.src_offset, s->regs.dst_offset, s->regs.default_offset, in ati_2d_blt()
87 s->regs.src_pitch, s->regs.dst_pitch, s->regs.default_pitch, in ati_2d_blt()
88 s->regs.src_x, s->regs.src_y, dst_x, dst_y, in ati_2d_blt()
89 s->regs.dst_width, s->regs.dst_height, in ati_2d_blt()
97 s->regs.src_x : s->regs.src_x + 1 - s->regs.dst_width); in ati_2d_blt()
99 s->regs.src_y : s->regs.src_y + 1 - s->regs.dst_height); in ati_2d_blt()
125 s->regs.dst_width, s->regs.dst_height); in ati_2d_blt()
[all …]
/qemu/hw/intc/
H A Di8259.c82 mask = s->irr & ~s->imr; in pic_get_irq()
94 if (s->special_fully_nested_mode && s->master) { in pic_get_irq()
113 trace_pic_update_irq(s->master, s->imr, s->irr, s->priority_add); in pic_update_irq()
136 if (s->ltim || (s->elcr & mask)) { in pic_set_irq()
170 if (!s->ltim && !(s->elcr & (1 << irq))) { in pic_intack()
226 s->elcr = 0; in pic_reset()
267 priority = get_priority(s, s->isr); in pic_ioport_write()
306 s->init_state = s->single_mode ? (s->init4 ? 3 : 0) : 2; in pic_ioport_write()
363 s->elcr = val & s->elcr_mask; in elcr_ioport_write()
396 memory_region_init_io(&s->base_io, OBJECT(s), &pic_base_ioport_ops, s, in pic_realize()
[all …]
/qemu/hw/char/
H A Dmcf_uart.c74 if ((s->sr & ((s->mr[0] & MCF_UART_RxIRQ) in OBJECT_DECLARE_SIMPLE_TYPE()
78 qemu_set_irq(s->irq, (s->isr & s->imr) != 0); in OBJECT_DECLARE_SIMPLE_TYPE()
87 return s->mr[s->current_mr]; in mcf_uart_read()
101 s->fifo[i] = s->fifo[i + 1]; in mcf_uart_read()
126 if (s->tx_enabled && (s->sr & MCF_UART_TxEMP) == 0) { in mcf_uart_do_tx()
207 s->mr[s->current_mr] = val; in mcf_uart_write()
238 s->mr[0] = 0; in mcf_uart_reset()
243 s->isr = 0; in mcf_uart_reset()
244 s->imr = 0; in mcf_uart_reset()
253 s->fifo[s->fifo_len] = data; in mcf_uart_push_byte()
[all …]
H A Dcadence_uart.c131 s->r[R_SR] |= !s->rx_count ? UART_SR_INTR_REMPTY : 0; in uart_update_status()
132 s->r[R_SR] |= s->rx_count >= s->r[R_RTRIG] ? UART_SR_INTR_RTRIG : 0; in uart_update_status()
137 s->r[R_SR] |= s->tx_count >= s->r[R_TTRIG] ? UART_SR_TTRIG : 0; in uart_update_status()
139 s->r[R_CISR] |= s->r[R_SR] & UART_SR_TO_CISR_MASK; in uart_update_status()
141 qemu_set_irq(s->irq, !!(s->r[R_IMR] & s->r[R_CISR])); in uart_update_status()
181 baud_rate /= (s->r[R_BRGR] * (s->r[R_BDIV] + 1)); in uart_parameters_setup()
291 s->rx_fifo[s->rx_wpos] = buf[i]; in uart_write_rx_fifo()
317 ret = qemu_chr_fe_write(&s->chr, s->tx_fifo, s->tx_count); in cadence_uart_xmit()
321 memmove(s->tx_fifo, s->tx_fifo + ret, s->tx_count); in cadence_uart_xmit()
355 memcpy(s->tx_fifo + s->tx_count, buf, size); in uart_write_tx_fifo()
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H A Dibex_uart.c130 s->rx_level += 1; in ibex_uart_receive()
149 s->tx_level = 0; in ibex_uart_xmit()
153 if (!s->tx_level) { in ibex_uart_xmit()
162 ret = qemu_chr_fe_write(&s->chr, s->tx_fifo, s->tx_level); in ibex_uart_xmit()
166 memmove(s->tx_fifo, s->tx_fifo + ret, s->tx_level); in ibex_uart_xmit()
169 if (s->tx_level) { in ibex_uart_xmit()
210 memcpy(s->tx_fifo + s->tx_level, buf, size); in uart_write_tx_fifo()
246 s->tx_level = 0; in ibex_uart_reset()
247 s->rx_level = 0; in ibex_uart_reset()
292 if ((s->uart_ctrl & R_CTRL_RX_ENABLE_MASK) && (s->rx_level > 0)) { in ibex_uart_read()
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